diff options
| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-05-27 07:22:16 -0400 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-07-01 05:06:49 -0400 |
| commit | 332e9d70518b55a70068739bc7ea134e1d8a269b (patch) | |
| tree | 5696ca3ae882643084afb9575f7c0e66b56f118a /drivers/video | |
| parent | 525dae613638320c880afcc0d8d6dd27141fc4e4 (diff) | |
OMAP: DSS2: Add new FEAT definitions for features missing from OMAP2
OMAP2 doesn't have CPR, PRELOAD nor FIR_COEF_V registers. Add new
feature definitions for those, and check the feature before accessing
those registers.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/omap2/dss/dispc.c | 145 | ||||
| -rw-r--r-- | drivers/video/omap2/dss/dss_features.c | 12 | ||||
| -rw-r--r-- | drivers/video/omap2/dss/dss_features.h | 3 | ||||
| -rw-r--r-- | drivers/video/omap2/dss/overlay.c | 3 |
4 files changed, 105 insertions, 58 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index a9eebd8e79f..ee2052f2ea0 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c | |||
| @@ -159,7 +159,8 @@ void dispc_save_context(void) | |||
| 159 | SR(TIMING_V(OMAP_DSS_CHANNEL_LCD)); | 159 | SR(TIMING_V(OMAP_DSS_CHANNEL_LCD)); |
| 160 | SR(POL_FREQ(OMAP_DSS_CHANNEL_LCD)); | 160 | SR(POL_FREQ(OMAP_DSS_CHANNEL_LCD)); |
| 161 | SR(DIVISORo(OMAP_DSS_CHANNEL_LCD)); | 161 | SR(DIVISORo(OMAP_DSS_CHANNEL_LCD)); |
| 162 | SR(GLOBAL_ALPHA); | 162 | if (dss_has_feature(FEAT_GLOBAL_ALPHA)) |
| 163 | SR(GLOBAL_ALPHA); | ||
| 163 | SR(SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT)); | 164 | SR(SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT)); |
| 164 | SR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD)); | 165 | SR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD)); |
| 165 | if (dss_has_feature(FEAT_MGR_LCD2)) { | 166 | if (dss_has_feature(FEAT_MGR_LCD2)) { |
| @@ -189,20 +190,25 @@ void dispc_save_context(void) | |||
| 189 | SR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD)); | 190 | SR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD)); |
| 190 | SR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD)); | 191 | SR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD)); |
| 191 | 192 | ||
| 192 | SR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD)); | 193 | if (dss_has_feature(FEAT_CPR)) { |
| 193 | SR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD)); | 194 | SR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD)); |
| 194 | SR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD)); | 195 | SR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD)); |
| 196 | SR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD)); | ||
| 197 | } | ||
| 195 | if (dss_has_feature(FEAT_MGR_LCD2)) { | 198 | if (dss_has_feature(FEAT_MGR_LCD2)) { |
| 196 | SR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2)); | 199 | if (dss_has_feature(FEAT_CPR)) { |
| 197 | SR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2)); | 200 | SR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2)); |
| 198 | SR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2)); | 201 | SR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2)); |
| 202 | SR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2)); | ||
| 203 | } | ||
| 199 | 204 | ||
| 200 | SR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2)); | 205 | SR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2)); |
| 201 | SR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2)); | 206 | SR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2)); |
| 202 | SR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2)); | 207 | SR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2)); |
| 203 | } | 208 | } |
| 204 | 209 | ||
| 205 | SR(OVL_PRELOAD(OMAP_DSS_GFX)); | 210 | if (dss_has_feature(FEAT_PRELOAD)) |
| 211 | SR(OVL_PRELOAD(OMAP_DSS_GFX)); | ||
| 206 | 212 | ||
| 207 | /* VID1 */ | 213 | /* VID1 */ |
| 208 | SR(OVL_BA0(OMAP_DSS_VIDEO1)); | 214 | SR(OVL_BA0(OMAP_DSS_VIDEO1)); |
| @@ -227,8 +233,10 @@ void dispc_save_context(void) | |||
| 227 | for (i = 0; i < 5; i++) | 233 | for (i = 0; i < 5; i++) |
| 228 | SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, i)); | 234 | SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, i)); |
| 229 | 235 | ||
| 230 | for (i = 0; i < 8; i++) | 236 | if (dss_has_feature(FEAT_FIR_COEF_V)) { |
| 231 | SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i)); | 237 | for (i = 0; i < 8; i++) |
| 238 | SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i)); | ||
| 239 | } | ||
| 232 | 240 | ||
| 233 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { | 241 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { |
| 234 | SR(OVL_BA0_UV(OMAP_DSS_VIDEO1)); | 242 | SR(OVL_BA0_UV(OMAP_DSS_VIDEO1)); |
| @@ -249,7 +257,8 @@ void dispc_save_context(void) | |||
| 249 | if (dss_has_feature(FEAT_ATTR2)) | 257 | if (dss_has_feature(FEAT_ATTR2)) |
| 250 | SR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO1)); | 258 | SR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO1)); |
| 251 | 259 | ||
| 252 | SR(OVL_PRELOAD(OMAP_DSS_VIDEO1)); | 260 | if (dss_has_feature(FEAT_PRELOAD)) |
| 261 | SR(OVL_PRELOAD(OMAP_DSS_VIDEO1)); | ||
| 253 | 262 | ||
| 254 | /* VID2 */ | 263 | /* VID2 */ |
| 255 | SR(OVL_BA0(OMAP_DSS_VIDEO2)); | 264 | SR(OVL_BA0(OMAP_DSS_VIDEO2)); |
| @@ -274,8 +283,10 @@ void dispc_save_context(void) | |||
| 274 | for (i = 0; i < 5; i++) | 283 | for (i = 0; i < 5; i++) |
| 275 | SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, i)); | 284 | SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, i)); |
| 276 | 285 | ||
| 277 | for (i = 0; i < 8; i++) | 286 | if (dss_has_feature(FEAT_FIR_COEF_V)) { |
| 278 | SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i)); | 287 | for (i = 0; i < 8; i++) |
| 288 | SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i)); | ||
| 289 | } | ||
| 279 | 290 | ||
| 280 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { | 291 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { |
| 281 | SR(OVL_BA0_UV(OMAP_DSS_VIDEO2)); | 292 | SR(OVL_BA0_UV(OMAP_DSS_VIDEO2)); |
| @@ -296,7 +307,8 @@ void dispc_save_context(void) | |||
| 296 | if (dss_has_feature(FEAT_ATTR2)) | 307 | if (dss_has_feature(FEAT_ATTR2)) |
| 297 | SR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2)); | 308 | SR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2)); |
| 298 | 309 | ||
| 299 | SR(OVL_PRELOAD(OMAP_DSS_VIDEO2)); | 310 | if (dss_has_feature(FEAT_PRELOAD)) |
| 311 | SR(OVL_PRELOAD(OMAP_DSS_VIDEO2)); | ||
| 300 | 312 | ||
| 301 | if (dss_has_feature(FEAT_CORE_CLK_DIV)) | 313 | if (dss_has_feature(FEAT_CORE_CLK_DIV)) |
| 302 | SR(DIVISOR); | 314 | SR(DIVISOR); |
| @@ -318,7 +330,8 @@ void dispc_restore_context(void) | |||
| 318 | RR(TIMING_V(OMAP_DSS_CHANNEL_LCD)); | 330 | RR(TIMING_V(OMAP_DSS_CHANNEL_LCD)); |
| 319 | RR(POL_FREQ(OMAP_DSS_CHANNEL_LCD)); | 331 | RR(POL_FREQ(OMAP_DSS_CHANNEL_LCD)); |
| 320 | RR(DIVISORo(OMAP_DSS_CHANNEL_LCD)); | 332 | RR(DIVISORo(OMAP_DSS_CHANNEL_LCD)); |
| 321 | RR(GLOBAL_ALPHA); | 333 | if (dss_has_feature(FEAT_GLOBAL_ALPHA)) |
| 334 | RR(GLOBAL_ALPHA); | ||
| 322 | RR(SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT)); | 335 | RR(SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT)); |
| 323 | RR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD)); | 336 | RR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD)); |
| 324 | if (dss_has_feature(FEAT_MGR_LCD2)) { | 337 | if (dss_has_feature(FEAT_MGR_LCD2)) { |
| @@ -348,20 +361,25 @@ void dispc_restore_context(void) | |||
| 348 | RR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD)); | 361 | RR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD)); |
| 349 | RR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD)); | 362 | RR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD)); |
| 350 | 363 | ||
| 351 | RR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD)); | 364 | if (dss_has_feature(FEAT_CPR)) { |
| 352 | RR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD)); | 365 | RR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD)); |
| 353 | RR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD)); | 366 | RR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD)); |
| 367 | RR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD)); | ||
| 368 | } | ||
| 354 | if (dss_has_feature(FEAT_MGR_LCD2)) { | 369 | if (dss_has_feature(FEAT_MGR_LCD2)) { |
| 355 | RR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2)); | 370 | RR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2)); |
| 356 | RR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2)); | 371 | RR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2)); |
| 357 | RR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2)); | 372 | RR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2)); |
| 358 | 373 | ||
| 359 | RR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2)); | 374 | if (dss_has_feature(FEAT_CPR)) { |
| 360 | RR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2)); | 375 | RR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2)); |
| 361 | RR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2)); | 376 | RR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2)); |
| 377 | RR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2)); | ||
| 378 | } | ||
| 362 | } | 379 | } |
| 363 | 380 | ||
| 364 | RR(OVL_PRELOAD(OMAP_DSS_GFX)); | 381 | if (dss_has_feature(FEAT_PRELOAD)) |
| 382 | RR(OVL_PRELOAD(OMAP_DSS_GFX)); | ||
| 365 | 383 | ||
| 366 | /* VID1 */ | 384 | /* VID1 */ |
| 367 | RR(OVL_BA0(OMAP_DSS_VIDEO1)); | 385 | RR(OVL_BA0(OMAP_DSS_VIDEO1)); |
| @@ -386,8 +404,10 @@ void dispc_restore_context(void) | |||
| 386 | for (i = 0; i < 5; i++) | 404 | for (i = 0; i < 5; i++) |
| 387 | RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, i)); | 405 | RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, i)); |
| 388 | 406 | ||
| 389 | for (i = 0; i < 8; i++) | 407 | if (dss_has_feature(FEAT_FIR_COEF_V)) { |
| 390 | RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i)); | 408 | for (i = 0; i < 8; i++) |
| 409 | RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i)); | ||
| 410 | } | ||
| 391 | 411 | ||
| 392 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { | 412 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { |
| 393 | RR(OVL_BA0_UV(OMAP_DSS_VIDEO1)); | 413 | RR(OVL_BA0_UV(OMAP_DSS_VIDEO1)); |
| @@ -408,7 +428,8 @@ void dispc_restore_context(void) | |||
| 408 | if (dss_has_feature(FEAT_ATTR2)) | 428 | if (dss_has_feature(FEAT_ATTR2)) |
| 409 | RR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO1)); | 429 | RR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO1)); |
| 410 | 430 | ||
| 411 | RR(OVL_PRELOAD(OMAP_DSS_VIDEO1)); | 431 | if (dss_has_feature(FEAT_PRELOAD)) |
| 432 | RR(OVL_PRELOAD(OMAP_DSS_VIDEO1)); | ||
| 412 | 433 | ||
| 413 | /* VID2 */ | 434 | /* VID2 */ |
| 414 | RR(OVL_BA0(OMAP_DSS_VIDEO2)); | 435 | RR(OVL_BA0(OMAP_DSS_VIDEO2)); |
| @@ -433,8 +454,10 @@ void dispc_restore_context(void) | |||
| 433 | for (i = 0; i < 5; i++) | 454 | for (i = 0; i < 5; i++) |
| 434 | RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, i)); | 455 | RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, i)); |
| 435 | 456 | ||
| 436 | for (i = 0; i < 8; i++) | 457 | if (dss_has_feature(FEAT_FIR_COEF_V)) { |
| 437 | RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i)); | 458 | for (i = 0; i < 8; i++) |
| 459 | RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i)); | ||
| 460 | } | ||
| 438 | 461 | ||
| 439 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { | 462 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { |
| 440 | RR(OVL_BA0_UV(OMAP_DSS_VIDEO2)); | 463 | RR(OVL_BA0_UV(OMAP_DSS_VIDEO2)); |
| @@ -455,7 +478,8 @@ void dispc_restore_context(void) | |||
| 455 | if (dss_has_feature(FEAT_ATTR2)) | 478 | if (dss_has_feature(FEAT_ATTR2)) |
| 456 | RR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2)); | 479 | RR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2)); |
| 457 | 480 | ||
| 458 | RR(OVL_PRELOAD(OMAP_DSS_VIDEO2)); | 481 | if (dss_has_feature(FEAT_PRELOAD)) |
| 482 | RR(OVL_PRELOAD(OMAP_DSS_VIDEO2)); | ||
| 459 | 483 | ||
| 460 | if (dss_has_feature(FEAT_CORE_CLK_DIV)) | 484 | if (dss_has_feature(FEAT_CORE_CLK_DIV)) |
| 461 | RR(DIVISOR); | 485 | RR(DIVISOR); |
| @@ -2650,7 +2674,8 @@ void dispc_dump_regs(struct seq_file *s) | |||
| 2650 | DUMPREG(DISPC_TIMING_V(OMAP_DSS_CHANNEL_LCD)); | 2674 | DUMPREG(DISPC_TIMING_V(OMAP_DSS_CHANNEL_LCD)); |
| 2651 | DUMPREG(DISPC_POL_FREQ(OMAP_DSS_CHANNEL_LCD)); | 2675 | DUMPREG(DISPC_POL_FREQ(OMAP_DSS_CHANNEL_LCD)); |
| 2652 | DUMPREG(DISPC_DIVISORo(OMAP_DSS_CHANNEL_LCD)); | 2676 | DUMPREG(DISPC_DIVISORo(OMAP_DSS_CHANNEL_LCD)); |
| 2653 | DUMPREG(DISPC_GLOBAL_ALPHA); | 2677 | if (dss_has_feature(FEAT_GLOBAL_ALPHA)) |
| 2678 | DUMPREG(DISPC_GLOBAL_ALPHA); | ||
| 2654 | DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT)); | 2679 | DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT)); |
| 2655 | DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_LCD)); | 2680 | DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_LCD)); |
| 2656 | if (dss_has_feature(FEAT_MGR_LCD2)) { | 2681 | if (dss_has_feature(FEAT_MGR_LCD2)) { |
| @@ -2681,20 +2706,25 @@ void dispc_dump_regs(struct seq_file *s) | |||
| 2681 | DUMPREG(DISPC_DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD)); | 2706 | DUMPREG(DISPC_DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD)); |
| 2682 | DUMPREG(DISPC_DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD)); | 2707 | DUMPREG(DISPC_DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD)); |
| 2683 | 2708 | ||
| 2684 | DUMPREG(DISPC_CPR_COEF_R(OMAP_DSS_CHANNEL_LCD)); | 2709 | if (dss_has_feature(FEAT_CPR)) { |
| 2685 | DUMPREG(DISPC_CPR_COEF_G(OMAP_DSS_CHANNEL_LCD)); | 2710 | DUMPREG(DISPC_CPR_COEF_R(OMAP_DSS_CHANNEL_LCD)); |
| 2686 | DUMPREG(DISPC_CPR_COEF_B(OMAP_DSS_CHANNEL_LCD)); | 2711 | DUMPREG(DISPC_CPR_COEF_G(OMAP_DSS_CHANNEL_LCD)); |
| 2712 | DUMPREG(DISPC_CPR_COEF_B(OMAP_DSS_CHANNEL_LCD)); | ||
| 2713 | } | ||
| 2687 | if (dss_has_feature(FEAT_MGR_LCD2)) { | 2714 | if (dss_has_feature(FEAT_MGR_LCD2)) { |
| 2688 | DUMPREG(DISPC_DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2)); | 2715 | DUMPREG(DISPC_DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2)); |
| 2689 | DUMPREG(DISPC_DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2)); | 2716 | DUMPREG(DISPC_DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2)); |
| 2690 | DUMPREG(DISPC_DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2)); | 2717 | DUMPREG(DISPC_DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2)); |
| 2691 | 2718 | ||
| 2692 | DUMPREG(DISPC_CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2)); | 2719 | if (dss_has_feature(FEAT_CPR)) { |
| 2693 | DUMPREG(DISPC_CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2)); | 2720 | DUMPREG(DISPC_CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2)); |
| 2694 | DUMPREG(DISPC_CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2)); | 2721 | DUMPREG(DISPC_CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2)); |
| 2722 | DUMPREG(DISPC_CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2)); | ||
| 2723 | } | ||
| 2695 | } | 2724 | } |
| 2696 | 2725 | ||
| 2697 | DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_GFX)); | 2726 | if (dss_has_feature(FEAT_PRELOAD)) |
| 2727 | DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_GFX)); | ||
| 2698 | 2728 | ||
| 2699 | DUMPREG(DISPC_OVL_BA0(OMAP_DSS_VIDEO1)); | 2729 | DUMPREG(DISPC_OVL_BA0(OMAP_DSS_VIDEO1)); |
| 2700 | DUMPREG(DISPC_OVL_BA1(OMAP_DSS_VIDEO1)); | 2730 | DUMPREG(DISPC_OVL_BA1(OMAP_DSS_VIDEO1)); |
| @@ -2745,14 +2775,16 @@ void dispc_dump_regs(struct seq_file *s) | |||
| 2745 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 2)); | 2775 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 2)); |
| 2746 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 3)); | 2776 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 3)); |
| 2747 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 4)); | 2777 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 4)); |
| 2748 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 0)); | 2778 | if (dss_has_feature(FEAT_FIR_COEF_V)) { |
| 2749 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 1)); | 2779 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 0)); |
| 2750 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 2)); | 2780 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 1)); |
| 2751 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 3)); | 2781 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 2)); |
| 2752 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 4)); | 2782 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 3)); |
| 2753 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 5)); | 2783 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 4)); |
| 2754 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 6)); | 2784 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 5)); |
| 2755 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 7)); | 2785 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 6)); |
| 2786 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 7)); | ||
| 2787 | } | ||
| 2756 | 2788 | ||
| 2757 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { | 2789 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { |
| 2758 | DUMPREG(DISPC_OVL_BA0_UV(OMAP_DSS_VIDEO1)); | 2790 | DUMPREG(DISPC_OVL_BA0_UV(OMAP_DSS_VIDEO1)); |
| @@ -2813,14 +2845,17 @@ void dispc_dump_regs(struct seq_file *s) | |||
| 2813 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 2)); | 2845 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 2)); |
| 2814 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 3)); | 2846 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 3)); |
| 2815 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 4)); | 2847 | DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 4)); |
| 2816 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 0)); | 2848 | |
| 2817 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 1)); | 2849 | if (dss_has_feature(FEAT_FIR_COEF_V)) { |
| 2818 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 2)); | 2850 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 0)); |
| 2819 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 3)); | 2851 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 1)); |
| 2820 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 4)); | 2852 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 2)); |
| 2821 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 5)); | 2853 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 3)); |
| 2822 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 6)); | 2854 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 4)); |
| 2823 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 7)); | 2855 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 5)); |
| 2856 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 6)); | ||
| 2857 | DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 7)); | ||
| 2858 | } | ||
| 2824 | 2859 | ||
| 2825 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { | 2860 | if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) { |
| 2826 | DUMPREG(DISPC_OVL_BA0_UV(OMAP_DSS_VIDEO2)); | 2861 | DUMPREG(DISPC_OVL_BA0_UV(OMAP_DSS_VIDEO2)); |
| @@ -2859,8 +2894,10 @@ void dispc_dump_regs(struct seq_file *s) | |||
| 2859 | if (dss_has_feature(FEAT_ATTR2)) | 2894 | if (dss_has_feature(FEAT_ATTR2)) |
| 2860 | DUMPREG(DISPC_OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2)); | 2895 | DUMPREG(DISPC_OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2)); |
| 2861 | 2896 | ||
| 2862 | DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO1)); | 2897 | if (dss_has_feature(FEAT_PRELOAD)) { |
| 2863 | DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO2)); | 2898 | DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO1)); |
| 2899 | DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO2)); | ||
| 2900 | } | ||
| 2864 | 2901 | ||
| 2865 | dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); | 2902 | dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK); |
| 2866 | #undef DUMPREG | 2903 | #undef DUMPREG |
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c index a588380eec2..bd420f9650c 100644 --- a/drivers/video/omap2/dss/dss_features.c +++ b/drivers/video/omap2/dss/dss_features.c | |||
| @@ -287,7 +287,8 @@ static const struct omap_dss_features omap3430_dss_features = { | |||
| 287 | FEAT_FUNCGATED | FEAT_ROWREPEATENABLE | | 287 | FEAT_FUNCGATED | FEAT_ROWREPEATENABLE | |
| 288 | FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF | | 288 | FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF | |
| 289 | FEAT_DSI_PLL_FREQSEL | FEAT_DSI_REVERSE_TXCLKESC | | 289 | FEAT_DSI_PLL_FREQSEL | FEAT_DSI_REVERSE_TXCLKESC | |
| 290 | FEAT_VENC_REQUIRES_TV_DAC_CLK, | 290 | FEAT_VENC_REQUIRES_TV_DAC_CLK | FEAT_CPR | FEAT_PRELOAD | |
| 291 | FEAT_FIR_COEF_V, | ||
| 291 | 292 | ||
| 292 | .num_mgrs = 2, | 293 | .num_mgrs = 2, |
| 293 | .num_ovls = 3, | 294 | .num_ovls = 3, |
| @@ -307,7 +308,8 @@ static const struct omap_dss_features omap3630_dss_features = { | |||
| 307 | FEAT_PRE_MULT_ALPHA | FEAT_FUNCGATED | | 308 | FEAT_PRE_MULT_ALPHA | FEAT_FUNCGATED | |
| 308 | FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT | | 309 | FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT | |
| 309 | FEAT_RESIZECONF | FEAT_DSI_PLL_PWR_BUG | | 310 | FEAT_RESIZECONF | FEAT_DSI_PLL_PWR_BUG | |
| 310 | FEAT_DSI_PLL_FREQSEL, | 311 | FEAT_DSI_PLL_FREQSEL | FEAT_CPR | FEAT_PRELOAD | |
| 312 | FEAT_FIR_COEF_V, | ||
| 311 | 313 | ||
| 312 | .num_mgrs = 2, | 314 | .num_mgrs = 2, |
| 313 | .num_ovls = 3, | 315 | .num_ovls = 3, |
| @@ -328,7 +330,8 @@ static const struct omap_dss_features omap4430_es1_0_dss_features = { | |||
| 328 | FEAT_MGR_LCD2 | FEAT_GLOBAL_ALPHA_VID1 | | 330 | FEAT_MGR_LCD2 | FEAT_GLOBAL_ALPHA_VID1 | |
| 329 | FEAT_CORE_CLK_DIV | FEAT_LCD_CLK_SRC | | 331 | FEAT_CORE_CLK_DIV | FEAT_LCD_CLK_SRC | |
| 330 | FEAT_DSI_DCS_CMD_CONFIG_VC | FEAT_DSI_VC_OCP_WIDTH | | 332 | FEAT_DSI_DCS_CMD_CONFIG_VC | FEAT_DSI_VC_OCP_WIDTH | |
| 331 | FEAT_DSI_GNQ | FEAT_HANDLE_UV_SEPARATE | FEAT_ATTR2, | 333 | FEAT_DSI_GNQ | FEAT_HANDLE_UV_SEPARATE | FEAT_ATTR2 | |
| 334 | FEAT_CPR | FEAT_PRELOAD | FEAT_FIR_COEF_V, | ||
| 332 | 335 | ||
| 333 | .num_mgrs = 3, | 336 | .num_mgrs = 3, |
| 334 | .num_ovls = 3, | 337 | .num_ovls = 3, |
| @@ -349,7 +352,8 @@ static const struct omap_dss_features omap4_dss_features = { | |||
| 349 | FEAT_CORE_CLK_DIV | FEAT_LCD_CLK_SRC | | 352 | FEAT_CORE_CLK_DIV | FEAT_LCD_CLK_SRC | |
| 350 | FEAT_DSI_DCS_CMD_CONFIG_VC | FEAT_DSI_VC_OCP_WIDTH | | 353 | FEAT_DSI_DCS_CMD_CONFIG_VC | FEAT_DSI_VC_OCP_WIDTH | |
| 351 | FEAT_DSI_GNQ | FEAT_HDMI_CTS_SWMODE | | 354 | FEAT_DSI_GNQ | FEAT_HDMI_CTS_SWMODE | |
| 352 | FEAT_HANDLE_UV_SEPARATE | FEAT_ATTR2, | 355 | FEAT_HANDLE_UV_SEPARATE | FEAT_ATTR2 | FEAT_CPR | |
| 356 | FEAT_PRELOAD | FEAT_FIR_COEF_V, | ||
| 353 | 357 | ||
| 354 | .num_mgrs = 3, | 358 | .num_mgrs = 3, |
| 355 | .num_ovls = 3, | 359 | .num_ovls = 3, |
diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h index 3058e24946a..5be8103a159 100644 --- a/drivers/video/omap2/dss/dss_features.h +++ b/drivers/video/omap2/dss/dss_features.h | |||
| @@ -52,6 +52,9 @@ enum dss_feat_id { | |||
| 52 | FEAT_HANDLE_UV_SEPARATE = 1 << 20, | 52 | FEAT_HANDLE_UV_SEPARATE = 1 << 20, |
| 53 | FEAT_ATTR2 = 1 << 21, | 53 | FEAT_ATTR2 = 1 << 21, |
| 54 | FEAT_VENC_REQUIRES_TV_DAC_CLK = 1 << 22, | 54 | FEAT_VENC_REQUIRES_TV_DAC_CLK = 1 << 22, |
| 55 | FEAT_CPR = 1 << 23, | ||
| 56 | FEAT_PRELOAD = 1 << 24, | ||
| 57 | FEAT_FIR_COEF_V = 1 << 25, | ||
| 55 | }; | 58 | }; |
| 56 | 59 | ||
| 57 | /* DSS register field id */ | 60 | /* DSS register field id */ |
diff --git a/drivers/video/omap2/dss/overlay.c b/drivers/video/omap2/dss/overlay.c index 0f08025b1f0..cfbfc57e958 100644 --- a/drivers/video/omap2/dss/overlay.c +++ b/drivers/video/omap2/dss/overlay.c | |||
| @@ -238,6 +238,9 @@ static ssize_t overlay_global_alpha_store(struct omap_overlay *ovl, | |||
| 238 | u8 alpha; | 238 | u8 alpha; |
| 239 | struct omap_overlay_info info; | 239 | struct omap_overlay_info info; |
| 240 | 240 | ||
| 241 | if (!dss_has_feature(FEAT_GLOBAL_ALPHA)) | ||
| 242 | return -ENODEV; | ||
| 243 | |||
| 241 | r = kstrtou8(buf, 0, &alpha); | 244 | r = kstrtou8(buf, 0, &alpha); |
| 242 | if (r) | 245 | if (r) |
| 243 | return r; | 246 | return r; |
