diff options
author | Archit Taneja <archit@ti.com> | 2011-04-12 04:22:23 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-05-11 07:19:27 -0400 |
commit | 89a35e5170fc579e4fc3a1f3444c5dc1aa36904d (patch) | |
tree | 92e23633ac8b048ec8e8ae076457519e439cc066 /drivers/video/omap2/dss/dss.c | |
parent | 14e4d78485a50312be72a42fd42a28b5b34264dc (diff) |
OMAP2PLUS: DSS2: Change enum "dss_clk_source" to "omap_dss_clk_source"
Change enum dss_clk_source to omap_dss_clock_source and move it to
'plat/display.h'. Change the enum members to attach "OMAP_" in the beginning.
These changes are done in order to specify the clock sources for DSS in the
board file.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dss.c')
-rw-r--r-- | drivers/video/omap2/dss/dss.c | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 702874a2c66..10ed2b2cc72 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c | |||
@@ -75,17 +75,17 @@ static struct { | |||
75 | struct dss_clock_info cache_dss_cinfo; | 75 | struct dss_clock_info cache_dss_cinfo; |
76 | struct dispc_clock_info cache_dispc_cinfo; | 76 | struct dispc_clock_info cache_dispc_cinfo; |
77 | 77 | ||
78 | enum dss_clk_source dsi_clk_source; | 78 | enum omap_dss_clk_source dsi_clk_source; |
79 | enum dss_clk_source dispc_clk_source; | 79 | enum omap_dss_clk_source dispc_clk_source; |
80 | enum dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS]; | 80 | enum omap_dss_clk_source lcd_clk_source[MAX_DSS_LCD_MANAGERS]; |
81 | 81 | ||
82 | u32 ctx[DSS_SZ_REGS / sizeof(u32)]; | 82 | u32 ctx[DSS_SZ_REGS / sizeof(u32)]; |
83 | } dss; | 83 | } dss; |
84 | 84 | ||
85 | static const char * const dss_generic_clk_source_names[] = { | 85 | static const char * const dss_generic_clk_source_names[] = { |
86 | [DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI_PLL_HSDIV_DISPC", | 86 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI_PLL_HSDIV_DISPC", |
87 | [DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI_PLL_HSDIV_DSI", | 87 | [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI_PLL_HSDIV_DSI", |
88 | [DSS_CLK_SRC_FCK] = "DSS_FCK", | 88 | [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCK", |
89 | }; | 89 | }; |
90 | 90 | ||
91 | static void dss_clk_enable_all_no_ctx(void); | 91 | static void dss_clk_enable_all_no_ctx(void); |
@@ -230,7 +230,7 @@ void dss_sdi_disable(void) | |||
230 | REG_FLD_MOD(DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */ | 230 | REG_FLD_MOD(DSS_PLL_CONTROL, 0, 18, 18); /* SDI_PLL_SYSRESET */ |
231 | } | 231 | } |
232 | 232 | ||
233 | const char *dss_get_generic_clk_source_name(enum dss_clk_source clk_src) | 233 | const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src) |
234 | { | 234 | { |
235 | return dss_generic_clk_source_names[clk_src]; | 235 | return dss_generic_clk_source_names[clk_src]; |
236 | } | 236 | } |
@@ -246,8 +246,8 @@ void dss_dump_clocks(struct seq_file *s) | |||
246 | 246 | ||
247 | seq_printf(s, "- DSS -\n"); | 247 | seq_printf(s, "- DSS -\n"); |
248 | 248 | ||
249 | fclk_name = dss_get_generic_clk_source_name(DSS_CLK_SRC_FCK); | 249 | fclk_name = dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_FCK); |
250 | fclk_real_name = dss_feat_get_clk_source_name(DSS_CLK_SRC_FCK); | 250 | fclk_real_name = dss_feat_get_clk_source_name(OMAP_DSS_CLK_SRC_FCK); |
251 | fclk_rate = dss_clk_get_rate(DSS_CLK_FCK); | 251 | fclk_rate = dss_clk_get_rate(DSS_CLK_FCK); |
252 | 252 | ||
253 | if (dss.dpll4_m4_ck) { | 253 | if (dss.dpll4_m4_ck) { |
@@ -300,16 +300,16 @@ void dss_dump_regs(struct seq_file *s) | |||
300 | #undef DUMPREG | 300 | #undef DUMPREG |
301 | } | 301 | } |
302 | 302 | ||
303 | void dss_select_dispc_clk_source(enum dss_clk_source clk_src) | 303 | void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src) |
304 | { | 304 | { |
305 | int b; | 305 | int b; |
306 | u8 start, end; | 306 | u8 start, end; |
307 | 307 | ||
308 | switch (clk_src) { | 308 | switch (clk_src) { |
309 | case DSS_CLK_SRC_FCK: | 309 | case OMAP_DSS_CLK_SRC_FCK: |
310 | b = 0; | 310 | b = 0; |
311 | break; | 311 | break; |
312 | case DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC: | 312 | case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC: |
313 | b = 1; | 313 | b = 1; |
314 | dsi_wait_pll_hsdiv_dispc_active(); | 314 | dsi_wait_pll_hsdiv_dispc_active(); |
315 | break; | 315 | break; |
@@ -324,15 +324,15 @@ void dss_select_dispc_clk_source(enum dss_clk_source clk_src) | |||
324 | dss.dispc_clk_source = clk_src; | 324 | dss.dispc_clk_source = clk_src; |
325 | } | 325 | } |
326 | 326 | ||
327 | void dss_select_dsi_clk_source(enum dss_clk_source clk_src) | 327 | void dss_select_dsi_clk_source(enum omap_dss_clk_source clk_src) |
328 | { | 328 | { |
329 | int b; | 329 | int b; |
330 | 330 | ||
331 | switch (clk_src) { | 331 | switch (clk_src) { |
332 | case DSS_CLK_SRC_FCK: | 332 | case OMAP_DSS_CLK_SRC_FCK: |
333 | b = 0; | 333 | b = 0; |
334 | break; | 334 | break; |
335 | case DSS_CLK_SRC_DSI_PLL_HSDIV_DSI: | 335 | case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI: |
336 | b = 1; | 336 | b = 1; |
337 | dsi_wait_pll_hsdiv_dsi_active(); | 337 | dsi_wait_pll_hsdiv_dsi_active(); |
338 | break; | 338 | break; |
@@ -346,7 +346,7 @@ void dss_select_dsi_clk_source(enum dss_clk_source clk_src) | |||
346 | } | 346 | } |
347 | 347 | ||
348 | void dss_select_lcd_clk_source(enum omap_channel channel, | 348 | void dss_select_lcd_clk_source(enum omap_channel channel, |
349 | enum dss_clk_source clk_src) | 349 | enum omap_dss_clk_source clk_src) |
350 | { | 350 | { |
351 | int b, ix, pos; | 351 | int b, ix, pos; |
352 | 352 | ||
@@ -354,10 +354,10 @@ void dss_select_lcd_clk_source(enum omap_channel channel, | |||
354 | return; | 354 | return; |
355 | 355 | ||
356 | switch (clk_src) { | 356 | switch (clk_src) { |
357 | case DSS_CLK_SRC_FCK: | 357 | case OMAP_DSS_CLK_SRC_FCK: |
358 | b = 0; | 358 | b = 0; |
359 | break; | 359 | break; |
360 | case DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC: | 360 | case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC: |
361 | BUG_ON(channel != OMAP_DSS_CHANNEL_LCD); | 361 | BUG_ON(channel != OMAP_DSS_CHANNEL_LCD); |
362 | b = 1; | 362 | b = 1; |
363 | dsi_wait_pll_hsdiv_dispc_active(); | 363 | dsi_wait_pll_hsdiv_dispc_active(); |
@@ -373,17 +373,17 @@ void dss_select_lcd_clk_source(enum omap_channel channel, | |||
373 | dss.lcd_clk_source[ix] = clk_src; | 373 | dss.lcd_clk_source[ix] = clk_src; |
374 | } | 374 | } |
375 | 375 | ||
376 | enum dss_clk_source dss_get_dispc_clk_source(void) | 376 | enum omap_dss_clk_source dss_get_dispc_clk_source(void) |
377 | { | 377 | { |
378 | return dss.dispc_clk_source; | 378 | return dss.dispc_clk_source; |
379 | } | 379 | } |
380 | 380 | ||
381 | enum dss_clk_source dss_get_dsi_clk_source(void) | 381 | enum omap_dss_clk_source dss_get_dsi_clk_source(void) |
382 | { | 382 | { |
383 | return dss.dsi_clk_source; | 383 | return dss.dsi_clk_source; |
384 | } | 384 | } |
385 | 385 | ||
386 | enum dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel) | 386 | enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel) |
387 | { | 387 | { |
388 | if (dss_has_feature(FEAT_LCD_CLK_SRC)) { | 388 | if (dss_has_feature(FEAT_LCD_CLK_SRC)) { |
389 | int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; | 389 | int ix = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 1; |
@@ -711,10 +711,10 @@ static int dss_init(void) | |||
711 | 711 | ||
712 | dss.dpll4_m4_ck = dpll4_m4_ck; | 712 | dss.dpll4_m4_ck = dpll4_m4_ck; |
713 | 713 | ||
714 | dss.dsi_clk_source = DSS_CLK_SRC_FCK; | 714 | dss.dsi_clk_source = OMAP_DSS_CLK_SRC_FCK; |
715 | dss.dispc_clk_source = DSS_CLK_SRC_FCK; | 715 | dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK; |
716 | dss.lcd_clk_source[0] = DSS_CLK_SRC_FCK; | 716 | dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK; |
717 | dss.lcd_clk_source[1] = DSS_CLK_SRC_FCK; | 717 | dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK; |
718 | 718 | ||
719 | dss_save_context(); | 719 | dss_save_context(); |
720 | 720 | ||