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authorTomi Valkeinen <tomi.valkeinen@ti.com>2011-10-13 04:22:39 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-12-02 01:54:16 -0500
commit48368395f670ac8cc60288674de940a38693412e (patch)
tree93e41b75ffa33b37dde01716b3b6f92a107a6516 /drivers/video/omap2/dss/dsi.c
parent739a7f46cbf6dc3d4f899e4b566196d99403457a (diff)
OMAPDSS: DSI: Use new lane config in dsi_set_lane_config
Use the new lane config in dsi_set_lane_config(). Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dsi.c')
-rw-r--r--drivers/video/omap2/dss/dsi.c84
1 files changed, 40 insertions, 44 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index aea110c9d63..ba8d6b328a3 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -2154,59 +2154,53 @@ static int dsi_parse_lane_config(struct omap_dss_device *dssdev)
2154 return 0; 2154 return 0;
2155} 2155}
2156 2156
2157static void dsi_set_lane_config(struct omap_dss_device *dssdev) 2157static int dsi_set_lane_config(struct omap_dss_device *dssdev)
2158{ 2158{
2159 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev); 2159 struct platform_device *dsidev = dsi_get_dsidev_from_dssdev(dssdev);
2160 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
2161 static const u8 offsets[] = { 0, 4, 8, 12, 16 };
2162 static const enum dsi_lane_function functions[] = {
2163 DSI_LANE_CLK,
2164 DSI_LANE_DATA1,
2165 DSI_LANE_DATA2,
2166 DSI_LANE_DATA3,
2167 DSI_LANE_DATA4,
2168 };
2160 u32 r; 2169 u32 r;
2161 int num_lanes_used = dsi_get_num_lanes_used(dssdev); 2170 int i;
2162
2163 int clk_lane = dssdev->phy.dsi.clk_lane;
2164 int data1_lane = dssdev->phy.dsi.data1_lane;
2165 int data2_lane = dssdev->phy.dsi.data2_lane;
2166 int clk_pol = dssdev->phy.dsi.clk_pol;
2167 int data1_pol = dssdev->phy.dsi.data1_pol;
2168 int data2_pol = dssdev->phy.dsi.data2_pol;
2169 2171
2170 r = dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG1); 2172 r = dsi_read_reg(dsidev, DSI_COMPLEXIO_CFG1);
2171 r = FLD_MOD(r, clk_lane, 2, 0); 2173
2172 r = FLD_MOD(r, clk_pol, 3, 3); 2174 for (i = 0; i < dsi->num_lanes_used; ++i) {
2173 r = FLD_MOD(r, data1_lane, 6, 4); 2175 unsigned offset = offsets[i];
2174 r = FLD_MOD(r, data1_pol, 7, 7); 2176 unsigned polarity, lane_number;
2175 r = FLD_MOD(r, data2_lane, 10, 8); 2177 unsigned t;
2176 r = FLD_MOD(r, data2_pol, 11, 11); 2178
2177 if (num_lanes_used > 3) { 2179 for (t = 0; t < dsi->num_lanes_supported; ++t)
2178 int data3_lane = dssdev->phy.dsi.data3_lane; 2180 if (dsi->lanes[t].function == functions[i])
2179 int data3_pol = dssdev->phy.dsi.data3_pol; 2181 break;
2180 2182
2181 r = FLD_MOD(r, data3_lane, 14, 12); 2183 if (t == dsi->num_lanes_supported)
2182 r = FLD_MOD(r, data3_pol, 15, 15); 2184 return -EINVAL;
2185
2186 lane_number = t;
2187 polarity = dsi->lanes[t].polarity;
2188
2189 r = FLD_MOD(r, lane_number + 1, offset + 2, offset);
2190 r = FLD_MOD(r, polarity, offset + 3, offset + 3);
2183 } 2191 }
2184 if (num_lanes_used > 4) {
2185 int data4_lane = dssdev->phy.dsi.data4_lane;
2186 int data4_pol = dssdev->phy.dsi.data4_pol;
2187 2192
2188 r = FLD_MOD(r, data4_lane, 18, 16); 2193 /* clear the unused lanes */
2189 r = FLD_MOD(r, data4_pol, 19, 19); 2194 for (; i < dsi->num_lanes_supported; ++i) {
2195 unsigned offset = offsets[i];
2196
2197 r = FLD_MOD(r, 0, offset + 2, offset);
2198 r = FLD_MOD(r, 0, offset + 3, offset + 3);
2190 } 2199 }
2191 dsi_write_reg(dsidev, DSI_COMPLEXIO_CFG1, r);
2192 2200
2193 /* The configuration of the DSI complex I/O (number of data lanes, 2201 dsi_write_reg(dsidev, DSI_COMPLEXIO_CFG1, r);
2194 position, differential order) should not be changed while
2195 DSS.DSI_CLK_CRTRL[20] LP_CLK_ENABLE bit is set to 1. In order for
2196 the hardware to take into account a new configuration of the complex
2197 I/O (done in DSS.DSI_COMPLEXIO_CFG1 register), it is recommended to
2198 follow this sequence: First set the DSS.DSI_CTRL[0] IF_EN bit to 1,
2199 then reset the DSS.DSI_CTRL[0] IF_EN to 0, then set
2200 DSS.DSI_CLK_CTRL[20] LP_CLK_ENABLE to 1 and finally set again the
2201 DSS.DSI_CTRL[0] IF_EN bit to 1. If the sequence is not followed, the
2202 DSI complex I/O configuration is unknown. */
2203 2202
2204 /* 2203 return 0;
2205 REG_FLD_MOD(dsidev, DSI_CTRL, 1, 0, 0);
2206 REG_FLD_MOD(dsidev, DSI_CTRL, 0, 0, 0);
2207 REG_FLD_MOD(dsidev, DSI_CLK_CTRL, 1, 20, 20);
2208 REG_FLD_MOD(dsidev, DSI_CTRL, 1, 0, 0);
2209 */
2210} 2204}
2211 2205
2212static inline unsigned ns2ddr(struct platform_device *dsidev, unsigned ns) 2206static inline unsigned ns2ddr(struct platform_device *dsidev, unsigned ns)
@@ -2473,7 +2467,9 @@ static int dsi_cio_init(struct omap_dss_device *dssdev)
2473 goto err_scp_clk_dom; 2467 goto err_scp_clk_dom;
2474 } 2468 }
2475 2469
2476 dsi_set_lane_config(dssdev); 2470 r = dsi_set_lane_config(dssdev);
2471 if (r)
2472 goto err_scp_clk_dom;
2477 2473
2478 /* set TX STOP MODE timer to maximum for this operation */ 2474 /* set TX STOP MODE timer to maximum for this operation */
2479 l = dsi_read_reg(dsidev, DSI_TIMING1); 2475 l = dsi_read_reg(dsidev, DSI_TIMING1);