diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-08-16 06:25:00 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-09-30 09:16:23 -0400 |
commit | f0e5caab9771173a6c7a47add4b2e5174c7f11bb (patch) | |
tree | e9cd424c171fac6ab50cde6b6bf80074698a028d /drivers/video/omap2/dss/dispc.c | |
parent | 3375483e91fd7a3fc0f0ab79f279014c45d8e07f (diff) |
OMAP: DSS2: DISPC: rename overlay related funcs
Rename dispc's overlay related functions as follows:
- Remove prepending underscores, which were originally used to inform
that the clocks needs to be enabled. This meaning is no longer valid.
- Prepend the functions with dispc_ovl_*
- Remove "plane" from the name, e.g. dispc_set_plane_ba0 ->
dispc_ovl_set_ba0
The idea is to group overlay related functions so that it can be deduced
from the function name that it writes to overlay spesific registers.
All dispc_ovl_* functions have enum omap_plane as the first parameter.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dispc.c')
-rw-r--r-- | drivers/video/omap2/dss/dispc.c | 152 |
1 files changed, 78 insertions, 74 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 343b99acf52..9be78f7737e 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c | |||
@@ -480,43 +480,44 @@ void dispc_go(enum omap_channel channel) | |||
480 | REG_FLD_MOD(DISPC_CONTROL, 1, bit, bit); | 480 | REG_FLD_MOD(DISPC_CONTROL, 1, bit, bit); |
481 | } | 481 | } |
482 | 482 | ||
483 | static void _dispc_write_firh_reg(enum omap_plane plane, int reg, u32 value) | 483 | static void dispc_ovl_write_firh_reg(enum omap_plane plane, int reg, u32 value) |
484 | { | 484 | { |
485 | dispc_write_reg(DISPC_OVL_FIR_COEF_H(plane, reg), value); | 485 | dispc_write_reg(DISPC_OVL_FIR_COEF_H(plane, reg), value); |
486 | } | 486 | } |
487 | 487 | ||
488 | static void _dispc_write_firhv_reg(enum omap_plane plane, int reg, u32 value) | 488 | static void dispc_ovl_write_firhv_reg(enum omap_plane plane, int reg, u32 value) |
489 | { | 489 | { |
490 | dispc_write_reg(DISPC_OVL_FIR_COEF_HV(plane, reg), value); | 490 | dispc_write_reg(DISPC_OVL_FIR_COEF_HV(plane, reg), value); |
491 | } | 491 | } |
492 | 492 | ||
493 | static void _dispc_write_firv_reg(enum omap_plane plane, int reg, u32 value) | 493 | static void dispc_ovl_write_firv_reg(enum omap_plane plane, int reg, u32 value) |
494 | { | 494 | { |
495 | dispc_write_reg(DISPC_OVL_FIR_COEF_V(plane, reg), value); | 495 | dispc_write_reg(DISPC_OVL_FIR_COEF_V(plane, reg), value); |
496 | } | 496 | } |
497 | 497 | ||
498 | static void _dispc_write_firh2_reg(enum omap_plane plane, int reg, u32 value) | 498 | static void dispc_ovl_write_firh2_reg(enum omap_plane plane, int reg, u32 value) |
499 | { | 499 | { |
500 | BUG_ON(plane == OMAP_DSS_GFX); | 500 | BUG_ON(plane == OMAP_DSS_GFX); |
501 | 501 | ||
502 | dispc_write_reg(DISPC_OVL_FIR_COEF_H2(plane, reg), value); | 502 | dispc_write_reg(DISPC_OVL_FIR_COEF_H2(plane, reg), value); |
503 | } | 503 | } |
504 | 504 | ||
505 | static void _dispc_write_firhv2_reg(enum omap_plane plane, int reg, u32 value) | 505 | static void dispc_ovl_write_firhv2_reg(enum omap_plane plane, int reg, |
506 | u32 value) | ||
506 | { | 507 | { |
507 | BUG_ON(plane == OMAP_DSS_GFX); | 508 | BUG_ON(plane == OMAP_DSS_GFX); |
508 | 509 | ||
509 | dispc_write_reg(DISPC_OVL_FIR_COEF_HV2(plane, reg), value); | 510 | dispc_write_reg(DISPC_OVL_FIR_COEF_HV2(plane, reg), value); |
510 | } | 511 | } |
511 | 512 | ||
512 | static void _dispc_write_firv2_reg(enum omap_plane plane, int reg, u32 value) | 513 | static void dispc_ovl_write_firv2_reg(enum omap_plane plane, int reg, u32 value) |
513 | { | 514 | { |
514 | BUG_ON(plane == OMAP_DSS_GFX); | 515 | BUG_ON(plane == OMAP_DSS_GFX); |
515 | 516 | ||
516 | dispc_write_reg(DISPC_OVL_FIR_COEF_V2(plane, reg), value); | 517 | dispc_write_reg(DISPC_OVL_FIR_COEF_V2(plane, reg), value); |
517 | } | 518 | } |
518 | 519 | ||
519 | static void _dispc_set_scale_coef(enum omap_plane plane, int hscaleup, | 520 | static void dispc_ovl_set_scale_coef(enum omap_plane plane, int hscaleup, |
520 | int vscaleup, int five_taps, | 521 | int vscaleup, int five_taps, |
521 | enum omap_color_component color_comp) | 522 | enum omap_color_component color_comp) |
522 | { | 523 | { |
@@ -617,11 +618,11 @@ static void _dispc_set_scale_coef(enum omap_plane plane, int hscaleup, | |||
617 | | FLD_VAL(v_coef[i].vc2, 31, 24); | 618 | | FLD_VAL(v_coef[i].vc2, 31, 24); |
618 | 619 | ||
619 | if (color_comp == DISPC_COLOR_COMPONENT_RGB_Y) { | 620 | if (color_comp == DISPC_COLOR_COMPONENT_RGB_Y) { |
620 | _dispc_write_firh_reg(plane, i, h); | 621 | dispc_ovl_write_firh_reg(plane, i, h); |
621 | _dispc_write_firhv_reg(plane, i, hv); | 622 | dispc_ovl_write_firhv_reg(plane, i, hv); |
622 | } else { | 623 | } else { |
623 | _dispc_write_firh2_reg(plane, i, h); | 624 | dispc_ovl_write_firh2_reg(plane, i, h); |
624 | _dispc_write_firhv2_reg(plane, i, hv); | 625 | dispc_ovl_write_firhv2_reg(plane, i, hv); |
625 | } | 626 | } |
626 | 627 | ||
627 | } | 628 | } |
@@ -632,9 +633,9 @@ static void _dispc_set_scale_coef(enum omap_plane plane, int hscaleup, | |||
632 | v = FLD_VAL(v_coef[i].vc00, 7, 0) | 633 | v = FLD_VAL(v_coef[i].vc00, 7, 0) |
633 | | FLD_VAL(v_coef[i].vc22, 15, 8); | 634 | | FLD_VAL(v_coef[i].vc22, 15, 8); |
634 | if (color_comp == DISPC_COLOR_COMPONENT_RGB_Y) | 635 | if (color_comp == DISPC_COLOR_COMPONENT_RGB_Y) |
635 | _dispc_write_firv_reg(plane, i, v); | 636 | dispc_ovl_write_firv_reg(plane, i, v); |
636 | else | 637 | else |
637 | _dispc_write_firv2_reg(plane, i, v); | 638 | dispc_ovl_write_firv2_reg(plane, i, v); |
638 | } | 639 | } |
639 | } | 640 | } |
640 | } | 641 | } |
@@ -675,34 +676,34 @@ static void _dispc_setup_color_conv_coef(void) | |||
675 | } | 676 | } |
676 | 677 | ||
677 | 678 | ||
678 | static void _dispc_set_plane_ba0(enum omap_plane plane, u32 paddr) | 679 | static void dispc_ovl_set_ba0(enum omap_plane plane, u32 paddr) |
679 | { | 680 | { |
680 | dispc_write_reg(DISPC_OVL_BA0(plane), paddr); | 681 | dispc_write_reg(DISPC_OVL_BA0(plane), paddr); |
681 | } | 682 | } |
682 | 683 | ||
683 | static void _dispc_set_plane_ba1(enum omap_plane plane, u32 paddr) | 684 | static void dispc_ovl_set_ba1(enum omap_plane plane, u32 paddr) |
684 | { | 685 | { |
685 | dispc_write_reg(DISPC_OVL_BA1(plane), paddr); | 686 | dispc_write_reg(DISPC_OVL_BA1(plane), paddr); |
686 | } | 687 | } |
687 | 688 | ||
688 | static void _dispc_set_plane_ba0_uv(enum omap_plane plane, u32 paddr) | 689 | static void dispc_ovl_set_ba0_uv(enum omap_plane plane, u32 paddr) |
689 | { | 690 | { |
690 | dispc_write_reg(DISPC_OVL_BA0_UV(plane), paddr); | 691 | dispc_write_reg(DISPC_OVL_BA0_UV(plane), paddr); |
691 | } | 692 | } |
692 | 693 | ||
693 | static void _dispc_set_plane_ba1_uv(enum omap_plane plane, u32 paddr) | 694 | static void dispc_ovl_set_ba1_uv(enum omap_plane plane, u32 paddr) |
694 | { | 695 | { |
695 | dispc_write_reg(DISPC_OVL_BA1_UV(plane), paddr); | 696 | dispc_write_reg(DISPC_OVL_BA1_UV(plane), paddr); |
696 | } | 697 | } |
697 | 698 | ||
698 | static void _dispc_set_plane_pos(enum omap_plane plane, int x, int y) | 699 | static void dispc_ovl_set_pos(enum omap_plane plane, int x, int y) |
699 | { | 700 | { |
700 | u32 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); | 701 | u32 val = FLD_VAL(y, 26, 16) | FLD_VAL(x, 10, 0); |
701 | 702 | ||
702 | dispc_write_reg(DISPC_OVL_POSITION(plane), val); | 703 | dispc_write_reg(DISPC_OVL_POSITION(plane), val); |
703 | } | 704 | } |
704 | 705 | ||
705 | static void _dispc_set_pic_size(enum omap_plane plane, int width, int height) | 706 | static void dispc_ovl_set_pic_size(enum omap_plane plane, int width, int height) |
706 | { | 707 | { |
707 | u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); | 708 | u32 val = FLD_VAL(height - 1, 26, 16) | FLD_VAL(width - 1, 10, 0); |
708 | 709 | ||
@@ -712,7 +713,7 @@ static void _dispc_set_pic_size(enum omap_plane plane, int width, int height) | |||
712 | dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); | 713 | dispc_write_reg(DISPC_OVL_PICTURE_SIZE(plane), val); |
713 | } | 714 | } |
714 | 715 | ||
715 | static void _dispc_set_vid_size(enum omap_plane plane, int width, int height) | 716 | static void dispc_ovl_set_vid_size(enum omap_plane plane, int width, int height) |
716 | { | 717 | { |
717 | u32 val; | 718 | u32 val; |
718 | 719 | ||
@@ -723,7 +724,7 @@ static void _dispc_set_vid_size(enum omap_plane plane, int width, int height) | |||
723 | dispc_write_reg(DISPC_OVL_SIZE(plane), val); | 724 | dispc_write_reg(DISPC_OVL_SIZE(plane), val); |
724 | } | 725 | } |
725 | 726 | ||
726 | static void _dispc_set_pre_mult_alpha(enum omap_plane plane, bool enable) | 727 | static void dispc_ovl_set_pre_mult_alpha(enum omap_plane plane, bool enable) |
727 | { | 728 | { |
728 | struct omap_overlay *ovl = omap_dss_get_overlay(plane); | 729 | struct omap_overlay *ovl = omap_dss_get_overlay(plane); |
729 | 730 | ||
@@ -733,7 +734,7 @@ static void _dispc_set_pre_mult_alpha(enum omap_plane plane, bool enable) | |||
733 | REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 28, 28); | 734 | REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), enable ? 1 : 0, 28, 28); |
734 | } | 735 | } |
735 | 736 | ||
736 | static void _dispc_setup_global_alpha(enum omap_plane plane, u8 global_alpha) | 737 | static void dispc_ovl_setup_global_alpha(enum omap_plane plane, u8 global_alpha) |
737 | { | 738 | { |
738 | static const unsigned shifts[] = { 0, 8, 16, }; | 739 | static const unsigned shifts[] = { 0, 8, 16, }; |
739 | int shift; | 740 | int shift; |
@@ -746,17 +747,17 @@ static void _dispc_setup_global_alpha(enum omap_plane plane, u8 global_alpha) | |||
746 | REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, shift + 7, shift); | 747 | REG_FLD_MOD(DISPC_GLOBAL_ALPHA, global_alpha, shift + 7, shift); |
747 | } | 748 | } |
748 | 749 | ||
749 | static void _dispc_set_pix_inc(enum omap_plane plane, s32 inc) | 750 | static void dispc_ovl_set_pix_inc(enum omap_plane plane, s32 inc) |
750 | { | 751 | { |
751 | dispc_write_reg(DISPC_OVL_PIXEL_INC(plane), inc); | 752 | dispc_write_reg(DISPC_OVL_PIXEL_INC(plane), inc); |
752 | } | 753 | } |
753 | 754 | ||
754 | static void _dispc_set_row_inc(enum omap_plane plane, s32 inc) | 755 | static void dispc_ovl_set_row_inc(enum omap_plane plane, s32 inc) |
755 | { | 756 | { |
756 | dispc_write_reg(DISPC_OVL_ROW_INC(plane), inc); | 757 | dispc_write_reg(DISPC_OVL_ROW_INC(plane), inc); |
757 | } | 758 | } |
758 | 759 | ||
759 | static void _dispc_set_color_mode(enum omap_plane plane, | 760 | static void dispc_ovl_set_color_mode(enum omap_plane plane, |
760 | enum omap_color_mode color_mode) | 761 | enum omap_color_mode color_mode) |
761 | { | 762 | { |
762 | u32 m = 0; | 763 | u32 m = 0; |
@@ -837,7 +838,7 @@ static void _dispc_set_color_mode(enum omap_plane plane, | |||
837 | REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); | 838 | REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), m, 4, 1); |
838 | } | 839 | } |
839 | 840 | ||
840 | static void dispc_set_channel_out(enum omap_plane plane, | 841 | static void dispc_ovl_set_channel_out(enum omap_plane plane, |
841 | enum omap_channel channel) | 842 | enum omap_channel channel) |
842 | { | 843 | { |
843 | int shift; | 844 | int shift; |
@@ -884,7 +885,7 @@ static void dispc_set_channel_out(enum omap_plane plane, | |||
884 | dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); | 885 | dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); |
885 | } | 886 | } |
886 | 887 | ||
887 | static void dispc_set_burst_size(enum omap_plane plane, | 888 | static void dispc_ovl_set_burst_size(enum omap_plane plane, |
888 | enum omap_burst_size burst_size) | 889 | enum omap_burst_size burst_size) |
889 | { | 890 | { |
890 | static const unsigned shifts[] = { 6, 14, 14, }; | 891 | static const unsigned shifts[] = { 6, 14, 14, }; |
@@ -901,10 +902,10 @@ static void dispc_configure_burst_sizes(void) | |||
901 | 902 | ||
902 | /* Configure burst size always to maximum size */ | 903 | /* Configure burst size always to maximum size */ |
903 | for (i = 0; i < omap_dss_get_num_overlays(); ++i) | 904 | for (i = 0; i < omap_dss_get_num_overlays(); ++i) |
904 | dispc_set_burst_size(i, burst_size); | 905 | dispc_ovl_set_burst_size(i, burst_size); |
905 | } | 906 | } |
906 | 907 | ||
907 | u32 dispc_get_burst_size(enum omap_plane plane) | 908 | u32 dispc_ovl_get_burst_size(enum omap_plane plane) |
908 | { | 909 | { |
909 | unsigned unit = dss_feat_get_burst_size_unit(); | 910 | unsigned unit = dss_feat_get_burst_size_unit(); |
910 | /* burst multiplier is always x8 (see dispc_configure_burst_sizes()) */ | 911 | /* burst multiplier is always x8 (see dispc_configure_burst_sizes()) */ |
@@ -959,7 +960,7 @@ void dispc_set_cpr_coef(enum omap_channel channel, | |||
959 | dispc_write_reg(DISPC_CPR_COEF_B(channel), coef_b); | 960 | dispc_write_reg(DISPC_CPR_COEF_B(channel), coef_b); |
960 | } | 961 | } |
961 | 962 | ||
962 | static void _dispc_set_vid_color_conv(enum omap_plane plane, bool enable) | 963 | static void dispc_ovl_set_vid_color_conv(enum omap_plane plane, bool enable) |
963 | { | 964 | { |
964 | u32 val; | 965 | u32 val; |
965 | 966 | ||
@@ -970,7 +971,7 @@ static void _dispc_set_vid_color_conv(enum omap_plane plane, bool enable) | |||
970 | dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); | 971 | dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); |
971 | } | 972 | } |
972 | 973 | ||
973 | void dispc_enable_replication(enum omap_plane plane, bool enable) | 974 | void dispc_ovl_enable_replication(enum omap_plane plane, bool enable) |
974 | { | 975 | { |
975 | static const unsigned shifts[] = { 5, 10, 10 }; | 976 | static const unsigned shifts[] = { 5, 10, 10 }; |
976 | int shift; | 977 | int shift; |
@@ -1013,12 +1014,12 @@ static void dispc_read_plane_fifo_sizes(void) | |||
1013 | } | 1014 | } |
1014 | } | 1015 | } |
1015 | 1016 | ||
1016 | u32 dispc_get_plane_fifo_size(enum omap_plane plane) | 1017 | u32 dispc_ovl_get_fifo_size(enum omap_plane plane) |
1017 | { | 1018 | { |
1018 | return dispc.fifo_size[plane]; | 1019 | return dispc.fifo_size[plane]; |
1019 | } | 1020 | } |
1020 | 1021 | ||
1021 | void dispc_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) | 1022 | void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) |
1022 | { | 1023 | { |
1023 | u8 hi_start, hi_end, lo_start, lo_end; | 1024 | u8 hi_start, hi_end, lo_start, lo_end; |
1024 | u32 unit; | 1025 | u32 unit; |
@@ -1053,7 +1054,7 @@ void dispc_enable_fifomerge(bool enable) | |||
1053 | REG_FLD_MOD(DISPC_CONFIG, enable ? 1 : 0, 14, 14); | 1054 | REG_FLD_MOD(DISPC_CONFIG, enable ? 1 : 0, 14, 14); |
1054 | } | 1055 | } |
1055 | 1056 | ||
1056 | static void _dispc_set_fir(enum omap_plane plane, | 1057 | static void dispc_ovl_set_fir(enum omap_plane plane, |
1057 | int hinc, int vinc, | 1058 | int hinc, int vinc, |
1058 | enum omap_color_component color_comp) | 1059 | enum omap_color_component color_comp) |
1059 | { | 1060 | { |
@@ -1076,7 +1077,7 @@ static void _dispc_set_fir(enum omap_plane plane, | |||
1076 | } | 1077 | } |
1077 | } | 1078 | } |
1078 | 1079 | ||
1079 | static void _dispc_set_vid_accu0(enum omap_plane plane, int haccu, int vaccu) | 1080 | static void dispc_ovl_set_vid_accu0(enum omap_plane plane, int haccu, int vaccu) |
1080 | { | 1081 | { |
1081 | u32 val; | 1082 | u32 val; |
1082 | u8 hor_start, hor_end, vert_start, vert_end; | 1083 | u8 hor_start, hor_end, vert_start, vert_end; |
@@ -1090,7 +1091,7 @@ static void _dispc_set_vid_accu0(enum omap_plane plane, int haccu, int vaccu) | |||
1090 | dispc_write_reg(DISPC_OVL_ACCU0(plane), val); | 1091 | dispc_write_reg(DISPC_OVL_ACCU0(plane), val); |
1091 | } | 1092 | } |
1092 | 1093 | ||
1093 | static void _dispc_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu) | 1094 | static void dispc_ovl_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu) |
1094 | { | 1095 | { |
1095 | u32 val; | 1096 | u32 val; |
1096 | u8 hor_start, hor_end, vert_start, vert_end; | 1097 | u8 hor_start, hor_end, vert_start, vert_end; |
@@ -1104,7 +1105,8 @@ static void _dispc_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu) | |||
1104 | dispc_write_reg(DISPC_OVL_ACCU1(plane), val); | 1105 | dispc_write_reg(DISPC_OVL_ACCU1(plane), val); |
1105 | } | 1106 | } |
1106 | 1107 | ||
1107 | static void _dispc_set_vid_accu2_0(enum omap_plane plane, int haccu, int vaccu) | 1108 | static void dispc_ovl_set_vid_accu2_0(enum omap_plane plane, int haccu, |
1109 | int vaccu) | ||
1108 | { | 1110 | { |
1109 | u32 val; | 1111 | u32 val; |
1110 | 1112 | ||
@@ -1112,7 +1114,8 @@ static void _dispc_set_vid_accu2_0(enum omap_plane plane, int haccu, int vaccu) | |||
1112 | dispc_write_reg(DISPC_OVL_ACCU2_0(plane), val); | 1114 | dispc_write_reg(DISPC_OVL_ACCU2_0(plane), val); |
1113 | } | 1115 | } |
1114 | 1116 | ||
1115 | static void _dispc_set_vid_accu2_1(enum omap_plane plane, int haccu, int vaccu) | 1117 | static void dispc_ovl_set_vid_accu2_1(enum omap_plane plane, int haccu, |
1118 | int vaccu) | ||
1116 | { | 1119 | { |
1117 | u32 val; | 1120 | u32 val; |
1118 | 1121 | ||
@@ -1120,7 +1123,7 @@ static void _dispc_set_vid_accu2_1(enum omap_plane plane, int haccu, int vaccu) | |||
1120 | dispc_write_reg(DISPC_OVL_ACCU2_1(plane), val); | 1123 | dispc_write_reg(DISPC_OVL_ACCU2_1(plane), val); |
1121 | } | 1124 | } |
1122 | 1125 | ||
1123 | static void _dispc_set_scale_param(enum omap_plane plane, | 1126 | static void dispc_ovl_set_scale_param(enum omap_plane plane, |
1124 | u16 orig_width, u16 orig_height, | 1127 | u16 orig_width, u16 orig_height, |
1125 | u16 out_width, u16 out_height, | 1128 | u16 out_width, u16 out_height, |
1126 | bool five_taps, u8 rotation, | 1129 | bool five_taps, u8 rotation, |
@@ -1132,15 +1135,16 @@ static void _dispc_set_scale_param(enum omap_plane plane, | |||
1132 | hscaleup = orig_width <= out_width; | 1135 | hscaleup = orig_width <= out_width; |
1133 | vscaleup = orig_height <= out_height; | 1136 | vscaleup = orig_height <= out_height; |
1134 | 1137 | ||
1135 | _dispc_set_scale_coef(plane, hscaleup, vscaleup, five_taps, color_comp); | 1138 | dispc_ovl_set_scale_coef(plane, hscaleup, vscaleup, five_taps, |
1139 | color_comp); | ||
1136 | 1140 | ||
1137 | fir_hinc = 1024 * orig_width / out_width; | 1141 | fir_hinc = 1024 * orig_width / out_width; |
1138 | fir_vinc = 1024 * orig_height / out_height; | 1142 | fir_vinc = 1024 * orig_height / out_height; |
1139 | 1143 | ||
1140 | _dispc_set_fir(plane, fir_hinc, fir_vinc, color_comp); | 1144 | dispc_ovl_set_fir(plane, fir_hinc, fir_vinc, color_comp); |
1141 | } | 1145 | } |
1142 | 1146 | ||
1143 | static void _dispc_set_scaling_common(enum omap_plane plane, | 1147 | static void dispc_ovl_set_scaling_common(enum omap_plane plane, |
1144 | u16 orig_width, u16 orig_height, | 1148 | u16 orig_width, u16 orig_height, |
1145 | u16 out_width, u16 out_height, | 1149 | u16 out_width, u16 out_height, |
1146 | bool ilace, bool five_taps, | 1150 | bool ilace, bool five_taps, |
@@ -1151,7 +1155,7 @@ static void _dispc_set_scaling_common(enum omap_plane plane, | |||
1151 | int accu1 = 0; | 1155 | int accu1 = 0; |
1152 | u32 l; | 1156 | u32 l; |
1153 | 1157 | ||
1154 | _dispc_set_scale_param(plane, orig_width, orig_height, | 1158 | dispc_ovl_set_scale_param(plane, orig_width, orig_height, |
1155 | out_width, out_height, five_taps, | 1159 | out_width, out_height, five_taps, |
1156 | rotation, DISPC_COLOR_COMPONENT_RGB_Y); | 1160 | rotation, DISPC_COLOR_COMPONENT_RGB_Y); |
1157 | l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); | 1161 | l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); |
@@ -1190,11 +1194,11 @@ static void _dispc_set_scaling_common(enum omap_plane plane, | |||
1190 | } | 1194 | } |
1191 | } | 1195 | } |
1192 | 1196 | ||
1193 | _dispc_set_vid_accu0(plane, 0, accu0); | 1197 | dispc_ovl_set_vid_accu0(plane, 0, accu0); |
1194 | _dispc_set_vid_accu1(plane, 0, accu1); | 1198 | dispc_ovl_set_vid_accu1(plane, 0, accu1); |
1195 | } | 1199 | } |
1196 | 1200 | ||
1197 | static void _dispc_set_scaling_uv(enum omap_plane plane, | 1201 | static void dispc_ovl_set_scaling_uv(enum omap_plane plane, |
1198 | u16 orig_width, u16 orig_height, | 1202 | u16 orig_width, u16 orig_height, |
1199 | u16 out_width, u16 out_height, | 1203 | u16 out_width, u16 out_height, |
1200 | bool ilace, bool five_taps, | 1204 | bool ilace, bool five_taps, |
@@ -1242,7 +1246,7 @@ static void _dispc_set_scaling_uv(enum omap_plane plane, | |||
1242 | if (out_height != orig_height) | 1246 | if (out_height != orig_height) |
1243 | scale_y = true; | 1247 | scale_y = true; |
1244 | 1248 | ||
1245 | _dispc_set_scale_param(plane, orig_width, orig_height, | 1249 | dispc_ovl_set_scale_param(plane, orig_width, orig_height, |
1246 | out_width, out_height, five_taps, | 1250 | out_width, out_height, five_taps, |
1247 | rotation, DISPC_COLOR_COMPONENT_UV); | 1251 | rotation, DISPC_COLOR_COMPONENT_UV); |
1248 | 1252 | ||
@@ -1253,11 +1257,11 @@ static void _dispc_set_scaling_uv(enum omap_plane plane, | |||
1253 | /* set V scaling */ | 1257 | /* set V scaling */ |
1254 | REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6); | 1258 | REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6); |
1255 | 1259 | ||
1256 | _dispc_set_vid_accu2_0(plane, 0x80, 0); | 1260 | dispc_ovl_set_vid_accu2_0(plane, 0x80, 0); |
1257 | _dispc_set_vid_accu2_1(plane, 0x80, 0); | 1261 | dispc_ovl_set_vid_accu2_1(plane, 0x80, 0); |
1258 | } | 1262 | } |
1259 | 1263 | ||
1260 | static void _dispc_set_scaling(enum omap_plane plane, | 1264 | static void dispc_ovl_set_scaling(enum omap_plane plane, |
1261 | u16 orig_width, u16 orig_height, | 1265 | u16 orig_width, u16 orig_height, |
1262 | u16 out_width, u16 out_height, | 1266 | u16 out_width, u16 out_height, |
1263 | bool ilace, bool five_taps, | 1267 | bool ilace, bool five_taps, |
@@ -1266,14 +1270,14 @@ static void _dispc_set_scaling(enum omap_plane plane, | |||
1266 | { | 1270 | { |
1267 | BUG_ON(plane == OMAP_DSS_GFX); | 1271 | BUG_ON(plane == OMAP_DSS_GFX); |
1268 | 1272 | ||
1269 | _dispc_set_scaling_common(plane, | 1273 | dispc_ovl_set_scaling_common(plane, |
1270 | orig_width, orig_height, | 1274 | orig_width, orig_height, |
1271 | out_width, out_height, | 1275 | out_width, out_height, |
1272 | ilace, five_taps, | 1276 | ilace, five_taps, |
1273 | fieldmode, color_mode, | 1277 | fieldmode, color_mode, |
1274 | rotation); | 1278 | rotation); |
1275 | 1279 | ||
1276 | _dispc_set_scaling_uv(plane, | 1280 | dispc_ovl_set_scaling_uv(plane, |
1277 | orig_width, orig_height, | 1281 | orig_width, orig_height, |
1278 | out_width, out_height, | 1282 | out_width, out_height, |
1279 | ilace, five_taps, | 1283 | ilace, five_taps, |
@@ -1281,7 +1285,7 @@ static void _dispc_set_scaling(enum omap_plane plane, | |||
1281 | rotation); | 1285 | rotation); |
1282 | } | 1286 | } |
1283 | 1287 | ||
1284 | static void _dispc_set_rotation_attrs(enum omap_plane plane, u8 rotation, | 1288 | static void dispc_ovl_set_rotation_attrs(enum omap_plane plane, u8 rotation, |
1285 | bool mirroring, enum omap_color_mode color_mode) | 1289 | bool mirroring, enum omap_color_mode color_mode) |
1286 | { | 1290 | { |
1287 | bool row_repeat = false; | 1291 | bool row_repeat = false; |
@@ -1670,7 +1674,7 @@ static unsigned long calc_fclk(enum omap_channel channel, u16 width, | |||
1670 | return dispc_pclk_rate(channel) * vf * hf; | 1674 | return dispc_pclk_rate(channel) * vf * hf; |
1671 | } | 1675 | } |
1672 | 1676 | ||
1673 | int dispc_setup_plane(enum omap_plane plane, | 1677 | int dispc_ovl_setup(enum omap_plane plane, |
1674 | u32 paddr, u16 screen_width, | 1678 | u32 paddr, u16 screen_width, |
1675 | u16 pos_x, u16 pos_y, | 1679 | u16 pos_x, u16 pos_y, |
1676 | u16 width, u16 height, | 1680 | u16 width, u16 height, |
@@ -1692,7 +1696,7 @@ int dispc_setup_plane(enum omap_plane plane, | |||
1692 | u16 frame_height = height; | 1696 | u16 frame_height = height; |
1693 | unsigned int field_offset = 0; | 1697 | unsigned int field_offset = 0; |
1694 | 1698 | ||
1695 | DSSDBG("dispc_setup_plane %d, pa %x, sw %d, %d,%d, %dx%d -> " | 1699 | DSSDBG("dispc_ovl_setup %d, pa %x, sw %d, %d,%d, %dx%d -> " |
1696 | "%dx%d, ilace %d, cmode %x, rot %d, mir %d chan %d\n", | 1700 | "%dx%d, ilace %d, cmode %x, rot %d, mir %d chan %d\n", |
1697 | plane, paddr, screen_width, pos_x, pos_y, | 1701 | plane, paddr, screen_width, pos_x, pos_y, |
1698 | width, height, | 1702 | width, height, |
@@ -1807,47 +1811,47 @@ int dispc_setup_plane(enum omap_plane plane, | |||
1807 | DSSDBG("offset0 %u, offset1 %u, row_inc %d, pix_inc %d\n", | 1811 | DSSDBG("offset0 %u, offset1 %u, row_inc %d, pix_inc %d\n", |
1808 | offset0, offset1, row_inc, pix_inc); | 1812 | offset0, offset1, row_inc, pix_inc); |
1809 | 1813 | ||
1810 | _dispc_set_color_mode(plane, color_mode); | 1814 | dispc_ovl_set_color_mode(plane, color_mode); |
1811 | 1815 | ||
1812 | _dispc_set_plane_ba0(plane, paddr + offset0); | 1816 | dispc_ovl_set_ba0(plane, paddr + offset0); |
1813 | _dispc_set_plane_ba1(plane, paddr + offset1); | 1817 | dispc_ovl_set_ba1(plane, paddr + offset1); |
1814 | 1818 | ||
1815 | if (OMAP_DSS_COLOR_NV12 == color_mode) { | 1819 | if (OMAP_DSS_COLOR_NV12 == color_mode) { |
1816 | _dispc_set_plane_ba0_uv(plane, puv_addr + offset0); | 1820 | dispc_ovl_set_ba0_uv(plane, puv_addr + offset0); |
1817 | _dispc_set_plane_ba1_uv(plane, puv_addr + offset1); | 1821 | dispc_ovl_set_ba1_uv(plane, puv_addr + offset1); |
1818 | } | 1822 | } |
1819 | 1823 | ||
1820 | 1824 | ||
1821 | _dispc_set_row_inc(plane, row_inc); | 1825 | dispc_ovl_set_row_inc(plane, row_inc); |
1822 | _dispc_set_pix_inc(plane, pix_inc); | 1826 | dispc_ovl_set_pix_inc(plane, pix_inc); |
1823 | 1827 | ||
1824 | DSSDBG("%d,%d %dx%d -> %dx%d\n", pos_x, pos_y, width, height, | 1828 | DSSDBG("%d,%d %dx%d -> %dx%d\n", pos_x, pos_y, width, height, |
1825 | out_width, out_height); | 1829 | out_width, out_height); |
1826 | 1830 | ||
1827 | _dispc_set_plane_pos(plane, pos_x, pos_y); | 1831 | dispc_ovl_set_pos(plane, pos_x, pos_y); |
1828 | 1832 | ||
1829 | _dispc_set_pic_size(plane, width, height); | 1833 | dispc_ovl_set_pic_size(plane, width, height); |
1830 | 1834 | ||
1831 | if (plane != OMAP_DSS_GFX) { | 1835 | if (plane != OMAP_DSS_GFX) { |
1832 | _dispc_set_scaling(plane, width, height, | 1836 | dispc_ovl_set_scaling(plane, width, height, |
1833 | out_width, out_height, | 1837 | out_width, out_height, |
1834 | ilace, five_taps, fieldmode, | 1838 | ilace, five_taps, fieldmode, |
1835 | color_mode, rotation); | 1839 | color_mode, rotation); |
1836 | _dispc_set_vid_size(plane, out_width, out_height); | 1840 | dispc_ovl_set_vid_size(plane, out_width, out_height); |
1837 | _dispc_set_vid_color_conv(plane, cconv); | 1841 | dispc_ovl_set_vid_color_conv(plane, cconv); |
1838 | } | 1842 | } |
1839 | 1843 | ||
1840 | _dispc_set_rotation_attrs(plane, rotation, mirror, color_mode); | 1844 | dispc_ovl_set_rotation_attrs(plane, rotation, mirror, color_mode); |
1841 | 1845 | ||
1842 | _dispc_set_pre_mult_alpha(plane, pre_mult_alpha); | 1846 | dispc_ovl_set_pre_mult_alpha(plane, pre_mult_alpha); |
1843 | _dispc_setup_global_alpha(plane, global_alpha); | 1847 | dispc_ovl_setup_global_alpha(plane, global_alpha); |
1844 | 1848 | ||
1845 | dispc_set_channel_out(plane, channel); | 1849 | dispc_ovl_set_channel_out(plane, channel); |
1846 | 1850 | ||
1847 | return 0; | 1851 | return 0; |
1848 | } | 1852 | } |
1849 | 1853 | ||
1850 | int dispc_enable_plane(enum omap_plane plane, bool enable) | 1854 | int dispc_ovl_enable(enum omap_plane plane, bool enable) |
1851 | { | 1855 | { |
1852 | DSSDBG("dispc_enable_plane %d, %d\n", plane, enable); | 1856 | DSSDBG("dispc_enable_plane %d, %d\n", plane, enable); |
1853 | 1857 | ||
@@ -3055,7 +3059,7 @@ static void dispc_error_worker(struct work_struct *work) | |||
3055 | if (bit & errors) { | 3059 | if (bit & errors) { |
3056 | DSSERR("FIFO UNDERFLOW on %s, disabling the overlay\n", | 3060 | DSSERR("FIFO UNDERFLOW on %s, disabling the overlay\n", |
3057 | ovl->name); | 3061 | ovl->name); |
3058 | dispc_enable_plane(ovl->id, false); | 3062 | dispc_ovl_enable(ovl->id, false); |
3059 | dispc_go(ovl->manager->id); | 3063 | dispc_go(ovl->manager->id); |
3060 | mdelay(50); | 3064 | mdelay(50); |
3061 | } | 3065 | } |
@@ -3085,7 +3089,7 @@ static void dispc_error_worker(struct work_struct *work) | |||
3085 | 3089 | ||
3086 | if (ovl->id != OMAP_DSS_GFX && | 3090 | if (ovl->id != OMAP_DSS_GFX && |
3087 | ovl->manager == mgr) | 3091 | ovl->manager == mgr) |
3088 | dispc_enable_plane(ovl->id, false); | 3092 | dispc_ovl_enable(ovl->id, false); |
3089 | } | 3093 | } |
3090 | 3094 | ||
3091 | dispc_go(mgr->id); | 3095 | dispc_go(mgr->id); |