diff options
author | Anatolij Gustschin <agust@denx.de> | 2012-12-04 08:24:30 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-01-11 19:01:07 -0500 |
commit | f66dea709cd9309b2ee9f715697818001fb518de (patch) | |
tree | 76fd6dd391bac470e225e508efe0f024f5fabcb0 /drivers/usb | |
parent | 929473ea05db455ad88cdc081f2adc556b8dc48f (diff) |
USB: ehci-fsl: fix regression on mpc5121e
mpc5121e doesn't have system interface registers, accessing this
register address space cause the machine check exception and a
kernel crash:
...
Machine check in kernel mode.
Caused by (from SRR1=49030): Transfer error ack signal
Oops: Machine check, sig: 7 [#1]
MPC5121 ADS
Modules linked in:
NIP: c025fd60 LR: c0265bb4 CTR: 00000000
REGS: df82dac0 TRAP: 0200 Not tainted
(3.7.0-rc7-00641-g81e6c91)
MSR: 00049030 <EE,ME,IR,DR> CR: 42002024 XER: 20000000
TASK = df824b70[1] 'swapper' THREAD: df82c000
GPR00: 00000000 df82db70 df824b70 df3ed0f0 00000003 00000000 00000000 00000000
GPR08: 00000020 32000000 c03550ec 20000000 22002028 00000000 c0003f5c 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 c0423898 c0450000
GPR24: 00000077 00000002 e5086180 1c000c00 e5086000 df33ec00 00000003 df34e000
NIP [c025fd60] ehci_fsl_setup_phy+0xd0/0x354
LR [c0265bb4] ehci_fsl_setup+0x220/0x284
...
Fix it by checking 'have_sysif_regs' flag before register access.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb')
-rw-r--r-- | drivers/usb/host/ehci-fsl.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index fd9b5424b86..d81d2fcbff1 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c | |||
@@ -230,7 +230,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, | |||
230 | 230 | ||
231 | switch (phy_mode) { | 231 | switch (phy_mode) { |
232 | case FSL_USB2_PHY_ULPI: | 232 | case FSL_USB2_PHY_ULPI: |
233 | if (pdata->controller_ver) { | 233 | if (pdata->have_sysif_regs && pdata->controller_ver) { |
234 | /* controller version 1.6 or above */ | 234 | /* controller version 1.6 or above */ |
235 | setbits32(non_ehci + FSL_SOC_USB_CTRL, | 235 | setbits32(non_ehci + FSL_SOC_USB_CTRL, |
236 | ULPI_PHY_CLK_SEL); | 236 | ULPI_PHY_CLK_SEL); |
@@ -251,7 +251,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, | |||
251 | portsc |= PORT_PTS_PTW; | 251 | portsc |= PORT_PTS_PTW; |
252 | /* fall through */ | 252 | /* fall through */ |
253 | case FSL_USB2_PHY_UTMI: | 253 | case FSL_USB2_PHY_UTMI: |
254 | if (pdata->controller_ver) { | 254 | if (pdata->have_sysif_regs && pdata->controller_ver) { |
255 | /* controller version 1.6 or above */ | 255 | /* controller version 1.6 or above */ |
256 | setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); | 256 | setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); |
257 | mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to | 257 | mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to |
@@ -267,7 +267,8 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, | |||
267 | break; | 267 | break; |
268 | } | 268 | } |
269 | 269 | ||
270 | if (pdata->controller_ver && (phy_mode == FSL_USB2_PHY_ULPI)) { | 270 | if (pdata->have_sysif_regs && pdata->controller_ver && |
271 | (phy_mode == FSL_USB2_PHY_ULPI)) { | ||
271 | /* check PHY_CLK_VALID to get phy clk valid */ | 272 | /* check PHY_CLK_VALID to get phy clk valid */ |
272 | if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) & | 273 | if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) & |
273 | PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) { | 274 | PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) { |
@@ -278,7 +279,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, | |||
278 | 279 | ||
279 | ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); | 280 | ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); |
280 | 281 | ||
281 | if (phy_mode != FSL_USB2_PHY_ULPI) | 282 | if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs) |
282 | setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN); | 283 | setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN); |
283 | 284 | ||
284 | return 0; | 285 | return 0; |