xhci: USB 3.0 BW checking.

The Intel Panther Point xHCI host tracks SuperSpeed endpoints in a
different way than USB 2.0/1.1 endpoints.  The bandwidth interval tables
are not used, and instead the bandwidth is calculated in a very simple
way.  Bandwidth for SuperSpeed endpoints is tracked individually in each
direction, since each direction has the full USB 3.0 bandwidth available.
10% of the bus bandwidth is reserved for non-periodic transfers.

This checking would be more complex if we had USB 3.0 LPM enabled, because
an additional latency for isochronous ping times need to be taken into
account.  However, we don't have USB 3.0 LPM support in Linux yet.

Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 752a500f869..2882074eb2c 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -799,6 +799,7 @@ struct xhci_bw_info {
 /* Percentage of bus bandwidth reserved for non-periodic transfers */
 #define FS_BW_RESERVED          10
 #define HS_BW_RESERVED          20
+#define SS_BW_RESERVED          10
 
 struct xhci_virt_ep {
         struct xhci_ring                *ring;
@@ -869,6 +870,8 @@ struct xhci_interval_bw_table {
         struct xhci_interval_bw interval_bw[XHCI_MAX_INTERVAL];
         /* Includes reserved bandwidth for async endpoints */
         unsigned int            bw_used;
+        unsigned int            ss_bw_in;
+        unsigned int            ss_bw_out;
 };