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authorArvid Brodin <arvid.brodin@enea.com>2011-04-26 15:48:30 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-02 20:03:50 -0400
commit71a9f9d268a5c2b0a80ae606cf8e502f3410a5df (patch)
treefd8c3512ff67b64e8a487eecabdfa7ff5131bcdb /drivers/usb/host/isp1760-hcd.h
parent22bea9cef810ec54abdb057de46cea04c972dc64 (diff)
usb/isp1760: Improve urb queueing, get rid of BUG():s in normal code paths
This patch replaces the code that handles qtds. Intead of directly allocating chip mem and chip slot, enqueue the transfer in a list of queue heads. Use a centralized function enqueue_qtds() to prioritize and enqueue transfers. This removes all of the interrupt context BUG() calls when out of chip mem or transfer slots. It also makes it possible to efficiently use the dual-port mem on the chip for double-buffered transfers, which improve transfer times to/from/between usb sticks by about 40 % on my HW. With this patch it should also be possible to handle qtd scheduling outside of the interrupt handler, for significantly improved kernel latency. I have not implemented this since there are some locking issues which I haven't had time to look at. Signed-off-by: Arvid Brodin <arvid.brodin@enea.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/isp1760-hcd.h')
-rw-r--r--drivers/usb/host/isp1760-hcd.h66
1 files changed, 32 insertions, 34 deletions
diff --git a/drivers/usb/host/isp1760-hcd.h b/drivers/usb/host/isp1760-hcd.h
index 056e046b0d4..014a7dfadf9 100644
--- a/drivers/usb/host/isp1760-hcd.h
+++ b/drivers/usb/host/isp1760-hcd.h
@@ -104,7 +104,7 @@ struct ptd {
104#define ATL_PTD_OFFSET 0x0c00 104#define ATL_PTD_OFFSET 0x0c00
105#define PAYLOAD_OFFSET 0x1000 105#define PAYLOAD_OFFSET 0x1000
106 106
107struct inter_packet_info { 107struct slotinfo {
108 struct isp1760_qh *qh; 108 struct isp1760_qh *qh;
109 struct isp1760_qtd *qtd; 109 struct isp1760_qtd *qtd;
110}; 110};
@@ -154,54 +154,52 @@ struct memory_chunk {
154 154
155/* ATL */ 155/* ATL */
156/* DW0 */ 156/* DW0 */
157#define PTD_VALID 1 157#define DW0_VALID_BIT 1
158#define PTD_LENGTH(x) (((u32) x) << 3) 158#define FROM_DW0_VALID(x) ((x) & 0x01)
159#define PTD_MAXPACKET(x) (((u32) x) << 18) 159#define TO_DW0_LENGTH(x) (((u32) x) << 3)
160#define PTD_MULTI(x) (((u32) x) << 29) 160#define TO_DW0_MAXPACKET(x) (((u32) x) << 18)
161#define PTD_ENDPOINT(x) (((u32) x) << 31) 161#define TO_DW0_MULTI(x) (((u32) x) << 29)
162#define TO_DW0_ENDPOINT(x) (((u32) x) << 31)
162/* DW1 */ 163/* DW1 */
163#define PTD_DEVICE_ADDR(x) (((u32) x) << 3) 164#define TO_DW1_DEVICE_ADDR(x) (((u32) x) << 3)
164#define PTD_PID_TOKEN(x) (((u32) x) << 10) 165#define TO_DW1_PID_TOKEN(x) (((u32) x) << 10)
165#define PTD_TRANS_BULK ((u32) 2 << 12) 166#define DW1_TRANS_BULK ((u32) 2 << 12)
166#define PTD_TRANS_INT ((u32) 3 << 12) 167#define DW1_TRANS_INT ((u32) 3 << 12)
167#define PTD_TRANS_SPLIT ((u32) 1 << 14) 168#define DW1_TRANS_SPLIT ((u32) 1 << 14)
168#define PTD_SE_USB_LOSPEED ((u32) 2 << 16) 169#define DW1_SE_USB_LOSPEED ((u32) 2 << 16)
169#define PTD_PORT_NUM(x) (((u32) x) << 18) 170#define TO_DW1_PORT_NUM(x) (((u32) x) << 18)
170#define PTD_HUB_NUM(x) (((u32) x) << 25) 171#define TO_DW1_HUB_NUM(x) (((u32) x) << 25)
171#define PTD_PING(x) (((u32) x) << 26)
172/* DW2 */ 172/* DW2 */
173#define PTD_RL_CNT(x) (((u32) x) << 25) 173#define TO_DW2_DATA_START_ADDR(x) (((u32) x) << 8)
174#define PTD_DATA_START_ADDR(x) (((u32) x) << 8) 174#define TO_DW2_RL(x) ((x) << 25)
175#define BASE_ADDR 0x1000 175#define FROM_DW2_RL(x) (((x) >> 25) & 0xf)
176/* DW3 */ 176/* DW3 */
177#define PTD_CERR(x) (((u32) x) << 23) 177#define FROM_DW3_NRBYTESTRANSFERRED(x) ((x) & 0x7fff)
178#define PTD_NAC_CNT(x) (((u32) x) << 19) 178#define FROM_DW3_SCS_NRBYTESTRANSFERRED(x) ((x) & 0x07ff)
179#define PTD_ACTIVE ((u32) 1 << 31) 179#define TO_DW3_NAKCOUNT(x) ((x) << 19)
180#define PTD_DATA_TOGGLE(x) (((u32) x) << 25) 180#define FROM_DW3_NAKCOUNT(x) (((x) >> 19) & 0xf)
181 181#define TO_DW3_CERR(x) ((x) << 23)
182#define DW3_HALT_BIT (1 << 30) 182#define FROM_DW3_CERR(x) (((x) >> 23) & 0x3)
183#define TO_DW3_DATA_TOGGLE(x) ((x) << 25)
184#define FROM_DW3_DATA_TOGGLE(x) (((x) >> 25) & 0x1)
185#define TO_DW3_PING(x) ((x) << 26)
186#define FROM_DW3_PING(x) (((x) >> 26) & 0x1)
183#define DW3_ERROR_BIT (1 << 28) 187#define DW3_ERROR_BIT (1 << 28)
184#define DW3_QTD_ACTIVE (1 << 31) 188#define DW3_BABBLE_BIT (1 << 29)
189#define DW3_HALT_BIT (1 << 30)
190#define DW3_ACTIVE_BIT (1 << 31)
185 191
186#define INT_UNDERRUN (1 << 2) 192#define INT_UNDERRUN (1 << 2)
187#define INT_BABBLE (1 << 1) 193#define INT_BABBLE (1 << 1)
188#define INT_EXACT (1 << 0) 194#define INT_EXACT (1 << 0)
189 195
190#define DW1_GET_PID(x) (((x) >> 10) & 0x3)
191#define PTD_XFERRED_LENGTH(x) ((x) & 0x7fff)
192#define PTD_XFERRED_LENGTH_LO(x) ((x) & 0x7ff)
193
194#define SETUP_PID (2) 196#define SETUP_PID (2)
195#define IN_PID (1) 197#define IN_PID (1)
196#define OUT_PID (0) 198#define OUT_PID (0)
197#define GET_QTD_TOKEN_TYPE(x) ((x) & 0x3)
198
199#define DATA_TOGGLE (1 << 31)
200#define GET_DATA_TOGGLE(x) ((x) >> 31)
201 199
202/* Errata 1 */ 200/* Errata 1 */
203#define RL_COUNTER (0) 201#define RL_COUNTER (0)
204#define NAK_COUNTER (0) 202#define NAK_COUNTER (0)
205#define ERR_COUNTER (2) 203#define ERR_COUNTER (2)
206 204
207#endif 205#endif /* _ISP1760_HCD_H_ */