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authorMatthieu CASTET <matthieu.castet@parrot.com>2011-02-15 12:41:54 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2011-02-17 13:57:13 -0500
commit5c8d61bfcc6396f80b884e0f23f08cbd8bf10778 (patch)
treeaa0ae62eb07834f82776a923d6264065e673c0ed /drivers/usb/host/ehci-msm.c
parentbcf40815e0cda371cecc242398fe39b873bb1047 (diff)
USB: make ehci msm driver use ehci_run.
Now that ehci_run don't call ehci_reset, we can use ehci_run. Signed-off-by: Matthieu CASTET <castet.matthieu@parrot.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ehci-msm.c')
-rw-r--r--drivers/usb/host/ehci-msm.c92
1 files changed, 5 insertions, 87 deletions
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index 413f4deca53..a80001420e3 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -34,92 +34,6 @@
34 34
35static struct otg_transceiver *otg; 35static struct otg_transceiver *otg;
36 36
37/*
38 * ehci_run defined in drivers/usb/host/ehci-hcd.c reset the controller and
39 * the configuration settings in ehci_msm_reset vanish after controller is
40 * reset. Resetting the controler in ehci_run seems to be un-necessary
41 * provided HCD reset the controller before calling ehci_run. Most of the HCD
42 * do but some are not. So this function is same as ehci_run but we don't
43 * reset the controller here.
44 */
45static int ehci_msm_run(struct usb_hcd *hcd)
46{
47 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
48 u32 temp;
49 u32 hcc_params;
50
51 hcd->uses_new_polling = 1;
52
53 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
54 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
55
56 /*
57 * hcc_params controls whether ehci->regs->segment must (!!!)
58 * be used; it constrains QH/ITD/SITD and QTD locations.
59 * pci_pool consistent memory always uses segment zero.
60 * streaming mappings for I/O buffers, like pci_map_single(),
61 * can return segments above 4GB, if the device allows.
62 *
63 * NOTE: the dma mask is visible through dma_supported(), so
64 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
65 * Scsi_Host.highmem_io, and so forth. It's readonly to all
66 * host side drivers though.
67 */
68 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
69 if (HCC_64BIT_ADDR(hcc_params))
70 ehci_writel(ehci, 0, &ehci->regs->segment);
71
72 /*
73 * Philips, Intel, and maybe others need CMD_RUN before the
74 * root hub will detect new devices (why?); NEC doesn't
75 */
76 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
77 ehci->command |= CMD_RUN;
78 ehci_writel(ehci, ehci->command, &ehci->regs->command);
79 dbg_cmd(ehci, "init", ehci->command);
80
81 /*
82 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
83 * are explicitly handed to companion controller(s), so no TT is
84 * involved with the root hub. (Except where one is integrated,
85 * and there's no companion controller unless maybe for USB OTG.)
86 *
87 * Turning on the CF flag will transfer ownership of all ports
88 * from the companions to the EHCI controller. If any of the
89 * companions are in the middle of a port reset at the time, it
90 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
91 * guarantees that no resets are in progress. After we set CF,
92 * a short delay lets the hardware catch up; new resets shouldn't
93 * be started before the port switching actions could complete.
94 */
95 down_write(&ehci_cf_port_reset_rwsem);
96 hcd->state = HC_STATE_RUNNING;
97 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
98 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
99 usleep_range(5000, 5500);
100 up_write(&ehci_cf_port_reset_rwsem);
101 ehci->last_periodic_enable = ktime_get_real();
102
103 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
104 ehci_info(ehci,
105 "USB %x.%x started, EHCI %x.%02x%s\n",
106 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
107 temp >> 8, temp & 0xff,
108 ignore_oc ? ", overcurrent ignored" : "");
109
110 ehci_writel(ehci, INTR_MASK,
111 &ehci->regs->intr_enable); /* Turn On Interrupts */
112
113 /* GRR this is run-once init(), being done every time the HC starts.
114 * So long as they're part of class devices, we can't do it init()
115 * since the class device isn't created that early.
116 */
117 create_debug_files(ehci);
118 create_companion_file(ehci);
119
120 return 0;
121}
122
123static int ehci_msm_reset(struct usb_hcd *hcd) 37static int ehci_msm_reset(struct usb_hcd *hcd)
124{ 38{
125 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 39 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
@@ -135,6 +49,10 @@ static int ehci_msm_reset(struct usb_hcd *hcd)
135 hcd->has_tt = 1; 49 hcd->has_tt = 1;
136 ehci->sbrn = HCD_USB2; 50 ehci->sbrn = HCD_USB2;
137 51
52 retval = ehci_halt(ehci);
53 if (retval)
54 return retval;
55
138 /* data structure init */ 56 /* data structure init */
139 retval = ehci_init(hcd); 57 retval = ehci_init(hcd);
140 if (retval) 58 if (retval)
@@ -167,7 +85,7 @@ static struct hc_driver msm_hc_driver = {
167 .flags = HCD_USB2 | HCD_MEMORY, 85 .flags = HCD_USB2 | HCD_MEMORY,
168 86
169 .reset = ehci_msm_reset, 87 .reset = ehci_msm_reset,
170 .start = ehci_msm_run, 88 .start = ehci_run,
171 89
172 .stop = ehci_stop, 90 .stop = ehci_stop,
173 .shutdown = ehci_shutdown, 91 .shutdown = ehci_shutdown,