diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2011-01-13 15:10:18 -0500 |
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committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-01-13 15:10:18 -0500 |
commit | ab4382d27412e7e3e7c936e8d50d8888dfac3df8 (patch) | |
tree | 51d96dea2431140358784b6b426715f37f74fd53 /drivers/tty/serial/mrst_max3110.h | |
parent | 728674a7e466628df2aeec6d11a2ae1ef968fb67 (diff) |
tty: move drivers/serial/ to drivers/tty/serial/
The serial drivers are really just tty drivers, so move them to
drivers/tty/ to make things a bit neater overall.
This is part of the tty/serial driver movement proceedure as proposed by
Arnd Bergmann and approved by everyone involved a number of months ago.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Rogier Wolff <R.E.Wolff@bitwizard.nl>
Cc: Michael H. Warfield <mhw@wittsend.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/tty/serial/mrst_max3110.h')
-rw-r--r-- | drivers/tty/serial/mrst_max3110.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/drivers/tty/serial/mrst_max3110.h b/drivers/tty/serial/mrst_max3110.h new file mode 100644 index 00000000000..d1ef43af397 --- /dev/null +++ b/drivers/tty/serial/mrst_max3110.h | |||
@@ -0,0 +1,60 @@ | |||
1 | #ifndef _MRST_MAX3110_H | ||
2 | #define _MRST_MAX3110_H | ||
3 | |||
4 | #define MAX3110_HIGH_CLK 0x1 /* 3.6864 MHZ */ | ||
5 | #define MAX3110_LOW_CLK 0x0 /* 1.8432 MHZ */ | ||
6 | |||
7 | /* status bits for all 4 MAX3110 operate modes */ | ||
8 | #define MAX3110_READ_DATA_AVAILABLE (1 << 15) | ||
9 | #define MAX3110_WRITE_BUF_EMPTY (1 << 14) | ||
10 | |||
11 | #define WC_TAG (3 << 14) | ||
12 | #define RC_TAG (1 << 14) | ||
13 | #define WD_TAG (2 << 14) | ||
14 | #define RD_TAG (0 << 14) | ||
15 | |||
16 | /* bits def for write configuration */ | ||
17 | #define WC_FIFO_ENABLE_MASK (1 << 13) | ||
18 | #define WC_FIFO_ENABLE (0 << 13) | ||
19 | |||
20 | #define WC_SW_SHDI (1 << 12) | ||
21 | |||
22 | #define WC_IRQ_MASK (0xF << 8) | ||
23 | #define WC_TXE_IRQ_ENABLE (1 << 11) /* TX empty irq */ | ||
24 | #define WC_RXA_IRQ_ENABLE (1 << 10) /* RX availabe irq */ | ||
25 | #define WC_PAR_HIGH_IRQ_ENABLE (1 << 9) | ||
26 | #define WC_REC_ACT_IRQ_ENABLE (1 << 8) | ||
27 | |||
28 | #define WC_IRDA_ENABLE (1 << 7) | ||
29 | |||
30 | #define WC_STOPBITS_MASK (1 << 6) | ||
31 | #define WC_2_STOPBITS (1 << 6) | ||
32 | #define WC_1_STOPBITS (0 << 6) | ||
33 | |||
34 | #define WC_PARITY_ENABLE_MASK (1 << 5) | ||
35 | #define WC_PARITY_ENABLE (1 << 5) | ||
36 | |||
37 | #define WC_WORDLEN_MASK (1 << 4) | ||
38 | #define WC_7BIT_WORD (1 << 4) | ||
39 | #define WC_8BIT_WORD (0 << 4) | ||
40 | |||
41 | #define WC_BAUD_DIV_MASK (0xF) | ||
42 | #define WC_BAUD_DR1 (0x0) | ||
43 | #define WC_BAUD_DR2 (0x1) | ||
44 | #define WC_BAUD_DR4 (0x2) | ||
45 | #define WC_BAUD_DR8 (0x3) | ||
46 | #define WC_BAUD_DR16 (0x4) | ||
47 | #define WC_BAUD_DR32 (0x5) | ||
48 | #define WC_BAUD_DR64 (0x6) | ||
49 | #define WC_BAUD_DR128 (0x7) | ||
50 | #define WC_BAUD_DR3 (0x8) | ||
51 | #define WC_BAUD_DR6 (0x9) | ||
52 | #define WC_BAUD_DR12 (0xA) | ||
53 | #define WC_BAUD_DR24 (0xB) | ||
54 | #define WC_BAUD_DR48 (0xC) | ||
55 | #define WC_BAUD_DR96 (0xD) | ||
56 | #define WC_BAUD_DR192 (0xE) | ||
57 | #define WC_BAUD_DR384 (0xF) | ||
58 | |||
59 | #define M3110_RX_FIFO_DEPTH 8 | ||
60 | #endif | ||