diff options
author | Arend van Spriel <arend@broadcom.com> | 2010-12-02 09:44:50 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-12-02 15:34:08 -0500 |
commit | 92246bcbd7730eaaec0c29a2adc1cb4b4451ed9e (patch) | |
tree | 9c61b803b9101dc125384fb8e709a2493f81ca1c /drivers/staging | |
parent | c523ea78ec9a33586fa7a73859de7c462097cdfc (diff) |
staging: brcm80211: remove redundant CHIPTYPE macro
The CHIPTYPE macro simply expands to the macro argument so it is
redundant and as such removed.
Reviewed-by: Roland Vossen <rvossen@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging')
-rw-r--r-- | drivers/staging/brcm80211/include/bcmdefs.h | 1 | ||||
-rw-r--r-- | drivers/staging/brcm80211/util/siutils.c | 26 |
2 files changed, 13 insertions, 14 deletions
diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h index 4ce4486a19a..350bd6d526a 100644 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ b/drivers/staging/brcm80211/include/bcmdefs.h | |||
@@ -51,7 +51,6 @@ | |||
51 | #define SPI_BUS 6 /* gSPI target */ | 51 | #define SPI_BUS 6 /* gSPI target */ |
52 | #define RPC_BUS 7 /* RPC target */ | 52 | #define RPC_BUS 7 /* RPC target */ |
53 | 53 | ||
54 | #define CHIPTYPE(bus) (bus) | ||
55 | #define CHIPID(chip) (chip) | 54 | #define CHIPID(chip) (chip) |
56 | #define CHIPREV(rev) (rev) | 55 | #define CHIPREV(rev) (rev) |
57 | 56 | ||
diff --git a/drivers/staging/brcm80211/util/siutils.c b/drivers/staging/brcm80211/util/siutils.c index 33a42f672af..da35edd2d7b 100644 --- a/drivers/staging/brcm80211/util/siutils.c +++ b/drivers/staging/brcm80211/util/siutils.c | |||
@@ -568,7 +568,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, | |||
568 | sih->issim = IS_SIM(sih->chippkg); | 568 | sih->issim = IS_SIM(sih->chippkg); |
569 | 569 | ||
570 | /* scan for cores */ | 570 | /* scan for cores */ |
571 | if (CHIPTYPE(sii->pub.socitype) == SOCI_AI) { | 571 | if (sii->pub.socitype == SOCI_AI) { |
572 | SI_MSG(("Found chip type AI (0x%08x)\n", w)); | 572 | SI_MSG(("Found chip type AI (0x%08x)\n", w)); |
573 | /* pass chipc address instead of original core base */ | 573 | /* pass chipc address instead of original core base */ |
574 | ai_scan(&sii->pub, (void *)cc, devid); | 574 | ai_scan(&sii->pub, (void *)cc, devid); |
@@ -765,7 +765,7 @@ void si_deregister_intr_callback(si_t *sih) | |||
765 | 765 | ||
766 | uint si_flag(si_t *sih) | 766 | uint si_flag(si_t *sih) |
767 | { | 767 | { |
768 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 768 | if (sih->socitype == SOCI_AI) |
769 | return ai_flag(sih); | 769 | return ai_flag(sih); |
770 | else { | 770 | else { |
771 | ASSERT(0); | 771 | ASSERT(0); |
@@ -775,7 +775,7 @@ uint si_flag(si_t *sih) | |||
775 | 775 | ||
776 | void si_setint(si_t *sih, int siflag) | 776 | void si_setint(si_t *sih, int siflag) |
777 | { | 777 | { |
778 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 778 | if (sih->socitype == SOCI_AI) |
779 | ai_setint(sih, siflag); | 779 | ai_setint(sih, siflag); |
780 | else | 780 | else |
781 | ASSERT(0); | 781 | ASSERT(0); |
@@ -807,7 +807,7 @@ bool si_backplane64(si_t *sih) | |||
807 | #ifndef BCMSDIO | 807 | #ifndef BCMSDIO |
808 | uint si_corerev(si_t *sih) | 808 | uint si_corerev(si_t *sih) |
809 | { | 809 | { |
810 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 810 | if (sih->socitype == SOCI_AI) |
811 | return ai_corerev(sih); | 811 | return ai_corerev(sih); |
812 | else { | 812 | else { |
813 | ASSERT(0); | 813 | ASSERT(0); |
@@ -850,7 +850,7 @@ void *si_setcore(si_t *sih, uint coreid, uint coreunit) | |||
850 | if (!GOODIDX(idx)) | 850 | if (!GOODIDX(idx)) |
851 | return NULL; | 851 | return NULL; |
852 | 852 | ||
853 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 853 | if (sih->socitype == SOCI_AI) |
854 | return ai_setcoreidx(sih, idx); | 854 | return ai_setcoreidx(sih, idx); |
855 | else { | 855 | else { |
856 | #ifdef BCMSDIO | 856 | #ifdef BCMSDIO |
@@ -865,7 +865,7 @@ void *si_setcore(si_t *sih, uint coreid, uint coreunit) | |||
865 | #ifndef BCMSDIO | 865 | #ifndef BCMSDIO |
866 | void *si_setcoreidx(si_t *sih, uint coreidx) | 866 | void *si_setcoreidx(si_t *sih, uint coreidx) |
867 | { | 867 | { |
868 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 868 | if (sih->socitype == SOCI_AI) |
869 | return ai_setcoreidx(sih, coreidx); | 869 | return ai_setcoreidx(sih, coreidx); |
870 | else { | 870 | else { |
871 | ASSERT(0); | 871 | ASSERT(0); |
@@ -917,7 +917,7 @@ void si_restore_core(si_t *sih, uint coreid, uint intr_val) | |||
917 | 917 | ||
918 | u32 si_core_cflags(si_t *sih, u32 mask, u32 val) | 918 | u32 si_core_cflags(si_t *sih, u32 mask, u32 val) |
919 | { | 919 | { |
920 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 920 | if (sih->socitype == SOCI_AI) |
921 | return ai_core_cflags(sih, mask, val); | 921 | return ai_core_cflags(sih, mask, val); |
922 | else { | 922 | else { |
923 | ASSERT(0); | 923 | ASSERT(0); |
@@ -927,7 +927,7 @@ u32 si_core_cflags(si_t *sih, u32 mask, u32 val) | |||
927 | 927 | ||
928 | u32 si_core_sflags(si_t *sih, u32 mask, u32 val) | 928 | u32 si_core_sflags(si_t *sih, u32 mask, u32 val) |
929 | { | 929 | { |
930 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 930 | if (sih->socitype == SOCI_AI) |
931 | return ai_core_sflags(sih, mask, val); | 931 | return ai_core_sflags(sih, mask, val); |
932 | else { | 932 | else { |
933 | ASSERT(0); | 933 | ASSERT(0); |
@@ -937,7 +937,7 @@ u32 si_core_sflags(si_t *sih, u32 mask, u32 val) | |||
937 | 937 | ||
938 | bool si_iscoreup(si_t *sih) | 938 | bool si_iscoreup(si_t *sih) |
939 | { | 939 | { |
940 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 940 | if (sih->socitype == SOCI_AI) |
941 | return ai_iscoreup(sih); | 941 | return ai_iscoreup(sih); |
942 | else { | 942 | else { |
943 | #ifdef BCMSDIO | 943 | #ifdef BCMSDIO |
@@ -952,7 +952,7 @@ bool si_iscoreup(si_t *sih) | |||
952 | void si_write_wrapperreg(si_t *sih, u32 offset, u32 val) | 952 | void si_write_wrapperreg(si_t *sih, u32 offset, u32 val) |
953 | { | 953 | { |
954 | /* only for 4319, no requirement for SOCI_SB */ | 954 | /* only for 4319, no requirement for SOCI_SB */ |
955 | if (CHIPTYPE(sih->socitype) == SOCI_AI) { | 955 | if (sih->socitype == SOCI_AI) { |
956 | ai_write_wrap_reg(sih, offset, val); | 956 | ai_write_wrap_reg(sih, offset, val); |
957 | } | 957 | } |
958 | } | 958 | } |
@@ -960,7 +960,7 @@ void si_write_wrapperreg(si_t *sih, u32 offset, u32 val) | |||
960 | uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) | 960 | uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) |
961 | { | 961 | { |
962 | 962 | ||
963 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 963 | if (sih->socitype == SOCI_AI) |
964 | return ai_corereg(sih, coreidx, regoff, mask, val); | 964 | return ai_corereg(sih, coreidx, regoff, mask, val); |
965 | else { | 965 | else { |
966 | #ifdef BCMSDIO | 966 | #ifdef BCMSDIO |
@@ -975,7 +975,7 @@ uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) | |||
975 | void si_core_disable(si_t *sih, u32 bits) | 975 | void si_core_disable(si_t *sih, u32 bits) |
976 | { | 976 | { |
977 | 977 | ||
978 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 978 | if (sih->socitype == SOCI_AI) |
979 | ai_core_disable(sih, bits); | 979 | ai_core_disable(sih, bits); |
980 | #ifdef BCMSDIO | 980 | #ifdef BCMSDIO |
981 | else | 981 | else |
@@ -985,7 +985,7 @@ void si_core_disable(si_t *sih, u32 bits) | |||
985 | 985 | ||
986 | void si_core_reset(si_t *sih, u32 bits, u32 resetbits) | 986 | void si_core_reset(si_t *sih, u32 bits, u32 resetbits) |
987 | { | 987 | { |
988 | if (CHIPTYPE(sih->socitype) == SOCI_AI) | 988 | if (sih->socitype == SOCI_AI) |
989 | ai_core_reset(sih, bits, resetbits); | 989 | ai_core_reset(sih, bits, resetbits); |
990 | #ifdef BCMSDIO | 990 | #ifdef BCMSDIO |
991 | else | 991 | else |