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authorPekka Enberg <penberg@cs.helsinki.fi>2008-10-22 04:02:37 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-01-06 16:51:41 -0500
commit65144de7989badce1782cc3319d9b8b2b5805acc (patch)
tree422cbb1340fe364a6eec08c2ff72b0f183ec1254 /drivers/staging/winbond/wbhal.c
parentf37435ce8611a2c60f434ddfec8e6dfcd51829fc (diff)
Staging: w35und: wb35reg struct typedef removal
This patch removes the WB35REG struct typedefs and fixes up variable names that use the type. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Acked-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/winbond/wbhal.c')
-rw-r--r--drivers/staging/winbond/wbhal.c260
1 files changed, 130 insertions, 130 deletions
diff --git a/drivers/staging/winbond/wbhal.c b/drivers/staging/winbond/wbhal.c
index 1a2533b5524..d012f0538a6 100644
--- a/drivers/staging/winbond/wbhal.c
+++ b/drivers/staging/winbond/wbhal.c
@@ -92,7 +92,7 @@ void hal_halt(phw_data_t pHwData, void *ppa_data)
92void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates, 92void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
93 u8 length, unsigned char basic_rate_set) 93 u8 length, unsigned char basic_rate_set)
94{ 94{
95 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 95 struct wb35_reg *reg = &pHwData->reg;
96 u32 tmp, tmp1; 96 u32 tmp, tmp1;
97 u8 Rate[12]={ 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 }; 97 u8 Rate[12]={ 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 };
98 u8 SupportedRate[16]; 98 u8 SupportedRate[16];
@@ -101,10 +101,10 @@ void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
101 if( pHwData->SurpriseRemove ) return; 101 if( pHwData->SurpriseRemove ) return;
102 102
103 if (basic_rate_set) { 103 if (basic_rate_set) {
104 pWb35Reg->M28_MacControl &= ~0x000fff00; 104 reg->M28_MacControl &= ~0x000fff00;
105 tmp1 = 0x00000100; 105 tmp1 = 0x00000100;
106 } else { 106 } else {
107 pWb35Reg->M28_MacControl &= ~0xfff00000; 107 reg->M28_MacControl &= ~0xfff00000;
108 tmp1 = 0x00100000; 108 tmp1 = 0x00100000;
109 } 109 }
110 110
@@ -120,8 +120,8 @@ void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
120 tmp |= (tmp1<<j); 120 tmp |= (tmp1<<j);
121 } 121 }
122 122
123 pWb35Reg->M28_MacControl |= tmp; 123 reg->M28_MacControl |= tmp;
124 Wb35Reg_Write( pHwData, 0x0828, pWb35Reg->M28_MacControl ); 124 Wb35Reg_Write( pHwData, 0x0828, reg->M28_MacControl );
125 125
126 // 930206.2.c M78 setting 126 // 930206.2.c M78 setting
127 j = k = Count1 = Count2 = 0; 127 j = k = Count1 = Count2 = 0;
@@ -129,10 +129,10 @@ void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
129 tmp = 0x00100000; 129 tmp = 0x00100000;
130 tmp1 = 0x00000100; 130 tmp1 = 0x00000100;
131 for (i=0; i<12; i++) { // Get the supported rate 131 for (i=0; i<12; i++) { // Get the supported rate
132 if (tmp & pWb35Reg->M28_MacControl) { 132 if (tmp & reg->M28_MacControl) {
133 SupportedRate[j] = Rate[i]; 133 SupportedRate[j] = Rate[i];
134 134
135 if (tmp1 & pWb35Reg->M28_MacControl) 135 if (tmp1 & reg->M28_MacControl)
136 SupportedRate[j] |= 0x80; 136 SupportedRate[j] |= 0x80;
137 137
138 if (k) 138 if (k)
@@ -144,7 +144,7 @@ void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
144 } 144 }
145 145
146 if (i==4 && k==0) { 146 if (i==4 && k==0) {
147 if( !(pWb35Reg->M28_MacControl & 0x000ff000) ) // if basic rate in 11g domain) 147 if( !(reg->M28_MacControl & 0x000ff000) ) // if basic rate in 11g domain)
148 { 148 {
149 k = 1; 149 k = 1;
150 j = 8; 150 j = 8;
@@ -161,16 +161,16 @@ void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
161 *(u32 *)(SupportedRate+(i<<2)) = cpu_to_le32( *(u32 *)(SupportedRate+(i<<2)) ); 161 *(u32 *)(SupportedRate+(i<<2)) = cpu_to_le32( *(u32 *)(SupportedRate+(i<<2)) );
162 //--- end 20060926 add by anson's endian 162 //--- end 20060926 add by anson's endian
163 Wb35Reg_BurstWrite( pHwData,0x087c, (u32 *)SupportedRate, 4, AUTO_INCREMENT ); 163 Wb35Reg_BurstWrite( pHwData,0x087c, (u32 *)SupportedRate, 4, AUTO_INCREMENT );
164 pWb35Reg->M7C_MacControl = ((u32 *)SupportedRate)[0]; 164 reg->M7C_MacControl = ((u32 *)SupportedRate)[0];
165 pWb35Reg->M80_MacControl = ((u32 *)SupportedRate)[1]; 165 reg->M80_MacControl = ((u32 *)SupportedRate)[1];
166 pWb35Reg->M84_MacControl = ((u32 *)SupportedRate)[2]; 166 reg->M84_MacControl = ((u32 *)SupportedRate)[2];
167 pWb35Reg->M88_MacControl = ((u32 *)SupportedRate)[3]; 167 reg->M88_MacControl = ((u32 *)SupportedRate)[3];
168 168
169 // Fill length 169 // Fill length
170 tmp = Count1<<28 | Count2<<24; 170 tmp = Count1<<28 | Count2<<24;
171 pWb35Reg->M78_ERPInformation &= ~0xff000000; 171 reg->M78_ERPInformation &= ~0xff000000;
172 pWb35Reg->M78_ERPInformation |= tmp; 172 reg->M78_ERPInformation |= tmp;
173 Wb35Reg_Write( pHwData, 0x0878, pWb35Reg->M78_ERPInformation ); 173 Wb35Reg_Write( pHwData, 0x0878, reg->M78_ERPInformation );
174} 174}
175 175
176 176
@@ -190,7 +190,7 @@ void hal_set_beacon_period( phw_data_t pHwData, u16 beacon_period )
190 190
191void hal_set_current_channel_ex( phw_data_t pHwData, ChanInfo channel ) 191void hal_set_current_channel_ex( phw_data_t pHwData, ChanInfo channel )
192{ 192{
193 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 193 struct wb35_reg *reg = &pHwData->reg;
194 194
195 if( pHwData->SurpriseRemove ) 195 if( pHwData->SurpriseRemove )
196 return; 196 return;
@@ -203,9 +203,9 @@ void hal_set_current_channel_ex( phw_data_t pHwData, ChanInfo channel )
203 #ifdef _PE_STATE_DUMP_ 203 #ifdef _PE_STATE_DUMP_
204 WBDEBUG(("Set channel is %d, band =%d\n", pHwData->Channel, pHwData->band)); 204 WBDEBUG(("Set channel is %d, band =%d\n", pHwData->Channel, pHwData->band));
205 #endif 205 #endif
206 pWb35Reg->M28_MacControl &= ~0xff; // Clean channel information field 206 reg->M28_MacControl &= ~0xff; // Clean channel information field
207 pWb35Reg->M28_MacControl |= channel.ChanNo; 207 reg->M28_MacControl |= channel.ChanNo;
208 Wb35Reg_WriteWithCallbackValue( pHwData, 0x0828, pWb35Reg->M28_MacControl, 208 Wb35Reg_WriteWithCallbackValue( pHwData, 0x0828, reg->M28_MacControl,
209 (s8 *)&channel, sizeof(ChanInfo)); 209 (s8 *)&channel, sizeof(ChanInfo));
210} 210}
211//--------------------------------------------------------------------------------------------------- 211//---------------------------------------------------------------------------------------------------
@@ -222,47 +222,47 @@ void hal_get_current_channel( phw_data_t pHwData, ChanInfo *channel )
222//--------------------------------------------------------------------------------------------------- 222//---------------------------------------------------------------------------------------------------
223void hal_set_accept_broadcast( phw_data_t pHwData, u8 enable ) 223void hal_set_accept_broadcast( phw_data_t pHwData, u8 enable )
224{ 224{
225 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 225 struct wb35_reg *reg = &pHwData->reg;
226 226
227 if( pHwData->SurpriseRemove ) return; 227 if( pHwData->SurpriseRemove ) return;
228 228
229 pWb35Reg->M00_MacControl &= ~0x02000000;//The HW value 229 reg->M00_MacControl &= ~0x02000000;//The HW value
230 230
231 if (enable) 231 if (enable)
232 pWb35Reg->M00_MacControl |= 0x02000000;//The HW value 232 reg->M00_MacControl |= 0x02000000;//The HW value
233 233
234 Wb35Reg_Write( pHwData, 0x0800, pWb35Reg->M00_MacControl ); 234 Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
235} 235}
236 236
237//for wep key error detection, we need to accept broadcast packets to be received temporary. 237//for wep key error detection, we need to accept broadcast packets to be received temporary.
238void hal_set_accept_promiscuous( phw_data_t pHwData, u8 enable) 238void hal_set_accept_promiscuous( phw_data_t pHwData, u8 enable)
239{ 239{
240 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 240 struct wb35_reg *reg = &pHwData->reg;
241 241
242 if (pHwData->SurpriseRemove) return; 242 if (pHwData->SurpriseRemove) return;
243 if (enable) { 243 if (enable) {
244 pWb35Reg->M00_MacControl |= 0x00400000; 244 reg->M00_MacControl |= 0x00400000;
245 Wb35Reg_Write( pHwData, 0x0800, pWb35Reg->M00_MacControl ); 245 Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
246 } else { 246 } else {
247 pWb35Reg->M00_MacControl&=~0x00400000; 247 reg->M00_MacControl&=~0x00400000;
248 Wb35Reg_Write( pHwData, 0x0800, pWb35Reg->M00_MacControl ); 248 Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
249 } 249 }
250} 250}
251 251
252void hal_set_accept_multicast( phw_data_t pHwData, u8 enable ) 252void hal_set_accept_multicast( phw_data_t pHwData, u8 enable )
253{ 253{
254 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 254 struct wb35_reg *reg = &pHwData->reg;
255 255
256 if( pHwData->SurpriseRemove ) return; 256 if( pHwData->SurpriseRemove ) return;
257 257
258 pWb35Reg->M00_MacControl &= ~0x01000000;//The HW value 258 reg->M00_MacControl &= ~0x01000000;//The HW value
259 if (enable) pWb35Reg->M00_MacControl |= 0x01000000;//The HW value 259 if (enable) reg->M00_MacControl |= 0x01000000;//The HW value
260 Wb35Reg_Write( pHwData, 0x0800, pWb35Reg->M00_MacControl ); 260 Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
261} 261}
262 262
263void hal_set_accept_beacon( phw_data_t pHwData, u8 enable ) 263void hal_set_accept_beacon( phw_data_t pHwData, u8 enable )
264{ 264{
265 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 265 struct wb35_reg *reg = &pHwData->reg;
266 266
267 if( pHwData->SurpriseRemove ) return; 267 if( pHwData->SurpriseRemove ) return;
268 268
@@ -270,43 +270,43 @@ void hal_set_accept_beacon( phw_data_t pHwData, u8 enable )
270 if( !enable )//Due to SME and MLME are not suitable for 35 270 if( !enable )//Due to SME and MLME are not suitable for 35
271 return; 271 return;
272 272
273 pWb35Reg->M00_MacControl &= ~0x04000000;//The HW value 273 reg->M00_MacControl &= ~0x04000000;//The HW value
274 if( enable ) 274 if( enable )
275 pWb35Reg->M00_MacControl |= 0x04000000;//The HW value 275 reg->M00_MacControl |= 0x04000000;//The HW value
276 276
277 Wb35Reg_Write( pHwData, 0x0800, pWb35Reg->M00_MacControl ); 277 Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
278} 278}
279//--------------------------------------------------------------------------------------------------- 279//---------------------------------------------------------------------------------------------------
280void hal_set_multicast_address( phw_data_t pHwData, u8 *address, u8 number ) 280void hal_set_multicast_address( phw_data_t pHwData, u8 *address, u8 number )
281{ 281{
282 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 282 struct wb35_reg *reg = &pHwData->reg;
283 u8 Byte, Bit; 283 u8 Byte, Bit;
284 284
285 if( pHwData->SurpriseRemove ) return; 285 if( pHwData->SurpriseRemove ) return;
286 286
287 //Erases and refills the card multicast registers. Used when an address 287 //Erases and refills the card multicast registers. Used when an address
288 // has been deleted and all bits must be recomputed. 288 // has been deleted and all bits must be recomputed.
289 pWb35Reg->M04_MulticastAddress1 = 0; 289 reg->M04_MulticastAddress1 = 0;
290 pWb35Reg->M08_MulticastAddress2 = 0; 290 reg->M08_MulticastAddress2 = 0;
291 291
292 while( number ) 292 while( number )
293 { 293 {
294 number--; 294 number--;
295 CardGetMulticastBit( (address+(number*ETH_LENGTH_OF_ADDRESS)), &Byte, &Bit); 295 CardGetMulticastBit( (address+(number*ETH_LENGTH_OF_ADDRESS)), &Byte, &Bit);
296 pWb35Reg->Multicast[Byte] |= Bit; 296 reg->Multicast[Byte] |= Bit;
297 } 297 }
298 298
299 // Updating register 299 // Updating register
300 Wb35Reg_BurstWrite( pHwData, 0x0804, (u32 *)pWb35Reg->Multicast, 2, AUTO_INCREMENT ); 300 Wb35Reg_BurstWrite( pHwData, 0x0804, (u32 *)reg->Multicast, 2, AUTO_INCREMENT );
301} 301}
302//--------------------------------------------------------------------------------------------------- 302//---------------------------------------------------------------------------------------------------
303u8 hal_get_accept_beacon( phw_data_t pHwData ) 303u8 hal_get_accept_beacon( phw_data_t pHwData )
304{ 304{
305 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 305 struct wb35_reg *reg = &pHwData->reg;
306 306
307 if( pHwData->SurpriseRemove ) return 0; 307 if( pHwData->SurpriseRemove ) return 0;
308 308
309 if( pWb35Reg->M00_MacControl & 0x04000000 ) 309 if( reg->M00_MacControl & 0x04000000 )
310 return 1; 310 return 1;
311 else 311 else
312 return 0; 312 return 0;
@@ -320,7 +320,7 @@ unsigned char hal_reset_hardware( phw_data_t pHwData, void* ppa )
320 320
321void hal_stop( phw_data_t pHwData ) 321void hal_stop( phw_data_t pHwData )
322{ 322{
323 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 323 struct wb35_reg *reg = &pHwData->reg;
324 324
325 pHwData->Wb35Rx.rx_halt = 1; 325 pHwData->Wb35Rx.rx_halt = 1;
326 Wb35Rx_stop( pHwData ); 326 Wb35Rx_stop( pHwData );
@@ -328,18 +328,18 @@ void hal_stop( phw_data_t pHwData )
328 pHwData->Wb35Tx.tx_halt = 1; 328 pHwData->Wb35Tx.tx_halt = 1;
329 Wb35Tx_stop( pHwData ); 329 Wb35Tx_stop( pHwData );
330 330
331 pWb35Reg->D00_DmaControl &= ~0xc0000000;//Tx Off, Rx Off 331 reg->D00_DmaControl &= ~0xc0000000;//Tx Off, Rx Off
332 Wb35Reg_Write( pHwData, 0x0400, pWb35Reg->D00_DmaControl ); 332 Wb35Reg_Write( pHwData, 0x0400, reg->D00_DmaControl );
333 333
334 WbUsb_Stop( pHwData ); // 20051230 Add.4 334 WbUsb_Stop( pHwData ); // 20051230 Add.4
335} 335}
336 336
337unsigned char hal_idle(phw_data_t pHwData) 337unsigned char hal_idle(phw_data_t pHwData)
338{ 338{
339 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 339 struct wb35_reg *reg = &pHwData->reg;
340 PWBUSB pWbUsb = &pHwData->WbUsb; 340 PWBUSB pWbUsb = &pHwData->WbUsb;
341 341
342 if( !pHwData->SurpriseRemove && ( pWbUsb->DetectCount || pWb35Reg->EP0vm_state!=VM_STOP ) ) 342 if( !pHwData->SurpriseRemove && ( pWbUsb->DetectCount || reg->EP0vm_state!=VM_STOP ) )
343 return FALSE; 343 return FALSE;
344 344
345 return TRUE; 345 return TRUE;
@@ -347,19 +347,19 @@ unsigned char hal_idle(phw_data_t pHwData)
347//--------------------------------------------------------------------------------------------------- 347//---------------------------------------------------------------------------------------------------
348void hal_set_cwmin( phw_data_t pHwData, u8 cwin_min ) 348void hal_set_cwmin( phw_data_t pHwData, u8 cwin_min )
349{ 349{
350 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 350 struct wb35_reg *reg = &pHwData->reg;
351 351
352 if( pHwData->SurpriseRemove ) return; 352 if( pHwData->SurpriseRemove ) return;
353 353
354 pHwData->cwmin = cwin_min; 354 pHwData->cwmin = cwin_min;
355 pWb35Reg->M2C_MacControl &= ~0x7c00; //bit 10 ~ 14 355 reg->M2C_MacControl &= ~0x7c00; //bit 10 ~ 14
356 pWb35Reg->M2C_MacControl |= (pHwData->cwmin<<10); 356 reg->M2C_MacControl |= (pHwData->cwmin<<10);
357 Wb35Reg_Write( pHwData, 0x082c, pWb35Reg->M2C_MacControl ); 357 Wb35Reg_Write( pHwData, 0x082c, reg->M2C_MacControl );
358} 358}
359 359
360s32 hal_get_rssi( phw_data_t pHwData, u32 *HalRssiArry, u8 Count ) 360s32 hal_get_rssi( phw_data_t pHwData, u32 *HalRssiArry, u8 Count )
361{ 361{
362 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 362 struct wb35_reg *reg = &pHwData->reg;
363 R01_DESCRIPTOR r01; 363 R01_DESCRIPTOR r01;
364 s32 ltmp = 0, tmp; 364 s32 ltmp = 0, tmp;
365 u8 i; 365 u8 i;
@@ -373,7 +373,7 @@ s32 hal_get_rssi( phw_data_t pHwData, u32 *HalRssiArry, u8 Count )
373 for (i=0; i<Count; i++) 373 for (i=0; i<Count; i++)
374 { 374 {
375 r01.value = HalRssiArry[i]; 375 r01.value = HalRssiArry[i];
376 tmp = ((( r01.R01_AGC_state + pWb35Reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195; 376 tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
377 ltmp += tmp; 377 ltmp += tmp;
378 } 378 }
379 ltmp /= Count; 379 ltmp /= Count;
@@ -388,7 +388,7 @@ s32 hal_get_rssi( phw_data_t pHwData, u32 *HalRssiArry, u8 Count )
388//---------------------------------------------------------------------------------------------------- 388//----------------------------------------------------------------------------------------------------
389s32 hal_get_rssi_bss( phw_data_t pHwData, u16 idx, u8 Count ) 389s32 hal_get_rssi_bss( phw_data_t pHwData, u16 idx, u8 Count )
390{ 390{
391 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 391 struct wb35_reg *reg = &pHwData->reg;
392 R01_DESCRIPTOR r01; 392 R01_DESCRIPTOR r01;
393 s32 ltmp = 0, tmp; 393 s32 ltmp = 0, tmp;
394 u8 i, j; 394 u8 i, j;
@@ -405,7 +405,7 @@ s32 hal_get_rssi_bss( phw_data_t pHwData, u16 idx, u8 Count )
405 for (i=0; i<Count; i++) 405 for (i=0; i<Count; i++)
406 { 406 {
407 r01.value = HalRssiArry[i]; 407 r01.value = HalRssiArry[i];
408 tmp = ((( r01.R01_AGC_state + pWb35Reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195; 408 tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
409 ltmp += tmp; 409 ltmp += tmp;
410 } 410 }
411#else 411#else
@@ -416,7 +416,7 @@ s32 hal_get_rssi_bss( phw_data_t pHwData, u16 idx, u8 Count )
416 for (i=0; i<Count; i++) 416 for (i=0; i<Count; i++)
417 { 417 {
418 r01.value = psBSS(idx)->HalRssi[j]; 418 r01.value = psBSS(idx)->HalRssi[j];
419 tmp = ((( r01.R01_AGC_state + pWb35Reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195; 419 tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
420 ltmp += tmp; 420 ltmp += tmp;
421 if (j == 0) 421 if (j == 0)
422 { 422 {
@@ -444,7 +444,7 @@ void hal_led_control_1a( phw_data_t pHwData )
444void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 ) 444void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
445{ 445{
446 PADAPTER Adapter = pHwData->Adapter; 446 PADAPTER Adapter = pHwData->Adapter;
447 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 447 struct wb35_reg *reg = &pHwData->reg;
448 u32 LEDSet = (pHwData->SoftwareSet & HAL_LED_SET_MASK) >> HAL_LED_SET_SHIFT; 448 u32 LEDSet = (pHwData->SoftwareSet & HAL_LED_SET_MASK) >> HAL_LED_SET_SHIFT;
449 u8 LEDgray[20] = { 0,3,4,6,8,10,11,12,13,14,15,14,13,12,11,10,8,6,4,2 }; 449 u8 LEDgray[20] = { 0,3,4,6,8,10,11,12,13,14,15,14,13,12,11,10,8,6,4,2 };
450 u8 LEDgray2[30] = { 7,8,9,10,11,12,13,14,15,0,0,0,0,0,0,0,0,0,0,0,0,0,15,14,13,12,11,10,9,8 }; 450 u8 LEDgray2[30] = { 7,8,9,10,11,12,13,14,15,0,0,0,0,0,0,0,0,0,0,0,0,0,15,14,13,12,11,10,9,8 };
@@ -487,21 +487,21 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
487 } 487 }
488 pHwData->LED_Blinking++; 488 pHwData->LED_Blinking++;
489 489
490 pWb35Reg->U1BC_LEDConfigure = ltmp; 490 reg->U1BC_LEDConfigure = ltmp;
491 if( LEDSet != 7 ) // Only 111 mode has 2 LEDs on PCB. 491 if( LEDSet != 7 ) // Only 111 mode has 2 LEDs on PCB.
492 { 492 {
493 pWb35Reg->U1BC_LEDConfigure |= (ltmp &0xff)<<8; // Copy LED result to each LED control register 493 reg->U1BC_LEDConfigure |= (ltmp &0xff)<<8; // Copy LED result to each LED control register
494 pWb35Reg->U1BC_LEDConfigure |= (ltmp &0xff00)>>8; 494 reg->U1BC_LEDConfigure |= (ltmp &0xff00)>>8;
495 } 495 }
496 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); 496 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
497 } 497 }
498 } 498 }
499 else if( pHwData->CurrentRadioSw || pHwData->CurrentRadioHw ) // If radio off 499 else if( pHwData->CurrentRadioSw || pHwData->CurrentRadioHw ) // If radio off
500 { 500 {
501 if( pWb35Reg->U1BC_LEDConfigure & 0x1010 ) 501 if( reg->U1BC_LEDConfigure & 0x1010 )
502 { 502 {
503 pWb35Reg->U1BC_LEDConfigure &= ~0x1010; 503 reg->U1BC_LEDConfigure &= ~0x1010;
504 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); 504 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
505 } 505 }
506 } 506 }
507 else 507 else
@@ -516,15 +516,15 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
516 { 516 {
517 if( pHwData->LED_Blinking == 0 ) 517 if( pHwData->LED_Blinking == 0 )
518 { 518 {
519 pWb35Reg->U1BC_LEDConfigure |= 0x10; 519 reg->U1BC_LEDConfigure |= 0x10;
520 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_0 On 520 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 On
521 pHwData->LED_Blinking = 1; 521 pHwData->LED_Blinking = 1;
522 TimeInterval = 300; 522 TimeInterval = 300;
523 } 523 }
524 else 524 else
525 { 525 {
526 pWb35Reg->U1BC_LEDConfigure &= ~0x10; 526 reg->U1BC_LEDConfigure &= ~0x10;
527 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_0 Off 527 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
528 pHwData->LED_Blinking = 0; 528 pHwData->LED_Blinking = 0;
529 TimeInterval = 300; 529 TimeInterval = 300;
530 } 530 }
@@ -532,20 +532,20 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
532 else 532 else
533 { 533 {
534 //Turn Off LED_0 534 //Turn Off LED_0
535 if( pWb35Reg->U1BC_LEDConfigure & 0x10 ) 535 if( reg->U1BC_LEDConfigure & 0x10 )
536 { 536 {
537 pWb35Reg->U1BC_LEDConfigure &= ~0x10; 537 reg->U1BC_LEDConfigure &= ~0x10;
538 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_0 Off 538 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
539 } 539 }
540 } 540 }
541 } 541 }
542 else 542 else
543 { 543 {
544 // Turn On LED_0 544 // Turn On LED_0
545 if( (pWb35Reg->U1BC_LEDConfigure & 0x10) == 0 ) 545 if( (reg->U1BC_LEDConfigure & 0x10) == 0 )
546 { 546 {
547 pWb35Reg->U1BC_LEDConfigure |= 0x10; 547 reg->U1BC_LEDConfigure |= 0x10;
548 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_0 Off 548 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
549 } 549 }
550 } 550 }
551 break; 551 break;
@@ -558,16 +558,16 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
558 { 558 {
559 if( pHwData->LED_Blinking == 0 ) 559 if( pHwData->LED_Blinking == 0 )
560 { 560 {
561 pWb35Reg->U1BC_LEDConfigure &= ~0xf; 561 reg->U1BC_LEDConfigure &= ~0xf;
562 pWb35Reg->U1BC_LEDConfigure |= 0x10; 562 reg->U1BC_LEDConfigure |= 0x10;
563 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_0 On 563 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 On
564 pHwData->LED_Blinking = 1; 564 pHwData->LED_Blinking = 1;
565 TimeInterval = 300; 565 TimeInterval = 300;
566 } 566 }
567 else 567 else
568 { 568 {
569 pWb35Reg->U1BC_LEDConfigure &= ~0x1f; 569 reg->U1BC_LEDConfigure &= ~0x1f;
570 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_0 Off 570 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
571 pHwData->LED_Blinking = 0; 571 pHwData->LED_Blinking = 0;
572 TimeInterval = 300; 572 TimeInterval = 300;
573 } 573 }
@@ -575,26 +575,26 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
575 else 575 else
576 { 576 {
577 // 20060901 Gray blinking if in disconnect state and not scanning 577 // 20060901 Gray blinking if in disconnect state and not scanning
578 ltmp = pWb35Reg->U1BC_LEDConfigure; 578 ltmp = reg->U1BC_LEDConfigure;
579 pWb35Reg->U1BC_LEDConfigure &= ~0x1f; 579 reg->U1BC_LEDConfigure &= ~0x1f;
580 if( LEDgray2[(pHwData->LED_Blinking%30)] ) 580 if( LEDgray2[(pHwData->LED_Blinking%30)] )
581 { 581 {
582 pWb35Reg->U1BC_LEDConfigure |= 0x10; 582 reg->U1BC_LEDConfigure |= 0x10;
583 pWb35Reg->U1BC_LEDConfigure |= LEDgray2[ (pHwData->LED_Blinking%30) ]; 583 reg->U1BC_LEDConfigure |= LEDgray2[ (pHwData->LED_Blinking%30) ];
584 } 584 }
585 pHwData->LED_Blinking++; 585 pHwData->LED_Blinking++;
586 if( pWb35Reg->U1BC_LEDConfigure != ltmp ) 586 if( reg->U1BC_LEDConfigure != ltmp )
587 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_0 Off 587 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
588 TimeInterval = 100; 588 TimeInterval = 100;
589 } 589 }
590 } 590 }
591 else 591 else
592 { 592 {
593 // Turn On LED_0 593 // Turn On LED_0
594 if( (pWb35Reg->U1BC_LEDConfigure & 0x10) == 0 ) 594 if( (reg->U1BC_LEDConfigure & 0x10) == 0 )
595 { 595 {
596 pWb35Reg->U1BC_LEDConfigure |= 0x10; 596 reg->U1BC_LEDConfigure |= 0x10;
597 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_0 Off 597 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
598 } 598 }
599 } 599 }
600 break; 600 break;
@@ -607,15 +607,15 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
607 { 607 {
608 if( pHwData->LED_Blinking == 0 ) 608 if( pHwData->LED_Blinking == 0 )
609 { 609 {
610 pWb35Reg->U1BC_LEDConfigure |= 0x1000; 610 reg->U1BC_LEDConfigure |= 0x1000;
611 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_1 On 611 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
612 pHwData->LED_Blinking = 1; 612 pHwData->LED_Blinking = 1;
613 TimeInterval = 300; 613 TimeInterval = 300;
614 } 614 }
615 else 615 else
616 { 616 {
617 pWb35Reg->U1BC_LEDConfigure &= ~0x1000; 617 reg->U1BC_LEDConfigure &= ~0x1000;
618 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_1 Off 618 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 Off
619 pHwData->LED_Blinking = 0; 619 pHwData->LED_Blinking = 0;
620 TimeInterval = 300; 620 TimeInterval = 300;
621 } 621 }
@@ -623,10 +623,10 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
623 else 623 else
624 { 624 {
625 //Turn Off LED_1 625 //Turn Off LED_1
626 if( pWb35Reg->U1BC_LEDConfigure & 0x1000 ) 626 if( reg->U1BC_LEDConfigure & 0x1000 )
627 { 627 {
628 pWb35Reg->U1BC_LEDConfigure &= ~0x1000; 628 reg->U1BC_LEDConfigure &= ~0x1000;
629 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_1 Off 629 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 Off
630 } 630 }
631 } 631 }
632 } 632 }
@@ -636,10 +636,10 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
636 if( (OS_CURRENT_RX_BYTE( Adapter ) != pHwData->RxByteCountLast ) || 636 if( (OS_CURRENT_RX_BYTE( Adapter ) != pHwData->RxByteCountLast ) ||
637 (OS_CURRENT_TX_BYTE( Adapter ) != pHwData->TxByteCountLast ) ) 637 (OS_CURRENT_TX_BYTE( Adapter ) != pHwData->TxByteCountLast ) )
638 { 638 {
639 if( (pWb35Reg->U1BC_LEDConfigure & 0x3000) != 0x3000 ) 639 if( (reg->U1BC_LEDConfigure & 0x3000) != 0x3000 )
640 { 640 {
641 pWb35Reg->U1BC_LEDConfigure |= 0x3000; 641 reg->U1BC_LEDConfigure |= 0x3000;
642 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_1 On 642 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
643 } 643 }
644 644
645 // Update variable 645 // Update variable
@@ -650,30 +650,30 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
650 else 650 else
651 { 651 {
652 // Turn On LED_1 and blinking if transmitting/receiving 652 // Turn On LED_1 and blinking if transmitting/receiving
653 if( (pWb35Reg->U1BC_LEDConfigure & 0x3000) != 0x1000 ) 653 if( (reg->U1BC_LEDConfigure & 0x3000) != 0x1000 )
654 { 654 {
655 pWb35Reg->U1BC_LEDConfigure &= ~0x3000; 655 reg->U1BC_LEDConfigure &= ~0x3000;
656 pWb35Reg->U1BC_LEDConfigure |= 0x1000; 656 reg->U1BC_LEDConfigure |= 0x1000;
657 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); // LED_1 On 657 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
658 } 658 }
659 } 659 }
660 } 660 }
661 break; 661 break;
662 662
663 default: // Default setting. 2 LED be placed on PCB. LED_0: Link On LED_1 Active 663 default: // Default setting. 2 LED be placed on PCB. LED_0: Link On LED_1 Active
664 if( (pWb35Reg->U1BC_LEDConfigure & 0x3000) != 0x3000 ) 664 if( (reg->U1BC_LEDConfigure & 0x3000) != 0x3000 )
665 { 665 {
666 pWb35Reg->U1BC_LEDConfigure |= 0x3000;// LED_1 is always on and event enable 666 reg->U1BC_LEDConfigure |= 0x3000;// LED_1 is always on and event enable
667 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); 667 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
668 } 668 }
669 669
670 if( pHwData->LED_Blinking ) 670 if( pHwData->LED_Blinking )
671 { 671 {
672 // Gray blinking 672 // Gray blinking
673 pWb35Reg->U1BC_LEDConfigure &= ~0x0f; 673 reg->U1BC_LEDConfigure &= ~0x0f;
674 pWb35Reg->U1BC_LEDConfigure |= 0x10; 674 reg->U1BC_LEDConfigure |= 0x10;
675 pWb35Reg->U1BC_LEDConfigure |= LEDgray[ (pHwData->LED_Blinking-1)%20 ]; 675 reg->U1BC_LEDConfigure |= LEDgray[ (pHwData->LED_Blinking-1)%20 ];
676 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); 676 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
677 677
678 pHwData->LED_Blinking += 2; 678 pHwData->LED_Blinking += 2;
679 if( pHwData->LED_Blinking < 40 ) 679 if( pHwData->LED_Blinking < 40 )
@@ -681,28 +681,28 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
681 else 681 else
682 { 682 {
683 pHwData->LED_Blinking = 0; // Stop blinking 683 pHwData->LED_Blinking = 0; // Stop blinking
684 pWb35Reg->U1BC_LEDConfigure &= ~0x0f; 684 reg->U1BC_LEDConfigure &= ~0x0f;
685 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); 685 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
686 } 686 }
687 break; 687 break;
688 } 688 }
689 689
690 if( pHwData->LED_LinkOn ) 690 if( pHwData->LED_LinkOn )
691 { 691 {
692 if( !(pWb35Reg->U1BC_LEDConfigure & 0x10) ) // Check the LED_0 692 if( !(reg->U1BC_LEDConfigure & 0x10) ) // Check the LED_0
693 { 693 {
694 //Try to turn ON LED_0 after gray blinking 694 //Try to turn ON LED_0 after gray blinking
695 pWb35Reg->U1BC_LEDConfigure |= 0x10; 695 reg->U1BC_LEDConfigure |= 0x10;
696 pHwData->LED_Blinking = 1; //Start blinking 696 pHwData->LED_Blinking = 1; //Start blinking
697 TimeInterval = 50; 697 TimeInterval = 50;
698 } 698 }
699 } 699 }
700 else 700 else
701 { 701 {
702 if( pWb35Reg->U1BC_LEDConfigure & 0x10 ) // Check the LED_0 702 if( reg->U1BC_LEDConfigure & 0x10 ) // Check the LED_0
703 { 703 {
704 pWb35Reg->U1BC_LEDConfigure &= ~0x10; 704 reg->U1BC_LEDConfigure &= ~0x10;
705 Wb35Reg_Write( pHwData, 0x03bc, pWb35Reg->U1BC_LEDConfigure ); 705 Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
706 } 706 }
707 } 707 }
708 break; 708 break;
@@ -744,28 +744,28 @@ void hal_reset_counter( phw_data_t pHwData )
744 744
745void hal_set_radio_mode( phw_data_t pHwData, unsigned char radio_off) 745void hal_set_radio_mode( phw_data_t pHwData, unsigned char radio_off)
746{ 746{
747 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 747 struct wb35_reg *reg = &pHwData->reg;
748 748
749 if( pHwData->SurpriseRemove ) return; 749 if( pHwData->SurpriseRemove ) return;
750 750
751 if (radio_off) //disable Baseband receive off 751 if (radio_off) //disable Baseband receive off
752 { 752 {
753 pHwData->CurrentRadioSw = 1; // off 753 pHwData->CurrentRadioSw = 1; // off
754 pWb35Reg->M24_MacControl &= 0xffffffbf; 754 reg->M24_MacControl &= 0xffffffbf;
755 } 755 }
756 else 756 else
757 { 757 {
758 pHwData->CurrentRadioSw = 0; // on 758 pHwData->CurrentRadioSw = 0; // on
759 pWb35Reg->M24_MacControl |= 0x00000040; 759 reg->M24_MacControl |= 0x00000040;
760 } 760 }
761 Wb35Reg_Write( pHwData, 0x0824, pWb35Reg->M24_MacControl ); 761 Wb35Reg_Write( pHwData, 0x0824, reg->M24_MacControl );
762} 762}
763 763
764u8 hal_get_antenna_number( phw_data_t pHwData ) 764u8 hal_get_antenna_number( phw_data_t pHwData )
765{ 765{
766 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 766 struct wb35_reg *reg = &pHwData->reg;
767 767
768 if ((pWb35Reg->BB2C & BIT(11)) == 0) 768 if ((reg->BB2C & BIT(11)) == 0)
769 return 0; 769 return 0;
770 else 770 else
771 return 1; 771 return 1;
@@ -774,14 +774,14 @@ u8 hal_get_antenna_number( phw_data_t pHwData )
774void hal_set_antenna_number( phw_data_t pHwData, u8 number ) 774void hal_set_antenna_number( phw_data_t pHwData, u8 number )
775{ 775{
776 776
777 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 777 struct wb35_reg *reg = &pHwData->reg;
778 778
779 if (number == 1) { 779 if (number == 1) {
780 pWb35Reg->BB2C |= BIT(11); 780 reg->BB2C |= BIT(11);
781 } else { 781 } else {
782 pWb35Reg->BB2C &= ~BIT(11); 782 reg->BB2C &= ~BIT(11);
783 } 783 }
784 Wb35Reg_Write( pHwData, 0x102c, pWb35Reg->BB2C ); 784 Wb35Reg_Write( pHwData, 0x102c, reg->BB2C );
785#ifdef _PE_STATE_DUMP_ 785#ifdef _PE_STATE_DUMP_
786 WBDEBUG(("Current antenna number : %d\n", number)); 786 WBDEBUG(("Current antenna number : %d\n", number));
787#endif 787#endif
@@ -791,13 +791,13 @@ void hal_set_antenna_number( phw_data_t pHwData, u8 number )
791//0 : radio on; 1: radio off 791//0 : radio on; 1: radio off
792u8 hal_get_hw_radio_off( phw_data_t pHwData ) 792u8 hal_get_hw_radio_off( phw_data_t pHwData )
793{ 793{
794 PWB35REG pWb35Reg = &pHwData->Wb35Reg; 794 struct wb35_reg *reg = &pHwData->reg;
795 795
796 if( pHwData->SurpriseRemove ) return 1; 796 if( pHwData->SurpriseRemove ) return 1;
797 797
798 //read the bit16 of register U1B0 798 //read the bit16 of register U1B0
799 Wb35Reg_Read( pHwData, 0x3b0, &pWb35Reg->U1B0 ); 799 Wb35Reg_Read( pHwData, 0x3b0, &reg->U1B0 );
800 if ((pWb35Reg->U1B0 & 0x00010000)) { 800 if ((reg->U1B0 & 0x00010000)) {
801 pHwData->CurrentRadioHw = 1; 801 pHwData->CurrentRadioHw = 1;
802 return 1; 802 return 1;
803 } else { 803 } else {
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 17:00:40 -0400