diff options
author | Pekka Enberg <penberg@cs.helsinki.fi> | 2008-10-22 12:07:03 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-01-06 16:51:39 -0500 |
commit | 34222e0a7b7328fab421c5a0926896378a3eb3fd (patch) | |
tree | 52e488aef20d63366ed0f85aeb9ca915a0962314 /drivers/staging/winbond/phy_calibration.c | |
parent | 4fc838fe40032240467a1745f8d9a7509d1fc766 (diff) |
Staging: w35und: use msleep() and udelay()
This patch removes the OS_SLEEP() wrapper and changes the call-sites to use
msleep() and udelay() where appropriate.
Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi>
Acked-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/winbond/phy_calibration.c')
-rw-r--r-- | drivers/staging/winbond/phy_calibration.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/staging/winbond/phy_calibration.c b/drivers/staging/winbond/phy_calibration.c index 272a65066ab..76183b23d72 100644 --- a/drivers/staging/winbond/phy_calibration.c +++ b/drivers/staging/winbond/phy_calibration.c | |||
@@ -1075,7 +1075,7 @@ void _tx_iq_calibration_winbond(hw_data_t *phw_data) | |||
1075 | //; [BB-chip]: Calibration (6h). Caculate TX-path IQ imbalance and setting TX path IQ compensation table | 1075 | //; [BB-chip]: Calibration (6h). Caculate TX-path IQ imbalance and setting TX path IQ compensation table |
1076 | //phy_set_rf_data(phw_data, 3, (3<<24)|0x025586); | 1076 | //phy_set_rf_data(phw_data, 3, (3<<24)|0x025586); |
1077 | 1077 | ||
1078 | OS_SLEEP(30000); // 20060612.1.a 30ms delay. Add the follow 2 lines | 1078 | msleep(30); // 20060612.1.a 30ms delay. Add the follow 2 lines |
1079 | //To adjust TXVGA to fit iq_mag_0 range from 1250 ~ 1750 | 1079 | //To adjust TXVGA to fit iq_mag_0 range from 1250 ~ 1750 |
1080 | adjust_TXVGA_for_iq_mag( phw_data ); | 1080 | adjust_TXVGA_for_iq_mag( phw_data ); |
1081 | 1081 | ||
@@ -1698,7 +1698,7 @@ unsigned char adjust_TXVGA_for_iq_mag(hw_data_t *phw_data) | |||
1698 | phw_data->txvga_setting_for_cal = current_txvga; | 1698 | phw_data->txvga_setting_for_cal = current_txvga; |
1699 | 1699 | ||
1700 | //pa_stall_execution(30000);//Sleep(30); | 1700 | //pa_stall_execution(30000);//Sleep(30); |
1701 | OS_SLEEP(30000); // 20060612.1.a | 1701 | msleep(30); // 20060612.1.a |
1702 | 1702 | ||
1703 | if( !hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl) ) // 20060718.1 modify | 1703 | if( !hw_get_dxx_reg(phw_data, REG_MODE_CTRL, ®_mode_ctrl) ) // 20060718.1 modify |
1704 | return FALSE; | 1704 | return FALSE; |
@@ -1715,10 +1715,10 @@ unsigned char adjust_TXVGA_for_iq_mag(hw_data_t *phw_data) | |||
1715 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); | 1715 | PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); |
1716 | 1716 | ||
1717 | //pa_stall_execution(US); | 1717 | //pa_stall_execution(US); |
1718 | OS_SLEEP(1); // 20060612.1.a | 1718 | udelay(1); // 20060612.1.a |
1719 | 1719 | ||
1720 | //pa_stall_execution(300);//Sleep(30); | 1720 | //pa_stall_execution(300);//Sleep(30); |
1721 | OS_SLEEP(300); // 20060612.1.a | 1721 | udelay(300); // 20060612.1.a |
1722 | 1722 | ||
1723 | // b. | 1723 | // b. |
1724 | hw_get_dxx_reg(phw_data, REG_CALIB_READ1, &val); | 1724 | hw_get_dxx_reg(phw_data, REG_CALIB_READ1, &val); |
@@ -1726,7 +1726,7 @@ unsigned char adjust_TXVGA_for_iq_mag(hw_data_t *phw_data) | |||
1726 | PHY_DEBUG(("[CAL] CALIB_READ1 = 0x%08X\n", val)); | 1726 | PHY_DEBUG(("[CAL] CALIB_READ1 = 0x%08X\n", val)); |
1727 | //pa_stall_execution(US); | 1727 | //pa_stall_execution(US); |
1728 | //pa_stall_execution(300);//Sleep(30); | 1728 | //pa_stall_execution(300);//Sleep(30); |
1729 | OS_SLEEP(300); // 20060612.1.a | 1729 | udelay(300); // 20060612.1.a |
1730 | 1730 | ||
1731 | iqcal_tone_i0 = _s13_to_s32(val & 0x00001FFF); | 1731 | iqcal_tone_i0 = _s13_to_s32(val & 0x00001FFF); |
1732 | iqcal_tone_q0 = _s13_to_s32((val & 0x03FFE000) >> 13); | 1732 | iqcal_tone_q0 = _s13_to_s32((val & 0x03FFE000) >> 13); |