diff options
author | Javier M. Mellid <jmunhoz@igalia.com> | 2012-04-26 14:45:53 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-04-29 21:31:49 -0400 |
commit | 9be467d5b7ef350ef50eddcccfb5ad69b2c19090 (patch) | |
tree | d8a18721b9264e6bf0abb92c4020bde6f958e794 /drivers/staging/sm7xx/smtcfb.c | |
parent | 6f54b0948ad459fa9ffa22335aba2e2a86365b60 (diff) |
staging: sm7xx: merge hardware information in smtcfb_info struct
With this patch smtcfb_info becomes the main structure to reach/handle
state. fb_info struct links this struct via its private data field.
This change improves encapsulation in functions. It reduces the number
of arguments used in signatures too.
Tested with SM712
Signed-off-by: Javier M. Mellid <jmunhoz@igalia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/sm7xx/smtcfb.c')
-rw-r--r-- | drivers/staging/sm7xx/smtcfb.c | 128 |
1 files changed, 56 insertions, 72 deletions
diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c index e351e083a86..5defdaf206d 100644 --- a/drivers/staging/sm7xx/smtcfb.c +++ b/drivers/staging/sm7xx/smtcfb.c | |||
@@ -40,21 +40,12 @@ struct screen_info smtc_screen_info; | |||
40 | */ | 40 | */ |
41 | struct smtcfb_info { | 41 | struct smtcfb_info { |
42 | struct fb_info fb; | 42 | struct fb_info fb; |
43 | struct display_switch *dispsw; | 43 | struct pci_dev *pdev; |
44 | struct pci_dev *dev; | ||
45 | signed int currcon; | ||
46 | |||
47 | struct { | 44 | struct { |
48 | u8 red, green, blue; | 45 | u8 red, green, blue; |
49 | } palette[NR_RGB]; | 46 | } palette[NR_RGB]; |
50 | |||
51 | u_int palette_size; | 47 | u_int palette_size; |
52 | }; | ||
53 | 48 | ||
54 | struct par_info { | ||
55 | /* | ||
56 | * Hardware | ||
57 | */ | ||
58 | u16 chipID; | 49 | u16 chipID; |
59 | unsigned char __iomem *m_pMMIO; | 50 | unsigned char __iomem *m_pMMIO; |
60 | char __iomem *m_pLFB; | 51 | char __iomem *m_pLFB; |
@@ -97,7 +88,6 @@ char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */ | |||
97 | char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */ | 88 | char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */ |
98 | 89 | ||
99 | static u32 colreg[17]; | 90 | static u32 colreg[17]; |
100 | static struct par_info hw; /* hardware information */ | ||
101 | 91 | ||
102 | static struct fb_var_screeninfo smtcfb_var = { | 92 | static struct fb_var_screeninfo smtcfb_var = { |
103 | .xres = 1024, | 93 | .xres = 1024, |
@@ -122,32 +112,29 @@ static struct fb_fix_screeninfo smtcfb_fix = { | |||
122 | .accel = FB_ACCEL_SMI_LYNX, | 112 | .accel = FB_ACCEL_SMI_LYNX, |
123 | }; | 113 | }; |
124 | 114 | ||
125 | static void sm712_set_timing(struct smtcfb_info *sfb, | 115 | static void sm712_set_timing(struct smtcfb_info *sfb) |
126 | struct par_info *ppar_info) | ||
127 | { | 116 | { |
128 | int i = 0, j = 0; | 117 | int i = 0, j = 0; |
129 | u32 m_nScreenStride; | 118 | u32 m_nScreenStride; |
130 | 119 | ||
131 | dev_dbg(&sfb->dev->dev, | 120 | dev_dbg(&sfb->pdev->dev, |
132 | "ppar_info->width=%d ppar_info->height=%d" | 121 | "sfb->width=%d sfb->height=%d " |
133 | "sfb->fb.var.bits_per_pixel=%d ppar_info->hz=%d\n", | 122 | "sfb->fb.var.bits_per_pixel=%d sfb->hz=%d\n", |
134 | ppar_info->width, ppar_info->height, | 123 | sfb->width, sfb->height, sfb->fb.var.bits_per_pixel, sfb->hz); |
135 | sfb->fb.var.bits_per_pixel, ppar_info->hz); | ||
136 | 124 | ||
137 | for (j = 0; j < numVGAModes; j++) { | 125 | for (j = 0; j < numVGAModes; j++) { |
138 | if (VGAMode[j].mmSizeX == ppar_info->width && | 126 | if (VGAMode[j].mmSizeX == sfb->width && |
139 | VGAMode[j].mmSizeY == ppar_info->height && | 127 | VGAMode[j].mmSizeY == sfb->height && |
140 | VGAMode[j].bpp == sfb->fb.var.bits_per_pixel && | 128 | VGAMode[j].bpp == sfb->fb.var.bits_per_pixel && |
141 | VGAMode[j].hz == ppar_info->hz) { | 129 | VGAMode[j].hz == sfb->hz) { |
142 | 130 | ||
143 | dev_dbg(&sfb->dev->dev, | 131 | dev_dbg(&sfb->pdev->dev, |
144 | "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d" | 132 | "VGAMode[j].mmSizeX=%d VGAMode[j].mmSizeY=%d " |
145 | "VGAMode[j].bpp=%d VGAMode[j].hz=%d\n", | 133 | "VGAMode[j].bpp=%d VGAMode[j].hz=%d\n", |
146 | VGAMode[j].mmSizeX, VGAMode[j].mmSizeY, | 134 | VGAMode[j].mmSizeX, VGAMode[j].mmSizeY, |
147 | VGAMode[j].bpp, VGAMode[j].hz); | 135 | VGAMode[j].bpp, VGAMode[j].hz); |
148 | 136 | ||
149 | dev_dbg(&sfb->dev->dev, | 137 | dev_dbg(&sfb->pdev->dev, "VGAMode index=%d\n", j); |
150 | "VGAMode index=%d\n", j); | ||
151 | 138 | ||
152 | smtc_mmiowb(0x0, 0x3c6); | 139 | smtc_mmiowb(0x0, 0x3c6); |
153 | 140 | ||
@@ -208,37 +195,37 @@ static void sm712_set_timing(struct smtcfb_info *sfb, | |||
208 | smtc_mmiowb(0x67, 0x3c2); | 195 | smtc_mmiowb(0x67, 0x3c2); |
209 | 196 | ||
210 | /* set VPR registers */ | 197 | /* set VPR registers */ |
211 | writel(0x0, ppar_info->m_pVPR + 0x0C); | 198 | writel(0x0, sfb->m_pVPR + 0x0C); |
212 | writel(0x0, ppar_info->m_pVPR + 0x40); | 199 | writel(0x0, sfb->m_pVPR + 0x40); |
213 | 200 | ||
214 | /* set data width */ | 201 | /* set data width */ |
215 | m_nScreenStride = | 202 | m_nScreenStride = |
216 | (ppar_info->width * sfb->fb.var.bits_per_pixel) / 64; | 203 | (sfb->width * sfb->fb.var.bits_per_pixel) / 64; |
217 | switch (sfb->fb.var.bits_per_pixel) { | 204 | switch (sfb->fb.var.bits_per_pixel) { |
218 | case 8: | 205 | case 8: |
219 | writel(0x0, ppar_info->m_pVPR + 0x0); | 206 | writel(0x0, sfb->m_pVPR + 0x0); |
220 | break; | 207 | break; |
221 | case 16: | 208 | case 16: |
222 | writel(0x00020000, ppar_info->m_pVPR + 0x0); | 209 | writel(0x00020000, sfb->m_pVPR + 0x0); |
223 | break; | 210 | break; |
224 | case 24: | 211 | case 24: |
225 | writel(0x00040000, ppar_info->m_pVPR + 0x0); | 212 | writel(0x00040000, sfb->m_pVPR + 0x0); |
226 | break; | 213 | break; |
227 | case 32: | 214 | case 32: |
228 | writel(0x00030000, ppar_info->m_pVPR + 0x0); | 215 | writel(0x00030000, sfb->m_pVPR + 0x0); |
229 | break; | 216 | break; |
230 | } | 217 | } |
231 | writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride), | 218 | writel((u32) (((m_nScreenStride + 2) << 16) | m_nScreenStride), |
232 | ppar_info->m_pVPR + 0x10); | 219 | sfb->m_pVPR + 0x10); |
233 | 220 | ||
234 | } | 221 | } |
235 | 222 | ||
236 | static void sm712_setpalette(int regno, unsigned red, unsigned green, | 223 | static void sm712_setpalette(int regno, unsigned red, unsigned green, |
237 | unsigned blue, struct fb_info *info) | 224 | unsigned blue, struct fb_info *info) |
238 | { | 225 | { |
239 | struct par_info *cur_par = (struct par_info *)info->par; | 226 | struct smtcfb_info *sfb = info->par; |
240 | 227 | ||
241 | if (cur_par->BaseAddressInVRAM) | 228 | if (sfb->BaseAddressInVRAM) |
242 | /* | 229 | /* |
243 | * second display palette for dual head. Enable CRT RAM, 6-bit | 230 | * second display palette for dual head. Enable CRT RAM, 6-bit |
244 | * RAM | 231 | * RAM |
@@ -253,14 +240,13 @@ static void sm712_setpalette(int regno, unsigned red, unsigned green, | |||
253 | smtc_mmiowb(blue >> 10, dac_val); | 240 | smtc_mmiowb(blue >> 10, dac_val); |
254 | } | 241 | } |
255 | 242 | ||
256 | static void smtc_set_timing(struct smtcfb_info *sfb, struct par_info | 243 | static void smtc_set_timing(struct smtcfb_info *sfb) |
257 | *ppar_info) | ||
258 | { | 244 | { |
259 | switch (ppar_info->chipID) { | 245 | switch (sfb->chipID) { |
260 | case 0x710: | 246 | case 0x710: |
261 | case 0x712: | 247 | case 0x712: |
262 | case 0x720: | 248 | case 0x720: |
263 | sm712_set_timing(sfb, ppar_info); | 249 | sm712_set_timing(sfb); |
264 | break; | 250 | break; |
265 | } | 251 | } |
266 | } | 252 | } |
@@ -630,10 +616,10 @@ void smtcfb_setmode(struct smtcfb_info *sfb) | |||
630 | break; | 616 | break; |
631 | } | 617 | } |
632 | 618 | ||
633 | hw.width = sfb->fb.var.xres; | 619 | sfb->width = sfb->fb.var.xres; |
634 | hw.height = sfb->fb.var.yres; | 620 | sfb->height = sfb->fb.var.yres; |
635 | hw.hz = 60; | 621 | sfb->hz = 60; |
636 | smtc_set_timing(sfb, &hw); | 622 | smtc_set_timing(sfb); |
637 | } | 623 | } |
638 | 624 | ||
639 | static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | 625 | static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
@@ -680,8 +666,7 @@ static struct fb_ops smtcfb_ops = { | |||
680 | /* | 666 | /* |
681 | * Alloc struct smtcfb_info and assign the default value | 667 | * Alloc struct smtcfb_info and assign the default value |
682 | */ | 668 | */ |
683 | static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev, | 669 | static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *pdev, char *name) |
684 | char *name) | ||
685 | { | 670 | { |
686 | struct smtcfb_info *sfb; | 671 | struct smtcfb_info *sfb; |
687 | 672 | ||
@@ -690,8 +675,7 @@ static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev, | |||
690 | if (!sfb) | 675 | if (!sfb) |
691 | return NULL; | 676 | return NULL; |
692 | 677 | ||
693 | sfb->currcon = -1; | 678 | sfb->pdev = pdev; |
694 | sfb->dev = dev; | ||
695 | 679 | ||
696 | /*** Init sfb->fb with default value ***/ | 680 | /*** Init sfb->fb with default value ***/ |
697 | sfb->fb.flags = FBINFO_FLAG_DEFAULT; | 681 | sfb->fb.flags = FBINFO_FLAG_DEFAULT; |
@@ -715,7 +699,9 @@ static struct smtcfb_info *smtc_alloc_fb_info(struct pci_dev *dev, | |||
715 | /* text mode acceleration */ | 699 | /* text mode acceleration */ |
716 | sfb->fb.var.accel_flags = FB_ACCELF_TEXT; | 700 | sfb->fb.var.accel_flags = FB_ACCELF_TEXT; |
717 | sfb->fb.var.vmode = FB_VMODE_NONINTERLACED; | 701 | sfb->fb.var.vmode = FB_VMODE_NONINTERLACED; |
718 | sfb->fb.par = &hw; | 702 | |
703 | sfb->fb.par = sfb; | ||
704 | |||
719 | sfb->fb.pseudo_palette = colreg; | 705 | sfb->fb.pseudo_palette = colreg; |
720 | 706 | ||
721 | return sfb; | 707 | return sfb; |
@@ -842,14 +828,14 @@ static int __devinit smtcfb_pci_probe(struct pci_dev *pdev, | |||
842 | if (err) | 828 | if (err) |
843 | return err; | 829 | return err; |
844 | 830 | ||
845 | hw.chipID = ent->device; | ||
846 | sprintf(name, "sm%Xfb", hw.chipID); | ||
847 | |||
848 | sfb = smtc_alloc_fb_info(pdev, name); | 831 | sfb = smtc_alloc_fb_info(pdev, name); |
849 | 832 | ||
850 | if (!sfb) | 833 | if (!sfb) |
851 | goto failed_free; | 834 | goto failed_free; |
852 | 835 | ||
836 | sfb->chipID = ent->device; | ||
837 | sprintf(name, "sm%Xfb", sfb->chipID); | ||
838 | |||
853 | pci_set_drvdata(pdev, sfb); | 839 | pci_set_drvdata(pdev, sfb); |
854 | 840 | ||
855 | sm7xx_init_hw(); | 841 | sm7xx_init_hw(); |
@@ -872,29 +858,29 @@ static int __devinit smtcfb_pci_probe(struct pci_dev *pdev, | |||
872 | #endif | 858 | #endif |
873 | /* Map address and memory detection */ | 859 | /* Map address and memory detection */ |
874 | pFramebufferPhysical = pci_resource_start(pdev, 0); | 860 | pFramebufferPhysical = pci_resource_start(pdev, 0); |
875 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw.chipRevID); | 861 | pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chipRevID); |
876 | 862 | ||
877 | switch (hw.chipID) { | 863 | switch (sfb->chipID) { |
878 | case 0x710: | 864 | case 0x710: |
879 | case 0x712: | 865 | case 0x712: |
880 | sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000; | 866 | sfb->fb.fix.mmio_start = pFramebufferPhysical + 0x00400000; |
881 | sfb->fb.fix.mmio_len = 0x00400000; | 867 | sfb->fb.fix.mmio_len = 0x00400000; |
882 | smem_size = SM712_VIDEOMEMORYSIZE; | 868 | smem_size = SM712_VIDEOMEMORYSIZE; |
883 | #ifdef __BIG_ENDIAN | 869 | #ifdef __BIG_ENDIAN |
884 | hw.m_pLFB = (smtc_VRAMBaseAddress = | 870 | sfb->m_pLFB = (smtc_VRAMBaseAddress = |
885 | ioremap(pFramebufferPhysical, 0x00c00000)); | 871 | ioremap(pFramebufferPhysical, 0x00c00000)); |
886 | #else | 872 | #else |
887 | hw.m_pLFB = (smtc_VRAMBaseAddress = | 873 | sfb->m_pLFB = (smtc_VRAMBaseAddress = |
888 | ioremap(pFramebufferPhysical, 0x00800000)); | 874 | ioremap(pFramebufferPhysical, 0x00800000)); |
889 | #endif | 875 | #endif |
890 | hw.m_pMMIO = (smtc_RegBaseAddress = | 876 | sfb->m_pMMIO = (smtc_RegBaseAddress = |
891 | smtc_VRAMBaseAddress + 0x00700000); | 877 | smtc_VRAMBaseAddress + 0x00700000); |
892 | hw.m_pDPR = smtc_VRAMBaseAddress + 0x00408000; | 878 | sfb->m_pDPR = smtc_VRAMBaseAddress + 0x00408000; |
893 | hw.m_pVPR = hw.m_pLFB + 0x0040c000; | 879 | sfb->m_pVPR = sfb->m_pLFB + 0x0040c000; |
894 | #ifdef __BIG_ENDIAN | 880 | #ifdef __BIG_ENDIAN |
895 | if (sfb->fb.var.bits_per_pixel == 32) { | 881 | if (sfb->fb.var.bits_per_pixel == 32) { |
896 | smtc_VRAMBaseAddress += 0x800000; | 882 | smtc_VRAMBaseAddress += 0x800000; |
897 | hw.m_pLFB += 0x800000; | 883 | sfb->m_pLFB += 0x800000; |
898 | dev_info(&pdev->dev, | 884 | dev_info(&pdev->dev, |
899 | "smtc_VRAMBaseAddress=%p sfb->m_pLFB=%p", | 885 | "smtc_VRAMBaseAddress=%p sfb->m_pLFB=%p", |
900 | smtc_VRAMBaseAddress, sfb->m_pLFB); | 886 | smtc_VRAMBaseAddress, sfb->m_pLFB); |
@@ -924,12 +910,12 @@ static int __devinit smtcfb_pci_probe(struct pci_dev *pdev, | |||
924 | sfb->fb.fix.mmio_start = pFramebufferPhysical; | 910 | sfb->fb.fix.mmio_start = pFramebufferPhysical; |
925 | sfb->fb.fix.mmio_len = 0x00200000; | 911 | sfb->fb.fix.mmio_len = 0x00200000; |
926 | smem_size = SM722_VIDEOMEMORYSIZE; | 912 | smem_size = SM722_VIDEOMEMORYSIZE; |
927 | hw.m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000); | 913 | sfb->m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000); |
928 | hw.m_pLFB = (smtc_VRAMBaseAddress = | 914 | sfb->m_pLFB = (smtc_VRAMBaseAddress = |
929 | hw.m_pDPR + 0x00200000); | 915 | sfb->m_pDPR + 0x00200000); |
930 | hw.m_pMMIO = (smtc_RegBaseAddress = | 916 | sfb->m_pMMIO = (smtc_RegBaseAddress = |
931 | hw.m_pDPR + 0x000c0000); | 917 | sfb->m_pDPR + 0x000c0000); |
932 | hw.m_pVPR = hw.m_pDPR + 0x800; | 918 | sfb->m_pVPR = sfb->m_pDPR + 0x800; |
933 | 919 | ||
934 | smtc_seqw(0x62, 0xff); | 920 | smtc_seqw(0x62, 0xff); |
935 | smtc_seqw(0x6a, 0x0d); | 921 | smtc_seqw(0x6a, 0x0d); |
@@ -954,18 +940,16 @@ static int __devinit smtcfb_pci_probe(struct pci_dev *pdev, | |||
954 | 940 | ||
955 | smtcfb_setmode(sfb); | 941 | smtcfb_setmode(sfb); |
956 | /* Primary display starting from 0 position */ | 942 | /* Primary display starting from 0 position */ |
957 | hw.BaseAddressInVRAM = 0; | 943 | sfb->BaseAddressInVRAM = 0; |
958 | sfb->fb.par = &hw; | ||
959 | 944 | ||
960 | err = register_framebuffer(&sfb->fb); | 945 | err = register_framebuffer(&sfb->fb); |
961 | if (err < 0) | 946 | if (err < 0) |
962 | goto failed; | 947 | goto failed; |
963 | 948 | ||
964 | dev_info(&pdev->dev, | 949 | dev_info(&pdev->dev, |
965 | "Silicon Motion SM%X Rev%X primary display mode" | 950 | "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.", |
966 | "%dx%d-%d Init Complete.\n", hw.chipID, hw.chipRevID, | 951 | sfb->chipID, sfb->chipRevID, sfb->fb.var.xres, |
967 | sfb->fb.var.xres, sfb->fb.var.yres, | 952 | sfb->fb.var.yres, sfb->fb.var.bits_per_pixel); |
968 | sfb->fb.var.bits_per_pixel); | ||
969 | 953 | ||
970 | return 0; | 954 | return 0; |
971 | 955 | ||
@@ -1037,7 +1021,7 @@ static int smtcfb_pci_resume(struct device *device) | |||
1037 | 1021 | ||
1038 | /* reinit hardware */ | 1022 | /* reinit hardware */ |
1039 | sm7xx_init_hw(); | 1023 | sm7xx_init_hw(); |
1040 | switch (hw.chipID) { | 1024 | switch (sfb->chipID) { |
1041 | case 0x710: | 1025 | case 0x710: |
1042 | case 0x712: | 1026 | case 0x712: |
1043 | /* set MCLK = 14.31818 * (0x16 / 0x2) */ | 1027 | /* set MCLK = 14.31818 * (0x16 / 0x2) */ |