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authorWu Zhangjin <wuzhangjin@gmail.com>2010-01-06 03:33:10 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2010-03-03 19:42:44 -0500
commit3af805735a2538c38ec16014f19d19030544aaef (patch)
tree550cb88c4eb5106e83f206ef3ae96a48b95357bd /drivers/staging/sm7xx/smtcfb.c
parentd5a2ffd8e8d602293339f69180aff8914c454d83 (diff)
staging: sm7xx: remove the buggy 2D acceleration support
When scrolling the screen on the console with the 2D acceleration support, the whole system may hang. for example, when copying some files from another machine to YeeLoong netbook with the sm7xx video driver via scp and when the screen output is enabled, the system may hang. Before the bug is fixed, remove the 2D acceleration! Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: Teddy Wang <teddy.wang@siliconmotion.com.cn> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/sm7xx/smtcfb.c')
-rw-r--r--drivers/staging/sm7xx/smtcfb.c129
1 files changed, 10 insertions, 119 deletions
diff --git a/drivers/staging/sm7xx/smtcfb.c b/drivers/staging/sm7xx/smtcfb.c
index 080b51a6e55..863df038f0d 100644
--- a/drivers/staging/sm7xx/smtcfb.c
+++ b/drivers/staging/sm7xx/smtcfb.c
@@ -45,7 +45,6 @@
45struct screen_info smtc_screen_info; 45struct screen_info smtc_screen_info;
46 46
47#include "smtcfb.h" 47#include "smtcfb.h"
48#include "smtc2d.h"
49 48
50#ifdef DEBUG 49#ifdef DEBUG
51#define smdbg(format, arg...) printk(KERN_DEBUG format , ## arg) 50#define smdbg(format, arg...) printk(KERN_DEBUG format , ## arg)
@@ -120,10 +119,6 @@ static struct vesa_mode_table vesa_mode[] = {
120char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */ 119char __iomem *smtc_RegBaseAddress; /* Memory Map IO starting address */
121char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */ 120char __iomem *smtc_VRAMBaseAddress; /* video memory starting address */
122 121
123char *smtc_2DBaseAddress; /* 2D engine starting address */
124char *smtc_2Ddataport; /* 2D data port offset */
125short smtc_2Dacceleration;
126
127static u32 colreg[17]; 122static u32 colreg[17];
128static struct par_info hw; /* hardware information */ 123static struct par_info hw; /* hardware information */
129 124
@@ -135,16 +130,6 @@ u16 smtc_ChipIDs[] = {
135 130
136#define numSMTCchipIDs (sizeof(smtc_ChipIDs) / sizeof(u16)) 131#define numSMTCchipIDs (sizeof(smtc_ChipIDs) / sizeof(u16))
137 132
138void deWaitForNotBusy(void)
139{
140 unsigned long i = 0x1000000;
141 while (i--) {
142 if ((smtc_seqr(0x16) & 0x18) == 0x10)
143 break;
144 }
145 smtc_de_busy = 0;
146}
147
148static void sm712_set_timing(struct smtcfb_info *sfb, 133static void sm712_set_timing(struct smtcfb_info *sfb,
149 struct par_info *ppar_info) 134 struct par_info *ppar_info)
150{ 135{
@@ -324,7 +309,7 @@ static inline unsigned int chan_to_field(unsigned int chan,
324 return chan << bf->offset; 309 return chan << bf->offset;
325} 310}
326 311
327static int smtcfb_blank(int blank_mode, struct fb_info *info) 312static int cfb_blank(int blank_mode, struct fb_info *info)
328{ 313{
329 /* clear DPMS setting */ 314 /* clear DPMS setting */
330 switch (blank_mode) { 315 switch (blank_mode) {
@@ -622,93 +607,13 @@ smtcfb_write(struct fb_info *info, const char __user *buf, size_t count,
622} 607}
623#endif /* ! __BIG_ENDIAN */ 608#endif /* ! __BIG_ENDIAN */
624 609
625#include "smtc2d.c"
626
627void smtcfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
628{
629 struct par_info *p = (struct par_info *)info->par;
630
631 if (smtc_2Dacceleration) {
632 if (!area->width || !area->height)
633 return;
634
635 deCopy(p->BaseAddressInVRAM, 0, info->var.bits_per_pixel,
636 area->dx, area->dy, area->width, area->height,
637 p->BaseAddressInVRAM, 0, area->sx, area->sy, 0, 0xC);
638
639 } else
640 cfb_copyarea(info, area);
641}
642
643void smtcfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
644{
645 struct par_info *p = (struct par_info *)info->par;
646
647 if (smtc_2Dacceleration) {
648 if (!rect->width || !rect->height)
649 return;
650 if (info->var.bits_per_pixel >= 24)
651 deFillRect(p->BaseAddressInVRAM, 0, rect->dx * 3,
652 rect->dy * 3, rect->width * 3, rect->height,
653 rect->color);
654 else
655 deFillRect(p->BaseAddressInVRAM, 0, rect->dx, rect->dy,
656 rect->width, rect->height, rect->color);
657 } else
658 cfb_fillrect(info, rect);
659}
660
661void smtcfb_imageblit(struct fb_info *info, const struct fb_image *image)
662{
663 struct par_info *p = (struct par_info *)info->par;
664 u32 bg_col = 0, fg_col = 0;
665
666 if ((smtc_2Dacceleration) && (image->depth == 1)) {
667 if (smtc_de_busy)
668 deWaitForNotBusy();
669
670 switch (info->var.bits_per_pixel) {
671 case 8:
672 bg_col = image->bg_color;
673 fg_col = image->fg_color;
674 break;
675 case 16:
676 bg_col =
677 ((u32 *) (info->pseudo_palette))[image->bg_color];
678 fg_col =
679 ((u32 *) (info->pseudo_palette))[image->fg_color];
680 break;
681 case 32:
682 bg_col =
683 ((u32 *) (info->pseudo_palette))[image->bg_color];
684 fg_col =
685 ((u32 *) (info->pseudo_palette))[image->fg_color];
686 break;
687 }
688
689 deSystemMem2VideoMemMonoBlt(
690 image->data,
691 image->width / 8,
692 0,
693 p->BaseAddressInVRAM,
694 0,
695 0,
696 image->dx, image->dy,
697 image->width, image->height,
698 fg_col, bg_col,
699 0x0C);
700
701 } else
702 cfb_imageblit(info, image);
703}
704
705static struct fb_ops smtcfb_ops = { 610static struct fb_ops smtcfb_ops = {
706 .owner = THIS_MODULE, 611 .owner = THIS_MODULE,
707 .fb_setcolreg = smtc_setcolreg, 612 .fb_setcolreg = smtc_setcolreg,
708 .fb_blank = smtcfb_blank, 613 .fb_blank = cfb_blank,
709 .fb_fillrect = smtcfb_fillrect, 614 .fb_fillrect = cfb_fillrect,
710 .fb_imageblit = smtcfb_imageblit, 615 .fb_imageblit = cfb_imageblit,
711 .fb_copyarea = smtcfb_copyarea, 616 .fb_copyarea = cfb_copyarea,
712#ifdef __BIG_ENDIAN 617#ifdef __BIG_ENDIAN
713 .fb_read = smtcfb_read, 618 .fb_read = smtcfb_read,
714 .fb_write = smtcfb_write, 619 .fb_write = smtcfb_write,
@@ -772,12 +677,6 @@ void smtcfb_setmode(struct smtcfb_info *sfb)
772 hw.height = sfb->fb.var.yres; 677 hw.height = sfb->fb.var.yres;
773 hw.hz = 60; 678 hw.hz = 60;
774 smtc_set_timing(sfb, &hw); 679 smtc_set_timing(sfb, &hw);
775 if (smtc_2Dacceleration) {
776 printk("2D acceleration enabled!\n");
777 /* Init smtc drawing engine */
778 deInit(sfb->fb.var.xres, sfb->fb.var.yres,
779 sfb->fb.var.bits_per_pixel);
780 }
781} 680}
782 681
783/* 682/*
@@ -1004,9 +903,7 @@ static int __init smtcfb_pci_probe(struct pci_dev *pdev,
1004#endif 903#endif
1005 hw.m_pMMIO = (smtc_RegBaseAddress = 904 hw.m_pMMIO = (smtc_RegBaseAddress =
1006 smtc_VRAMBaseAddress + 0x00700000); 905 smtc_VRAMBaseAddress + 0x00700000);
1007 smtc_2DBaseAddress = (hw.m_pDPR = 906 hw.m_pDPR = smtc_VRAMBaseAddress + 0x00408000;
1008 smtc_VRAMBaseAddress + 0x00408000);
1009 smtc_2Ddataport = smtc_VRAMBaseAddress + DE_DATA_PORT_712;
1010 hw.m_pVPR = hw.m_pLFB + 0x0040c000; 907 hw.m_pVPR = hw.m_pLFB + 0x0040c000;
1011#ifdef __BIG_ENDIAN 908#ifdef __BIG_ENDIAN
1012 if (sfb->fb.var.bits_per_pixel == 32) { 909 if (sfb->fb.var.bits_per_pixel == 32) {
@@ -1035,27 +932,21 @@ static int __init smtcfb_pci_probe(struct pci_dev *pdev,
1035 if (sfb->fb.var.bits_per_pixel == 32) 932 if (sfb->fb.var.bits_per_pixel == 32)
1036 smtc_seqw(0x17, 0x30); 933 smtc_seqw(0x17, 0x30);
1037#endif 934#endif
1038#ifdef CONFIG_FB_SM7XX_ACCEL
1039 smtc_2Dacceleration = 1;
1040#endif
1041 break; 935 break;
1042 case 0x720: 936 case 0x720:
1043 sfb->fb.fix.mmio_start = pFramebufferPhysical; 937 sfb->fb.fix.mmio_start = pFramebufferPhysical;
1044 sfb->fb.fix.mmio_len = 0x00200000; 938 sfb->fb.fix.mmio_len = 0x00200000;
1045 smem_size = SM722_VIDEOMEMORYSIZE; 939 smem_size = SM722_VIDEOMEMORYSIZE;
1046 smtc_2DBaseAddress = (hw.m_pDPR = 940 hw.m_pDPR = ioremap(pFramebufferPhysical, 0x00a00000);
1047 ioremap(pFramebufferPhysical, 0x00a00000));
1048 hw.m_pLFB = (smtc_VRAMBaseAddress = 941 hw.m_pLFB = (smtc_VRAMBaseAddress =
1049 smtc_2DBaseAddress + 0x00200000); 942 hw.m_pDPR + 0x00200000);
1050 hw.m_pMMIO = (smtc_RegBaseAddress = 943 hw.m_pMMIO = (smtc_RegBaseAddress =
1051 smtc_2DBaseAddress + 0x000c0000); 944 hw.m_pDPR + 0x000c0000);
1052 smtc_2Ddataport = smtc_2DBaseAddress + DE_DATA_PORT_722; 945 hw.m_pVPR = hw.m_pDPR + 0x800;
1053 hw.m_pVPR = smtc_2DBaseAddress + 0x800;
1054 946
1055 smtc_seqw(0x62, 0xff); 947 smtc_seqw(0x62, 0xff);
1056 smtc_seqw(0x6a, 0x0d); 948 smtc_seqw(0x6a, 0x0d);
1057 smtc_seqw(0x6b, 0x02); 949 smtc_seqw(0x6b, 0x02);
1058 smtc_2Dacceleration = 0;
1059 break; 950 break;
1060 default: 951 default:
1061 printk(KERN_INFO 952 printk(KERN_INFO