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authorGreg Kroah-Hartman <gregkh@suse.de>2010-03-04 11:39:02 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2010-03-04 11:39:02 -0500
commitf341dddf1dadf64be309791f83d7904245f1261d (patch)
tree974c9e1f23da6743532162fd86cf019da497eaff /drivers/staging/rtl8187se
parenteaa5eec739637f32f8733d528ff0b94fd62b1214 (diff)
parentb02957d58a27525499ab10d272d3b44682a7ae50 (diff)
Staging: merge staging patches into Linus's main branch
There were a number of patches that went into Linus's tree already that conflicted with other changes in the staging branch. This merge resolves those merge conflicts. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/rtl8187se')
-rw-r--r--drivers/staging/rtl8187se/Kconfig1
-rw-r--r--drivers/staging/rtl8187se/Makefile1
-rw-r--r--drivers/staging/rtl8187se/TODO1
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211.h5
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c21
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c20
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c48
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c2
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c3
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c6
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c6
-rw-r--r--drivers/staging/rtl8187se/r8180.h4
-rw-r--r--drivers/staging/rtl8187se/r8180_93cx6.c146
-rw-r--r--drivers/staging/rtl8187se/r8180_93cx6.h17
-rw-r--r--drivers/staging/rtl8187se/r8180_core.c502
-rw-r--r--drivers/staging/rtl8187se/r8180_dm.c67
-rw-r--r--drivers/staging/rtl8187se/r8180_rtl8225z2.c232
-rw-r--r--drivers/staging/rtl8187se/r8185b_init.c986
18 files changed, 423 insertions, 1645 deletions
diff --git a/drivers/staging/rtl8187se/Kconfig b/drivers/staging/rtl8187se/Kconfig
index e24a6f7a0d8..155a78e0740 100644
--- a/drivers/staging/rtl8187se/Kconfig
+++ b/drivers/staging/rtl8187se/Kconfig
@@ -3,6 +3,7 @@ config R8187SE
3 depends on PCI && WLAN 3 depends on PCI && WLAN
4 select WIRELESS_EXT 4 select WIRELESS_EXT
5 select WEXT_PRIV 5 select WEXT_PRIV
6 select EEPROM_93CX6
6 default N 7 default N
7 ---help--- 8 ---help---
8 If built as a module, it will be called r8187se.ko. 9 If built as a module, it will be called r8187se.ko.
diff --git a/drivers/staging/rtl8187se/Makefile b/drivers/staging/rtl8187se/Makefile
index b395acf5a38..e6adf91cdd2 100644
--- a/drivers/staging/rtl8187se/Makefile
+++ b/drivers/staging/rtl8187se/Makefile
@@ -18,7 +18,6 @@ EXTRA_CFLAGS += -DENABLE_LPS
18 18
19r8187se-objs := \ 19r8187se-objs := \
20 r8180_core.o \ 20 r8180_core.o \
21 r8180_93cx6.o \
22 r8180_wx.o \ 21 r8180_wx.o \
23 r8180_rtl8225z2.o \ 22 r8180_rtl8225z2.o \
24 r8185b_init.o \ 23 r8185b_init.o \
diff --git a/drivers/staging/rtl8187se/TODO b/drivers/staging/rtl8187se/TODO
index a762e79873e..704949a9da0 100644
--- a/drivers/staging/rtl8187se/TODO
+++ b/drivers/staging/rtl8187se/TODO
@@ -5,7 +5,6 @@ TODO:
5- switch to use shared "librtl" instead of private ieee80211 stack 5- switch to use shared "librtl" instead of private ieee80211 stack
6- switch to use LIB80211 6- switch to use LIB80211
7- switch to use MAC80211 7- switch to use MAC80211
8- switch to use EEPROM_93CX6
9- use kernel coding style 8- use kernel coding style
10- checkpatch.pl fixes 9- checkpatch.pl fixes
11- sparse fixes 10- sparse fixes
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211.h b/drivers/staging/rtl8187se/ieee80211/ieee80211.h
index 9086047c32d..4cd95c3dc94 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211.h
@@ -29,6 +29,7 @@
29#include <linux/jiffies.h> 29#include <linux/jiffies.h>
30#include <linux/timer.h> 30#include <linux/timer.h>
31#include <linux/sched.h> 31#include <linux/sched.h>
32#include <linux/semaphore.h>
32#include <linux/wireless.h> 33#include <linux/wireless.h>
33#include <linux/ieee80211.h> 34#include <linux/ieee80211.h>
34 35
@@ -161,10 +162,6 @@ do { if (ieee80211_debug_level & (level)) \
161#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0) 162#define IEEE80211_DEBUG(level, fmt, args...) do {} while (0)
162#endif /* CONFIG_IEEE80211_DEBUG */ 163#endif /* CONFIG_IEEE80211_DEBUG */
163 164
164#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
165#define MAC_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], \
166 ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5]
167
168/* 165/*
169 * To use the debug system; 166 * To use the debug system;
170 * 167 *
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
index 172e8f3ae6c..40f1b99faad 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_ccmp.c
@@ -285,7 +285,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
285 if (!(keyidx & (1 << 5))) { 285 if (!(keyidx & (1 << 5))) {
286 if (net_ratelimit()) { 286 if (net_ratelimit()) {
287 printk(KERN_DEBUG "CCMP: received packet without ExtIV" 287 printk(KERN_DEBUG "CCMP: received packet without ExtIV"
288 " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); 288 " flag from %pM\n", hdr->addr2);
289 } 289 }
290 key->dot11RSNAStatsCCMPFormatErrors++; 290 key->dot11RSNAStatsCCMPFormatErrors++;
291 return -2; 291 return -2;
@@ -298,9 +298,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
298 } 298 }
299 if (!key->key_set) { 299 if (!key->key_set) {
300 if (net_ratelimit()) { 300 if (net_ratelimit()) {
301 printk(KERN_DEBUG "CCMP: received packet from " MAC_FMT 301 printk(KERN_DEBUG "CCMP: received packet from %pM"
302 " with keyid=%d that does not have a configured" 302 " with keyid=%d that does not have a configured"
303 " key\n", MAC_ARG(hdr->addr2), keyidx); 303 " key\n", hdr->addr2, keyidx);
304 } 304 }
305 return -3; 305 return -3;
306 } 306 }
@@ -315,11 +315,9 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
315 315
316 if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) { 316 if (memcmp(pn, key->rx_pn, CCMP_PN_LEN) <= 0) {
317 if (net_ratelimit()) { 317 if (net_ratelimit()) {
318 printk(KERN_DEBUG "CCMP: replay detected: STA=" MAC_FMT 318 printk(KERN_DEBUG "CCMP: replay detected: STA=%pM"
319 " previous PN %02x%02x%02x%02x%02x%02x " 319 " previous PN %pm received PN %pm\n",
320 "received PN %02x%02x%02x%02x%02x%02x\n", 320 hdr->addr2, key->rx_pn, pn);
321 MAC_ARG(hdr->addr2), MAC_ARG(key->rx_pn),
322 MAC_ARG(pn));
323 } 321 }
324 key->dot11RSNAStatsCCMPReplays++; 322 key->dot11RSNAStatsCCMPReplays++;
325 return -4; 323 return -4;
@@ -347,7 +345,7 @@ static int ieee80211_ccmp_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
347 if (memcmp(mic, a, CCMP_MIC_LEN) != 0) { 345 if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
348 if (net_ratelimit()) { 346 if (net_ratelimit()) {
349 printk(KERN_DEBUG "CCMP: decrypt failed: STA=" 347 printk(KERN_DEBUG "CCMP: decrypt failed: STA="
350 MAC_FMT "\n", MAC_ARG(hdr->addr2)); 348 "%pM\n", hdr->addr2);
351 } 349 }
352 key->dot11RSNAStatsCCMPDecryptErrors++; 350 key->dot11RSNAStatsCCMPDecryptErrors++;
353 return -5; 351 return -5;
@@ -423,11 +421,10 @@ static char * ieee80211_ccmp_print_stats(char *p, void *priv)
423{ 421{
424 struct ieee80211_ccmp_data *ccmp = priv; 422 struct ieee80211_ccmp_data *ccmp = priv;
425 p += sprintf(p, "key[%d] alg=CCMP key_set=%d " 423 p += sprintf(p, "key[%d] alg=CCMP key_set=%d "
426 "tx_pn=%02x%02x%02x%02x%02x%02x " 424 "tx_pn=%pm rx_pn=%pm "
427 "rx_pn=%02x%02x%02x%02x%02x%02x "
428 "format_errors=%d replays=%d decrypt_errors=%d\n", 425 "format_errors=%d replays=%d decrypt_errors=%d\n",
429 ccmp->key_idx, ccmp->key_set, 426 ccmp->key_idx, ccmp->key_set,
430 MAC_ARG(ccmp->tx_pn), MAC_ARG(ccmp->rx_pn), 427 ccmp->tx_pn, ccmp->rx_pn,
431 ccmp->dot11RSNAStatsCCMPFormatErrors, 428 ccmp->dot11RSNAStatsCCMPFormatErrors,
432 ccmp->dot11RSNAStatsCCMPReplays, 429 ccmp->dot11RSNAStatsCCMPReplays,
433 ccmp->dot11RSNAStatsCCMPDecryptErrors); 430 ccmp->dot11RSNAStatsCCMPDecryptErrors);
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
index e6d8385e1d8..a5254111d9a 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt_tkip.c
@@ -385,7 +385,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
385 if (!(keyidx & (1 << 5))) { 385 if (!(keyidx & (1 << 5))) {
386 if (net_ratelimit()) { 386 if (net_ratelimit()) {
387 printk(KERN_DEBUG "TKIP: received packet without ExtIV" 387 printk(KERN_DEBUG "TKIP: received packet without ExtIV"
388 " flag from " MAC_FMT "\n", MAC_ARG(hdr->addr2)); 388 " flag from %pM\n", hdr->addr2);
389 } 389 }
390 return -2; 390 return -2;
391 } 391 }
@@ -397,9 +397,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
397 } 397 }
398 if (!tkey->key_set) { 398 if (!tkey->key_set) {
399 if (net_ratelimit()) { 399 if (net_ratelimit()) {
400 printk(KERN_DEBUG "TKIP: received packet from " MAC_FMT 400 printk(KERN_DEBUG "TKIP: received packet from %pM"
401 " with keyid=%d that does not have a configured" 401 " with keyid=%d that does not have a configured"
402 " key\n", MAC_ARG(hdr->addr2), keyidx); 402 " key\n", hdr->addr2, keyidx);
403 } 403 }
404 return -3; 404 return -3;
405 } 405 }
@@ -410,9 +410,9 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
410 if (iv32 < tkey->rx_iv32 || 410 if (iv32 < tkey->rx_iv32 ||
411 (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) { 411 (iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) {
412 if (net_ratelimit()) { 412 if (net_ratelimit()) {
413 printk(KERN_DEBUG "TKIP: replay detected: STA=" MAC_FMT 413 printk(KERN_DEBUG "TKIP: replay detected: STA=%pM"
414 " previous TSC %08x%04x received TSC " 414 " previous TSC %08x%04x received TSC "
415 "%08x%04x\n", MAC_ARG(hdr->addr2), 415 "%08x%04x\n", hdr->addr2,
416 tkey->rx_iv32, tkey->rx_iv16, iv32, iv16); 416 tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
417 } 417 }
418 tkey->dot11RSNAStatsTKIPReplays++; 418 tkey->dot11RSNAStatsTKIPReplays++;
@@ -431,8 +431,8 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
431 if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) { 431 if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
432 if (net_ratelimit()) { 432 if (net_ratelimit()) {
433 printk(KERN_DEBUG ": TKIP: failed to decrypt " 433 printk(KERN_DEBUG ": TKIP: failed to decrypt "
434 "received packet from " MAC_FMT "\n", 434 "received packet from %pM\n",
435 MAC_ARG(hdr->addr2)); 435 hdr->addr2);
436 } 436 }
437 return -7; 437 return -7;
438 } 438 }
@@ -450,7 +450,7 @@ static int ieee80211_tkip_decrypt(struct sk_buff *skb, int hdr_len, void *priv)
450 } 450 }
451 if (net_ratelimit()) { 451 if (net_ratelimit()) {
452 printk(KERN_DEBUG "TKIP: ICV error detected: STA=" 452 printk(KERN_DEBUG "TKIP: ICV error detected: STA="
453 MAC_FMT "\n", MAC_ARG(hdr->addr2)); 453 "%pM\n", hdr->addr2);
454 } 454 }
455 tkey->dot11RSNAStatsTKIPICVErrors++; 455 tkey->dot11RSNAStatsTKIPICVErrors++;
456 return -5; 456 return -5;
@@ -604,8 +604,8 @@ static int ieee80211_michael_mic_verify(struct sk_buff *skb, int keyidx,
604 struct ieee80211_hdr_4addr *hdr; 604 struct ieee80211_hdr_4addr *hdr;
605 hdr = (struct ieee80211_hdr_4addr *)skb->data; 605 hdr = (struct ieee80211_hdr_4addr *)skb->data;
606 printk(KERN_DEBUG "%s: Michael MIC verification failed for " 606 printk(KERN_DEBUG "%s: Michael MIC verification failed for "
607 "MSDU from " MAC_FMT " keyidx=%d\n", 607 "MSDU from %pM keyidx=%d\n",
608 skb->dev ? skb->dev->name : "N/A", MAC_ARG(hdr->addr2), 608 skb->dev ? skb->dev->name : "N/A", hdr->addr2,
609 keyidx); 609 keyidx);
610 if (skb->dev) 610 if (skb->dev)
611 ieee80211_michael_mic_failure(skb->dev, hdr, keyidx); 611 ieee80211_michael_mic_failure(skb->dev, hdr, keyidx);
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
index 9128c181bc7..2b7080cc2c0 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_rx.c
@@ -311,8 +311,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
311 strcmp(crypt->ops->name, "TKIP") == 0) { 311 strcmp(crypt->ops->name, "TKIP") == 0) {
312 if (net_ratelimit()) { 312 if (net_ratelimit()) {
313 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " 313 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
314 "received packet from " MAC_FMT "\n", 314 "received packet from %pM\n",
315 ieee->dev->name, MAC_ARG(hdr->addr2)); 315 ieee->dev->name, hdr->addr2);
316 } 316 }
317 return -1; 317 return -1;
318 } 318 }
@@ -323,8 +323,8 @@ ieee80211_rx_frame_decrypt(struct ieee80211_device* ieee, struct sk_buff *skb,
323 atomic_dec(&crypt->refcnt); 323 atomic_dec(&crypt->refcnt);
324 if (res < 0) { 324 if (res < 0) {
325 IEEE80211_DEBUG_DROP( 325 IEEE80211_DEBUG_DROP(
326 "decryption failed (SA=" MAC_FMT 326 "decryption failed (SA=%pM"
327 ") res=%d\n", MAC_ARG(hdr->addr2), res); 327 ") res=%d\n", hdr->addr2, res);
328 if (res == -2) 328 if (res == -2)
329 IEEE80211_DEBUG_DROP("Decryption failed ICV " 329 IEEE80211_DEBUG_DROP("Decryption failed ICV "
330 "mismatch (key %d)\n", 330 "mismatch (key %d)\n",
@@ -356,8 +356,8 @@ ieee80211_rx_frame_decrypt_msdu(struct ieee80211_device* ieee, struct sk_buff *s
356 atomic_dec(&crypt->refcnt); 356 atomic_dec(&crypt->refcnt);
357 if (res < 0) { 357 if (res < 0) {
358 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed" 358 printk(KERN_DEBUG "%s: MSDU decryption/MIC verification failed"
359 " (SA=" MAC_FMT " keyidx=%d)\n", 359 " (SA=%pM keyidx=%d)\n",
360 ieee->dev->name, MAC_ARG(hdr->addr2), keyidx); 360 ieee->dev->name, hdr->addr2, keyidx);
361 return -1; 361 return -1;
362 } 362 }
363 363
@@ -550,8 +550,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
550 * frames silently instead of filling system log with 550 * frames silently instead of filling system log with
551 * these reports. */ 551 * these reports. */
552 IEEE80211_DEBUG_DROP("Decryption failed (not set)" 552 IEEE80211_DEBUG_DROP("Decryption failed (not set)"
553 " (SA=" MAC_FMT ")\n", 553 " (SA=%pM)\n",
554 MAC_ARG(hdr->addr2)); 554 hdr->addr2);
555 ieee->ieee_stats.rx_discards_undecryptable++; 555 ieee->ieee_stats.rx_discards_undecryptable++;
556 goto rx_dropped; 556 goto rx_dropped;
557 } 557 }
@@ -709,8 +709,8 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
709 } else { 709 } else {
710 IEEE80211_DEBUG_DROP( 710 IEEE80211_DEBUG_DROP(
711 "encryption configured, but RX " 711 "encryption configured, but RX "
712 "frame not encrypted (SA=" MAC_FMT ")\n", 712 "frame not encrypted (SA=%pM)\n",
713 MAC_ARG(hdr->addr2)); 713 hdr->addr2);
714 goto rx_dropped; 714 goto rx_dropped;
715 } 715 }
716 } 716 }
@@ -729,9 +729,9 @@ int ieee80211_rtl_rx(struct ieee80211_device *ieee, struct sk_buff *skb,
729 !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) { 729 !ieee80211_is_eapol_frame(ieee, skb, hdrlen)) {
730 IEEE80211_DEBUG_DROP( 730 IEEE80211_DEBUG_DROP(
731 "dropped unencrypted RX data " 731 "dropped unencrypted RX data "
732 "frame from " MAC_FMT 732 "frame from %pM"
733 " (drop_unencrypted=1)\n", 733 " (drop_unencrypted=1)\n",
734 MAC_ARG(hdr->addr2)); 734 hdr->addr2);
735 goto rx_dropped; 735 goto rx_dropped;
736 } 736 }
737/* 737/*
@@ -1196,11 +1196,11 @@ inline int ieee80211_network_init(
1196 } 1196 }
1197 1197
1198 if (network->mode == 0) { 1198 if (network->mode == 0) {
1199 IEEE80211_DEBUG_SCAN("Filtered out '%s (" MAC_FMT ")' " 1199 IEEE80211_DEBUG_SCAN("Filtered out '%s (%pM)' "
1200 "network.\n", 1200 "network.\n",
1201 escape_essid(network->ssid, 1201 escape_essid(network->ssid,
1202 network->ssid_len), 1202 network->ssid_len),
1203 MAC_ARG(network->bssid)); 1203 network->bssid);
1204 return 1; 1204 return 1;
1205 } 1205 }
1206 1206
@@ -1341,9 +1341,9 @@ inline void ieee80211_process_probe_response(
1341 memset(&network, 0, sizeof(struct ieee80211_network)); 1341 memset(&network, 0, sizeof(struct ieee80211_network));
1342 1342
1343 IEEE80211_DEBUG_SCAN( 1343 IEEE80211_DEBUG_SCAN(
1344 "'%s' (" MAC_FMT "): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n", 1344 "'%s' (%pM): %c%c%c%c %c%c%c%c-%c%c%c%c %c%c%c%c\n",
1345 escape_essid(info_element->data, info_element->len), 1345 escape_essid(info_element->data, info_element->len),
1346 MAC_ARG(beacon->header.addr3), 1346 beacon->header.addr3,
1347 (beacon->capability & (1<<0xf)) ? '1' : '0', 1347 (beacon->capability & (1<<0xf)) ? '1' : '0',
1348 (beacon->capability & (1<<0xe)) ? '1' : '0', 1348 (beacon->capability & (1<<0xe)) ? '1' : '0',
1349 (beacon->capability & (1<<0xd)) ? '1' : '0', 1349 (beacon->capability & (1<<0xd)) ? '1' : '0',
@@ -1362,10 +1362,10 @@ inline void ieee80211_process_probe_response(
1362 (beacon->capability & (1<<0x0)) ? '1' : '0'); 1362 (beacon->capability & (1<<0x0)) ? '1' : '0');
1363 1363
1364 if (ieee80211_network_init(ieee, beacon, &network, stats)) { 1364 if (ieee80211_network_init(ieee, beacon, &network, stats)) {
1365 IEEE80211_DEBUG_SCAN("Dropped '%s' (" MAC_FMT ") via %s.\n", 1365 IEEE80211_DEBUG_SCAN("Dropped '%s' (%pM) via %s.\n",
1366 escape_essid(info_element->data, 1366 escape_essid(info_element->data,
1367 info_element->len), 1367 info_element->len),
1368 MAC_ARG(beacon->header.addr3), 1368 beacon->header.addr3,
1369 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == 1369 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1370 IEEE80211_STYPE_PROBE_RESP ? 1370 IEEE80211_STYPE_PROBE_RESP ?
1371 "PROBE RESPONSE" : "BEACON"); 1371 "PROBE RESPONSE" : "BEACON");
@@ -1464,11 +1464,11 @@ inline void ieee80211_process_probe_response(
1464 /* If there are no more slots, expire the oldest */ 1464 /* If there are no more slots, expire the oldest */
1465 list_del(&oldest->list); 1465 list_del(&oldest->list);
1466 target = oldest; 1466 target = oldest;
1467 IEEE80211_DEBUG_SCAN("Expired '%s' (" MAC_FMT ") from " 1467 IEEE80211_DEBUG_SCAN("Expired '%s' (%pM) from "
1468 "network list.\n", 1468 "network list.\n",
1469 escape_essid(target->ssid, 1469 escape_essid(target->ssid,
1470 target->ssid_len), 1470 target->ssid_len),
1471 MAC_ARG(target->bssid)); 1471 target->bssid);
1472 } else { 1472 } else {
1473 /* Otherwise just pull from the free list */ 1473 /* Otherwise just pull from the free list */
1474 target = list_entry(ieee->network_free_list.next, 1474 target = list_entry(ieee->network_free_list.next,
@@ -1478,10 +1478,10 @@ inline void ieee80211_process_probe_response(
1478 1478
1479 1479
1480#ifdef CONFIG_IEEE80211_DEBUG 1480#ifdef CONFIG_IEEE80211_DEBUG
1481 IEEE80211_DEBUG_SCAN("Adding '%s' (" MAC_FMT ") via %s.\n", 1481 IEEE80211_DEBUG_SCAN("Adding '%s' (%pM) via %s.\n",
1482 escape_essid(network.ssid, 1482 escape_essid(network.ssid,
1483 network.ssid_len), 1483 network.ssid_len),
1484 MAC_ARG(network.bssid), 1484 network.bssid,
1485 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == 1485 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1486 IEEE80211_STYPE_PROBE_RESP ? 1486 IEEE80211_STYPE_PROBE_RESP ?
1487 "PROBE RESPONSE" : "BEACON"); 1487 "PROBE RESPONSE" : "BEACON");
@@ -1492,10 +1492,10 @@ inline void ieee80211_process_probe_response(
1492 if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) 1492 if(ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE)
1493 ieee80211_softmac_new_net(ieee,&network); 1493 ieee80211_softmac_new_net(ieee,&network);
1494 } else { 1494 } else {
1495 IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n", 1495 IEEE80211_DEBUG_SCAN("Updating '%s' (%pM) via %s.\n",
1496 escape_essid(target->ssid, 1496 escape_essid(target->ssid,
1497 target->ssid_len), 1497 target->ssid_len),
1498 MAC_ARG(target->bssid), 1498 target->bssid,
1499 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) == 1499 WLAN_FC_GET_STYPE(beacon->header.frame_ctl) ==
1500 IEEE80211_STYPE_PROBE_RESP ? 1500 IEEE80211_STYPE_PROBE_RESP ?
1501 "PROBE RESPONSE" : "BEACON"); 1501 "PROBE RESPONSE" : "BEACON");
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
index a2150670ef5..c2f472ee6eb 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
@@ -1573,7 +1573,7 @@ ieee80211_rx_assoc_rq(struct ieee80211_device *ieee, struct sk_buff *skb)
1573 ieee80211_resp_to_assoc_rq(ieee, dest); 1573 ieee80211_resp_to_assoc_rq(ieee, dest);
1574 } 1574 }
1575 1575
1576 printk(KERN_INFO"New client associated: "MAC_FMT"\n", MAC_ARG(dest)); 1576 printk(KERN_INFO"New client associated: %pM\n", dest);
1577} 1577}
1578 1578
1579 1579
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
index f1d6cb45256..ad42bcdc937 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac_wx.c
@@ -482,8 +482,7 @@ int ieee80211_wx_set_power(struct ieee80211_device *ieee,
482 (!ieee->enter_sleep_state) || 482 (!ieee->enter_sleep_state) ||
483 (!ieee->ps_is_queue_empty)){ 483 (!ieee->ps_is_queue_empty)){
484 484
485 printk("ERROR. PS mode is tryied to be use but\ 485 printk("ERROR. PS mode tried to be use but driver missed a callback\n\n");
486driver missed a callback\n\n");
487 486
488 return -1; 487 return -1;
489 } 488 }
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
index 69bd02164b0..6cb31e1760a 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_tx.c
@@ -198,8 +198,8 @@ int ieee80211_encrypt_fragment(
198 header = (struct ieee80211_hdr_4addr *)frag->data; 198 header = (struct ieee80211_hdr_4addr *)frag->data;
199 if (net_ratelimit()) { 199 if (net_ratelimit()) {
200 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped " 200 printk(KERN_DEBUG "%s: TKIP countermeasures: dropped "
201 "TX packet to " MAC_FMT "\n", 201 "TX packet to %pM\n",
202 ieee->dev->name, MAC_ARG(header->addr1)); 202 ieee->dev->name, header->addr1);
203 } 203 }
204 return -1; 204 return -1;
205 } 205 }
@@ -407,7 +407,7 @@ int ieee80211_rtl_xmit(struct sk_buff *skb,
407 memcpy(&header.addr2, src, ETH_ALEN); 407 memcpy(&header.addr2, src, ETH_ALEN);
408 memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN); 408 memcpy(&header.addr3, ieee->current_network.bssid, ETH_ALEN);
409 } 409 }
410 // printk(KERN_WARNING "essid MAC address is "MAC_FMT, MAC_ARG(&header.addr1)); 410 // printk(KERN_WARNING "essid MAC address is %pM", &header.addr1);
411 header.frame_ctl = cpu_to_le16(fc); 411 header.frame_ctl = cpu_to_le16(fc);
412 //hdr_len = IEEE80211_3ADDR_LEN; 412 //hdr_len = IEEE80211_3ADDR_LEN;
413 413
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
index 6aad48fe2e1..bd5e77bf716 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
@@ -234,10 +234,10 @@ int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
234 else 234 else
235 IEEE80211_DEBUG_SCAN( 235 IEEE80211_DEBUG_SCAN(
236 "Not showing network '%s (" 236 "Not showing network '%s ("
237 MAC_FMT ")' due to age (%lums).\n", 237 "%pM)' due to age (%lums).\n",
238 escape_essid(network->ssid, 238 escape_essid(network->ssid,
239 network->ssid_len), 239 network->ssid_len),
240 MAC_ARG(network->bssid), 240 network->bssid,
241 (jiffies - network->last_scanned) / (HZ / 100)); 241 (jiffies - network->last_scanned) / (HZ / 100));
242 } 242 }
243 } 243 }
@@ -694,7 +694,7 @@ int ieee80211_wx_set_auth(struct ieee80211_device *ieee,
694#if 1 694#if 1
695 case IW_AUTH_WPA_ENABLED: 695 case IW_AUTH_WPA_ENABLED:
696 ieee->wpa_enabled = (data->value)?1:0; 696 ieee->wpa_enabled = (data->value)?1:0;
697 //printk("enalbe wpa:%d\n", ieee->wpa_enabled); 697 //printk("enable wpa:%d\n", ieee->wpa_enabled);
698 break; 698 break;
699 699
700#endif 700#endif
diff --git a/drivers/staging/rtl8187se/r8180.h b/drivers/staging/rtl8187se/r8180.h
index ce828885b64..d15bdf64efd 100644
--- a/drivers/staging/rtl8187se/r8180.h
+++ b/drivers/staging/rtl8187se/r8180.h
@@ -366,7 +366,6 @@ typedef struct r8180_priv
366 short diversity; 366 short diversity;
367 u8 cs_treshold; 367 u8 cs_treshold;
368 short rcr_csense; 368 short rcr_csense;
369 short rf_chip;
370 u32 key0[4]; 369 u32 key0[4];
371 short (*rf_set_sens)(struct net_device *dev,short sens); 370 short (*rf_set_sens)(struct net_device *dev,short sens);
372 void (*rf_set_chan)(struct net_device *dev,short ch); 371 void (*rf_set_chan)(struct net_device *dev,short ch);
@@ -479,9 +478,6 @@ typedef struct r8180_priv
479 u8 retry_rts; 478 u8 retry_rts;
480 u16 rts; 479 u16 rts;
481 480
482//add for RF power on power off by lizhaoming 080512
483 u8 RegThreeWireMode; // See "Three wire mode" defined above, 2006.05.31, by rcnjko.
484
485//by amy for led 481//by amy for led
486 LED_STRATEGY_8185 LedStrategy; 482 LED_STRATEGY_8185 LedStrategy;
487//by amy for led 483//by amy for led
diff --git a/drivers/staging/rtl8187se/r8180_93cx6.c b/drivers/staging/rtl8187se/r8180_93cx6.c
deleted file mode 100644
index 7e4711fb930..00000000000
--- a/drivers/staging/rtl8187se/r8180_93cx6.c
+++ /dev/null
@@ -1,146 +0,0 @@
1/*
2 This files contains card eeprom (93c46 or 93c56) programming routines,
3 memory is addressed by 16 bits words.
4
5 This is part of rtl8180 OpenSource driver.
6 Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
7 Released under the terms of GPL (General Public Licence)
8
9 Parts of this driver are based on the GPL part of the
10 official realtek driver.
11
12 Parts of this driver are based on the rtl8180 driver skeleton
13 from Patric Schenke & Andres Salomon.
14
15 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
16
17 We want to tanks the Authors of those projects and the Ndiswrapper
18 project Authors.
19*/
20
21#include "r8180_93cx6.h"
22
23void eprom_cs(struct net_device *dev, short bit)
24{
25 if(bit)
26 write_nic_byte(dev, EPROM_CMD,
27 (1<<EPROM_CS_SHIFT) | \
28 read_nic_byte(dev, EPROM_CMD)); //enable EPROM
29 else
30 write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD)\
31 &~(1<<EPROM_CS_SHIFT)); //disable EPROM
32
33 force_pci_posting(dev);
34 udelay(EPROM_DELAY);
35}
36
37
38void eprom_ck_cycle(struct net_device *dev)
39{
40 write_nic_byte(dev, EPROM_CMD,
41 (1<<EPROM_CK_SHIFT) | read_nic_byte(dev,EPROM_CMD));
42 force_pci_posting(dev);
43 udelay(EPROM_DELAY);
44 write_nic_byte(dev, EPROM_CMD,
45 read_nic_byte(dev, EPROM_CMD) &~ (1<<EPROM_CK_SHIFT));
46 force_pci_posting(dev);
47 udelay(EPROM_DELAY);
48}
49
50
51void eprom_w(struct net_device *dev,short bit)
52{
53 if(bit)
54 write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) | \
55 read_nic_byte(dev,EPROM_CMD));
56 else
57 write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev,EPROM_CMD)\
58 &~(1<<EPROM_W_SHIFT));
59
60 force_pci_posting(dev);
61 udelay(EPROM_DELAY);
62}
63
64
65short eprom_r(struct net_device *dev)
66{
67 short bit;
68
69 bit=(read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT) );
70 udelay(EPROM_DELAY);
71
72 if(bit) return 1;
73 return 0;
74}
75
76
77void eprom_send_bits_string(struct net_device *dev, short b[], int len)
78{
79 int i;
80
81 for(i=0; i<len; i++){
82 eprom_w(dev, b[i]);
83 eprom_ck_cycle(dev);
84 }
85}
86
87
88u32 eprom_read(struct net_device *dev, u32 addr)
89{
90 struct r8180_priv *priv = ieee80211_priv(dev);
91 short read_cmd[]={1,1,0};
92 short addr_str[8];
93 int i;
94 int addr_len;
95 u32 ret;
96
97 ret=0;
98 //enable EPROM programming
99 write_nic_byte(dev, EPROM_CMD,
100 (EPROM_CMD_PROGRAM<<EPROM_CMD_OPERATING_MODE_SHIFT));
101 force_pci_posting(dev);
102 udelay(EPROM_DELAY);
103
104 if (priv->epromtype==EPROM_93c56){
105 addr_str[7]=addr & 1;
106 addr_str[6]=addr & (1<<1);
107 addr_str[5]=addr & (1<<2);
108 addr_str[4]=addr & (1<<3);
109 addr_str[3]=addr & (1<<4);
110 addr_str[2]=addr & (1<<5);
111 addr_str[1]=addr & (1<<6);
112 addr_str[0]=addr & (1<<7);
113 addr_len=8;
114 }else{
115 addr_str[5]=addr & 1;
116 addr_str[4]=addr & (1<<1);
117 addr_str[3]=addr & (1<<2);
118 addr_str[2]=addr & (1<<3);
119 addr_str[1]=addr & (1<<4);
120 addr_str[0]=addr & (1<<5);
121 addr_len=6;
122 }
123 eprom_cs(dev, 1);
124 eprom_ck_cycle(dev);
125 eprom_send_bits_string(dev, read_cmd, 3);
126 eprom_send_bits_string(dev, addr_str, addr_len);
127
128 //keep chip pin D to low state while reading.
129 //I'm unsure if it is necessary, but anyway shouldn't hurt
130 eprom_w(dev, 0);
131
132 for(i=0;i<16;i++){
133 //eeprom needs a clk cycle between writing opcode&adr
134 //and reading data. (eeprom outs a dummy 0)
135 eprom_ck_cycle(dev);
136 ret |= (eprom_r(dev)<<(15-i));
137 }
138
139 eprom_cs(dev, 0);
140 eprom_ck_cycle(dev);
141
142 //disable EPROM programming
143 write_nic_byte(dev, EPROM_CMD,
144 (EPROM_CMD_NORMAL<<EPROM_CMD_OPERATING_MODE_SHIFT));
145 return ret;
146}
diff --git a/drivers/staging/rtl8187se/r8180_93cx6.h b/drivers/staging/rtl8187se/r8180_93cx6.h
index 36ae100f3f1..79e7391ac88 100644
--- a/drivers/staging/rtl8187se/r8180_93cx6.h
+++ b/drivers/staging/rtl8187se/r8180_93cx6.h
@@ -45,13 +45,10 @@
45 45
46#define EPROM_TXPW_OFDM_CH1_2 0x20 46#define EPROM_TXPW_OFDM_CH1_2 0x20
47 47
48//#define EPROM_TXPW_CH1_2 0x10 48#define EPROM_TXPW_CH1_2 0x30
49#define EPROM_TXPW_CH1_2 0x30 49
50#define EPROM_TXPW_CH3_4 0x11 50#define RTL818X_EEPROM_CMD_READ (1 << 0)
51#define EPROM_TXPW_CH5_6 0x12 51#define RTL818X_EEPROM_CMD_WRITE (1 << 1)
52#define EPROM_TXPW_CH7_8 0x13 52#define RTL818X_EEPROM_CMD_CK (1 << 2)
53#define EPROM_TXPW_CH9_10 0x14 53#define RTL818X_EEPROM_CMD_CS (1 << 3)
54#define EPROM_TXPW_CH11_12 0x15 54
55#define EPROM_TXPW_CH13_14 0x16
56
57u32 eprom_read(struct net_device *dev,u32 addr); //reads a 16 bits word
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c
index 1847f38b9f2..b1757acabed 100644
--- a/drivers/staging/rtl8187se/r8180_core.c
+++ b/drivers/staging/rtl8187se/r8180_core.c
@@ -31,6 +31,7 @@
31#undef DUMMY_RX 31#undef DUMMY_RX
32 32
33#include <linux/syscalls.h> 33#include <linux/syscalls.h>
34#include <linux/eeprom_93cx6.h>
34 35
35#include "r8180_hw.h" 36#include "r8180_hw.h"
36#include "r8180.h" 37#include "r8180.h"
@@ -41,13 +42,6 @@
41 42
42#include "ieee80211/dot11d.h" 43#include "ieee80211/dot11d.h"
43 44
44#ifndef PCI_VENDOR_ID_BELKIN
45 #define PCI_VENDOR_ID_BELKIN 0x1799
46#endif
47#ifndef PCI_VENDOR_ID_DLINK
48 #define PCI_VENDOR_ID_DLINK 0x1186
49#endif
50
51static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = { 45static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
52 { 46 {
53 .vendor = PCI_VENDOR_ID_REALTEK, 47 .vendor = PCI_VENDOR_ID_REALTEK,
@@ -669,11 +663,8 @@ unsigned char STRENGTH_MAP[] = {
669 663
670void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual) 664void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
671{ 665{
672 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
673 u32 temp; 666 u32 temp;
674 u32 temp2; 667 u32 temp2;
675 u32 temp3;
676 u32 lsb;
677 u32 q; 668 u32 q;
678 u32 orig_qual; 669 u32 orig_qual;
679 u8 _rssi; 670 u8 _rssi;
@@ -695,88 +686,6 @@ void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
695 *qual = temp; 686 *qual = temp;
696 temp2 = *rssi; 687 temp2 = *rssi;
697 688
698 switch(priv->rf_chip){
699 case RFCHIPID_RFMD:
700 lsb = temp2 & 1;
701 temp2 &= 0x7e;
702 if ( !lsb || !(temp2 <= 0x3c) ) {
703 temp2 = 0x64;
704 } else {
705 temp2 = 100 * temp2 / 0x3c;
706 }
707 *rssi = temp2 & 0xff;
708 _rssi = temp2 & 0xff;
709 break;
710 case RFCHIPID_INTERSIL:
711 lsb = temp2;
712 temp2 &= 0xfffffffe;
713 temp2 *= 251;
714 temp3 = temp2;
715 temp2 <<= 6;
716 temp3 += temp2;
717 temp3 <<= 1;
718 temp2 = 0x4950df;
719 temp2 -= temp3;
720 lsb &= 1;
721 if ( temp2 <= 0x3e0000 ) {
722 if ( temp2 < 0xffef0000 )
723 temp2 = 0xffef0000;
724 } else {
725 temp2 = 0x3e0000;
726 }
727 if ( !lsb ) {
728 temp2 -= 0xf0000;
729 } else {
730 temp2 += 0xf0000;
731 }
732
733 temp3 = 0x4d0000;
734 temp3 -= temp2;
735 temp3 *= 100;
736 temp3 = temp3 / 0x6d;
737 temp3 >>= 0x10;
738 _rssi = temp3 & 0xff;
739 *rssi = temp3 & 0xff;
740 break;
741 case RFCHIPID_GCT:
742 lsb = temp2 & 1;
743 temp2 &= 0x7e;
744 if ( ! lsb || !(temp2 <= 0x3c) ){
745 temp2 = 0x64;
746 } else {
747 temp2 = (100 * temp2) / 0x3c;
748 }
749 *rssi = temp2 & 0xff;
750 _rssi = temp2 & 0xff;
751 break;
752 case RFCHIPID_PHILIPS:
753 if( orig_qual <= 0x4e ){
754 _rssi = STRENGTH_MAP[orig_qual];
755 *rssi = _rssi;
756 } else {
757 orig_qual -= 0x80;
758 if ( !orig_qual ){
759 _rssi = 1;
760 *rssi = 1;
761 } else {
762 _rssi = 0x32;
763 *rssi = 0x32;
764 }
765 }
766 break;
767 case RFCHIPID_MAXIM:
768 lsb = temp2 & 1;
769 temp2 &= 0x7e;
770 temp2 >>= 1;
771 temp2 += 0x42;
772 if( lsb != 0 ){
773 temp2 += 0xa;
774 }
775 *rssi = temp2 & 0xff;
776 _rssi = temp2 & 0xff;
777 break;
778 }
779
780 if ( _rssi < 0x64 ){ 689 if ( _rssi < 0x64 ){
781 if ( _rssi == 0 ) { 690 if ( _rssi == 0 ) {
782 *rssi = 1; 691 *rssi = 1;
@@ -1421,11 +1330,9 @@ u16 N_DBPSOfRate(u16 DataRate)
1421 return N_DBPS; 1330 return N_DBPS;
1422} 1331}
1423 1332
1424//{by amy 080312
1425// 1333//
1426// Description: 1334// Description:
1427// For Netgear case, they want good-looking singal strength. 1335// For Netgear case, they want good-looking singal strength.
1428// 2004.12.05, by rcnjko.
1429// 1336//
1430long NetgearSignalStrengthTranslate(long LastSS, long CurrSS) 1337long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1431{ 1338{
@@ -1481,7 +1388,6 @@ long TranslateToDbm8185(u8 SignalStrengthIndex)
1481// This is different with PerformSignalSmoothing8185 in smoothing fomula. 1388// This is different with PerformSignalSmoothing8185 in smoothing fomula.
1482// No dramatic adjustion is apply because dynamic mechanism need some degree 1389// No dramatic adjustion is apply because dynamic mechanism need some degree
1483// of correctness. Ported from 8187B. 1390// of correctness. Ported from 8187B.
1484// 2007-02-26, by Bruce.
1485// 1391//
1486void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv, 1392void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1487 bool bCckRate) 1393 bool bCckRate)
@@ -1502,7 +1408,6 @@ void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1502 priv->CurCCKRSSI = 0; 1408 priv->CurCCKRSSI = 0;
1503} 1409}
1504 1410
1505//by amy 080312}
1506 1411
1507/* This is rough RX isr handling routine*/ 1412/* This is rough RX isr handling routine*/
1508void rtl8180_rx(struct net_device *dev) 1413void rtl8180_rx(struct net_device *dev)
@@ -1638,7 +1543,7 @@ void rtl8180_rx(struct net_device *dev)
1638 } 1543 }
1639 1544
1640 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16); 1545 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
1641 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6 1546 signal = (signal & 0xfe) >> 1;
1642 1547
1643 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff)); 1548 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
1644 1549
@@ -1652,7 +1557,6 @@ void rtl8180_rx(struct net_device *dev)
1652 1557
1653 stats.rate = rtl8180_rate2rate(rate); 1558 stats.rate = rtl8180_rate2rate(rate);
1654 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ; 1559 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
1655//by amy for antenna
1656 if(!rtl8180_IsWirelessBMode(stats.rate)) 1560 if(!rtl8180_IsWirelessBMode(stats.rate))
1657 { // OFDM rate. 1561 { // OFDM rate.
1658 1562
@@ -1691,11 +1595,10 @@ void rtl8180_rx(struct net_device *dev)
1691 RXAGC=(95-RXAGC)*100/65; 1595 RXAGC=(95-RXAGC)*100/65;
1692 } 1596 }
1693 priv->SignalStrength = (u8)RXAGC; 1597 priv->SignalStrength = (u8)RXAGC;
1694 priv->RecvSignalPower = RxAGC_dBm ; // It can use directly by SD3 CMLin 1598 priv->RecvSignalPower = RxAGC_dBm;
1695 priv->RxPower = rxpower; 1599 priv->RxPower = rxpower;
1696 priv->RSSI = RSSI; 1600 priv->RSSI = RSSI;
1697//{by amy 080312 1601 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1698 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
1699 if(quality >= 127) 1602 if(quality >= 127)
1700 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now; 1603 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
1701 else if(quality < 27) 1604 else if(quality < 27)
@@ -1712,7 +1615,6 @@ void rtl8180_rx(struct net_device *dev)
1712 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); 1615 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
1713 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality; 1616 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1714 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual; 1617 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
1715//by amy 080312}
1716 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 ) 1618 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
1717 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 ); 1619 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
1718 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13; 1620 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
@@ -1725,11 +1627,12 @@ void rtl8180_rx(struct net_device *dev)
1725 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3)) 1627 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
1726 && (!bHwError) && (!bCRC)&& (!bICV)) 1628 && (!bHwError) && (!bCRC)&& (!bICV))
1727 { 1629 {
1728//by amy 080312 1630 /* Perform signal smoothing for dynamic
1729 // Perform signal smoothing for dynamic mechanism on demand. 1631 * mechanism on demand. This is different
1730 // This is different with PerformSignalSmoothing8185 in smoothing fomula. 1632 * with PerformSignalSmoothing8185 in smoothing
1731 // No dramatic adjustion is apply because dynamic mechanism need some degree 1633 * fomula. No dramatic adjustion is apply
1732 // of correctness. 2007.01.23, by shien chang. 1634 * because dynamic mechanism need some degree
1635 * of correctness. */
1733 PerformUndecoratedSignalSmoothing8185(priv,bCckRate); 1636 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
1734 // 1637 //
1735 // For good-looking singal strength. 1638 // For good-looking singal strength.
@@ -1749,12 +1652,9 @@ void rtl8180_rx(struct net_device *dev)
1749 1652
1750 // Figure out which antenna that received the lasted packet. 1653 // Figure out which antenna that received the lasted packet.
1751 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main. 1654 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
1752//by amy 080312
1753 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength); 1655 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1754 } 1656 }
1755 1657
1756//by amy for antenna
1757#ifndef DUMMY_RX
1758 if(first){ 1658 if(first){
1759 if(!priv->rx_skb_complete){ 1659 if(!priv->rx_skb_complete){
1760 /* seems that HW sometimes fails to reiceve and 1660 /* seems that HW sometimes fails to reiceve and
@@ -1810,19 +1710,12 @@ void rtl8180_rx(struct net_device *dev)
1810 if(last && !priv->rx_skb_complete){ 1710 if(last && !priv->rx_skb_complete){
1811 if(priv->rx_skb->len > 4) 1711 if(priv->rx_skb->len > 4)
1812 skb_trim(priv->rx_skb,priv->rx_skb->len-4); 1712 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
1813#ifndef RX_DONT_PASS_UL
1814 if(!ieee80211_rtl_rx(priv->ieee80211, 1713 if(!ieee80211_rtl_rx(priv->ieee80211,
1815 priv->rx_skb, &stats)){ 1714 priv->rx_skb, &stats))
1816#endif // RX_DONT_PASS_UL
1817
1818 dev_kfree_skb_any(priv->rx_skb); 1715 dev_kfree_skb_any(priv->rx_skb);
1819#ifndef RX_DONT_PASS_UL
1820 }
1821#endif
1822 priv->rx_skb_complete=1; 1716 priv->rx_skb_complete=1;
1823 } 1717 }
1824 1718
1825#endif //DUMMY_RX
1826 pci_dma_sync_single_for_device(priv->pdev, 1719 pci_dma_sync_single_for_device(priv->pdev,
1827 priv->rxbuffer->dma, 1720 priv->rxbuffer->dma,
1828 priv->rxbuffersize * \ 1721 priv->rxbuffersize * \
@@ -2056,7 +1949,7 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2056 u16 RtsDur = 0; 1949 u16 RtsDur = 0;
2057 u16 ThisFrameTime = 0; 1950 u16 ThisFrameTime = 0;
2058 u16 TxDescDuration = 0; 1951 u16 TxDescDuration = 0;
2059 u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14 1952 u8 ownbit_flag = false;
2060 1953
2061 switch(priority) { 1954 switch(priority) {
2062 case MANAGE_PRIORITY: 1955 case MANAGE_PRIORITY:
@@ -2123,7 +2016,8 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2123 //YJ,add,080828,for Keep alive 2016 //YJ,add,080828,for Keep alive
2124 priv->NumTxUnicast++; 2017 priv->NumTxUnicast++;
2125 2018
2126 // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko. 2019 /* Figure out ACK rate according to BSS basic rate
2020 * and Tx rate. */
2127 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send 2021 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
2128 2022
2129 if ( ((len + sCrcLng) > priv->rts) && priv->rts ) 2023 if ( ((len + sCrcLng) > priv->rts) && priv->rts )
@@ -2206,7 +2100,7 @@ short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
2206 *tail |= (1<<15); /* no encrypt */ 2100 *tail |= (1<<15); /* no encrypt */
2207 2101
2208 if(remain==len && !descfrag) { 2102 if(remain==len && !descfrag) {
2209 ownbit_flag = false; //added by david woo,2007.12.14 2103 ownbit_flag = false;
2210 *tail = *tail| (1<<29) ; //fist segment of the packet 2104 *tail = *tail| (1<<29) ; //fist segment of the packet
2211 *tail = *tail |(len); 2105 *tail = *tail |(len);
2212 } else { 2106 } else {
@@ -2556,27 +2450,16 @@ void watch_dog_adaptive(unsigned long data)
2556 } 2450 }
2557 2451
2558 // Tx High Power Mechanism. 2452 // Tx High Power Mechanism.
2559#ifdef HIGH_POWER
2560 if(CheckHighPower((struct net_device *)data)) 2453 if(CheckHighPower((struct net_device *)data))
2561 {
2562 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq); 2454 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2563 }
2564#endif
2565 2455
2566 // Tx Power Tracking on 87SE. 2456 // Tx Power Tracking on 87SE.
2567#ifdef TX_TRACK 2457 if (CheckTxPwrTracking((struct net_device *)data))
2568 //if( priv->bTxPowerTrack ) //lzm mod 080826
2569 if( CheckTxPwrTracking((struct net_device *)data));
2570 TxPwrTracking87SE((struct net_device *)data); 2458 TxPwrTracking87SE((struct net_device *)data);
2571#endif
2572 2459
2573 // Perform DIG immediately. 2460 // Perform DIG immediately.
2574#ifdef SW_DIG
2575 if(CheckDig((struct net_device *)data) == true) 2461 if(CheckDig((struct net_device *)data) == true)
2576 {
2577 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq); 2462 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2578 }
2579#endif
2580 rtl8180_watch_dog((struct net_device *)data); 2463 rtl8180_watch_dog((struct net_device *)data);
2581 2464
2582 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem); 2465 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
@@ -2675,6 +2558,36 @@ static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2675} 2558}
2676//YJ,add,080828,end 2559//YJ,add,080828,end
2677 2560
2561static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2562{
2563 struct net_device *dev = eeprom->data;
2564 u8 reg = read_nic_byte(dev, EPROM_CMD);
2565
2566 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2567 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2568 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2569 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2570}
2571
2572static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2573{
2574 struct net_device *dev = eeprom->data;
2575 u8 reg = 2 << 6;
2576
2577 if (eeprom->reg_data_in)
2578 reg |= RTL818X_EEPROM_CMD_WRITE;
2579 if (eeprom->reg_data_out)
2580 reg |= RTL818X_EEPROM_CMD_READ;
2581 if (eeprom->reg_data_clock)
2582 reg |= RTL818X_EEPROM_CMD_CK;
2583 if (eeprom->reg_chip_select)
2584 reg |= RTL818X_EEPROM_CMD_CS;
2585
2586 write_nic_byte(dev, EPROM_CMD, reg);
2587 read_nic_byte(dev, EPROM_CMD);
2588 udelay(10);
2589}
2590
2678short rtl8180_init(struct net_device *dev) 2591short rtl8180_init(struct net_device *dev)
2679{ 2592{
2680 struct r8180_priv *priv = ieee80211_priv(dev); 2593 struct r8180_priv *priv = ieee80211_priv(dev);
@@ -2683,8 +2596,16 @@ short rtl8180_init(struct net_device *dev)
2683 u32 usValue; 2596 u32 usValue;
2684 u16 tmpu16; 2597 u16 tmpu16;
2685 int i, j; 2598 int i, j;
2599 struct eeprom_93cx6 eeprom;
2600 u16 eeprom_val;
2601
2602 eeprom.data = dev;
2603 eeprom.register_read = rtl8187se_eeprom_register_read;
2604 eeprom.register_write = rtl8187se_eeprom_register_write;
2605 eeprom.width = PCI_EEPROM_WIDTH_93C46;
2686 2606
2687 priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF; 2607 eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2608 priv->channel_plan = eeprom_val & 0xFF;
2688 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){ 2609 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
2689 printk("rtl8180_init:Error channel plan! Set to default.\n"); 2610 printk("rtl8180_init:Error channel plan! Set to default.\n");
2690 priv->channel_plan = 0; 2611 priv->channel_plan = 0;
@@ -2701,8 +2622,6 @@ short rtl8180_init(struct net_device *dev)
2701 priv->txbeaconcount = 2; 2622 priv->txbeaconcount = 2;
2702 priv->rx_skb_complete = 1; 2623 priv->rx_skb_complete = 1;
2703 2624
2704 priv->RegThreeWireMode = HW_THREE_WIRE_SI;
2705
2706 priv->RFChangeInProgress = false; 2625 priv->RFChangeInProgress = false;
2707 priv->SetRFPowerStateInProgress = false; 2626 priv->SetRFPowerStateInProgress = false;
2708 priv->RFProgType = 0; 2627 priv->RFProgType = 0;
@@ -2747,10 +2666,8 @@ short rtl8180_init(struct net_device *dev)
2747 priv->TxPollingTimes = 0;//lzm add 080826 2666 priv->TxPollingTimes = 0;//lzm add 080826
2748 priv->bLeisurePs = true; 2667 priv->bLeisurePs = true;
2749 priv->dot11PowerSaveMode = eActive; 2668 priv->dot11PowerSaveMode = eActive;
2750//by amy for antenna
2751 priv->AdMinCheckPeriod = 5; 2669 priv->AdMinCheckPeriod = 5;
2752 priv->AdMaxCheckPeriod = 10; 2670 priv->AdMaxCheckPeriod = 10;
2753// Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
2754 priv->AdMaxRxSsThreshold = 30;//60->30 2671 priv->AdMaxRxSsThreshold = 30;//60->30
2755 priv->AdRxSsThreshold = 20;//50->20 2672 priv->AdRxSsThreshold = 20;//50->20
2756 priv->AdCheckPeriod = priv->AdMinCheckPeriod; 2673 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
@@ -2765,8 +2682,6 @@ short rtl8180_init(struct net_device *dev)
2765 init_timer(&priv->SwAntennaDiversityTimer); 2682 init_timer(&priv->SwAntennaDiversityTimer);
2766 priv->SwAntennaDiversityTimer.data = (unsigned long)dev; 2683 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2767 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback; 2684 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2768//by amy for antenna
2769//{by amy 080312
2770 priv->bDigMechanism = 1; 2685 priv->bDigMechanism = 1;
2771 priv->InitialGain = 6; 2686 priv->InitialGain = 6;
2772 priv->bXtalCalibration = false; 2687 priv->bXtalCalibration = false;
@@ -2803,58 +2718,63 @@ short rtl8180_init(struct net_device *dev)
2803 priv->NumTxUnicast = 0; 2718 priv->NumTxUnicast = 0;
2804 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL; 2719 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2805 priv->PowerProfile = POWER_PROFILE_AC; 2720 priv->PowerProfile = POWER_PROFILE_AC;
2806 priv->CurrRetryCnt=0; 2721 priv->CurrRetryCnt = 0;
2807 priv->LastRetryCnt=0; 2722 priv->LastRetryCnt = 0;
2808 priv->LastTxokCnt=0; 2723 priv->LastTxokCnt = 0;
2809 priv->LastRxokCnt=0; 2724 priv->LastRxokCnt = 0;
2810 priv->LastRetryRate=0; 2725 priv->LastRetryRate = 0;
2811 priv->bTryuping=0; 2726 priv->bTryuping = 0;
2812 priv->CurrTxRate=0; 2727 priv->CurrTxRate = 0;
2813 priv->CurrRetryRate=0; 2728 priv->CurrRetryRate = 0;
2814 priv->TryupingCount=0; 2729 priv->TryupingCount = 0;
2815 priv->TryupingCountNoData=0; 2730 priv->TryupingCountNoData = 0;
2816 priv->TryDownCountLowData=0; 2731 priv->TryDownCountLowData = 0;
2817 priv->LastTxOKBytes=0; 2732 priv->LastTxOKBytes = 0;
2818 priv->LastFailTxRate=0; 2733 priv->LastFailTxRate = 0;
2819 priv->LastFailTxRateSS=0; 2734 priv->LastFailTxRateSS = 0;
2820 priv->FailTxRateCount=0; 2735 priv->FailTxRateCount = 0;
2821 priv->LastTxThroughput=0; 2736 priv->LastTxThroughput = 0;
2822 priv->NumTxOkBytesTotal=0; 2737 priv->NumTxOkBytesTotal = 0;
2823 priv->ForcedDataRate = 0; 2738 priv->ForcedDataRate = 0;
2824 priv->RegBModeGainStage = 1; 2739 priv->RegBModeGainStage = 1;
2825 2740
2826 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0; 2741 priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2827 spin_lock_init(&priv->irq_lock); 2742 spin_lock_init(&priv->irq_lock);
2828 spin_lock_init(&priv->irq_th_lock); 2743 spin_lock_init(&priv->irq_th_lock);
2829 spin_lock_init(&priv->tx_lock); 2744 spin_lock_init(&priv->tx_lock);
2830 spin_lock_init(&priv->ps_lock); 2745 spin_lock_init(&priv->ps_lock);
2831 spin_lock_init(&priv->rf_ps_lock); 2746 spin_lock_init(&priv->rf_ps_lock);
2832 sema_init(&priv->wx_sem,1); 2747 sema_init(&priv->wx_sem, 1);
2833 sema_init(&priv->rf_state,1); 2748 sema_init(&priv->rf_state, 1);
2834 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq); 2749 INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2835 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq); 2750 INIT_WORK(&priv->tx_irq_wq, (void *)rtl8180_tx_irq_wq);
2836 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq); 2751 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2837 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq); 2752 (void *)rtl8180_hw_wakeup_wq);
2838 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update); 2753 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2839 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312 2754 (void *)rtl8180_hw_sleep_wq);
2840 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312 2755 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2841 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312 2756 (void *)rtl8180_wmm_param_update);
2842 2757 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2843 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack); 2758 (void *)rtl8180_rate_adapter);
2844 2759 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2760 (void *)rtl8180_hw_dig_wq);
2761 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2762 (void *)rtl8180_tx_pw_wq);
2763 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2764 (void *) GPIOChangeRFWorkItemCallBack);
2845 tasklet_init(&priv->irq_rx_tasklet, 2765 tasklet_init(&priv->irq_rx_tasklet,
2846 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet, 2766 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2847 (unsigned long)priv); 2767 (unsigned long)priv);
2848 2768
2849 init_timer(&priv->watch_dog_timer); 2769 init_timer(&priv->watch_dog_timer);
2850 priv->watch_dog_timer.data = (unsigned long)dev; 2770 priv->watch_dog_timer.data = (unsigned long)dev;
2851 priv->watch_dog_timer.function = watch_dog_adaptive; 2771 priv->watch_dog_timer.function = watch_dog_adaptive;
2852 2772
2853 init_timer(&priv->rateadapter_timer); 2773 init_timer(&priv->rateadapter_timer);
2854 priv->rateadapter_timer.data = (unsigned long)dev; 2774 priv->rateadapter_timer.data = (unsigned long)dev;
2855 priv->rateadapter_timer.function = timer_rate_adaptive; 2775 priv->rateadapter_timer.function = timer_rate_adaptive;
2856 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD; 2776 priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2857 priv->bEnhanceTxPwr=false; 2777 priv->bEnhanceTxPwr = false;
2858 2778
2859 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit; 2779 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2860 priv->ieee80211->set_chan = rtl8180_set_chan; 2780 priv->ieee80211->set_chan = rtl8180_set_chan;
@@ -2877,30 +2797,28 @@ short rtl8180_init(struct net_device *dev)
2877 2797
2878 priv->CSMethod = (0x01 << 29); 2798 priv->CSMethod = (0x01 << 29);
2879 2799
2880 priv->TransmitConfig = 2800 priv->TransmitConfig = TCR_DurProcMode_OFFSET |
2881 1<<TCR_DurProcMode_OFFSET | //for RTL8185B, duration setting by HW 2801 (7<<TCR_MXDMA_OFFSET) |
2882 (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied. 2802 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2883 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit 2803 (priv->LongRetryLimit<<TCR_LRL_OFFSET) |
2884 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit 2804 (0 ? TCR_SAT : 0);
2885 (0 ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them 2805
2886 2806 priv->ReceiveConfig = RCR_AMF | RCR_ADF | RCR_ACF |
2887 priv->ReceiveConfig = 2807 RCR_AB | RCR_AM | RCR_APM |
2888 RCR_AMF | RCR_ADF | //accept management/data 2808 (7<<RCR_MXDMA_OFFSET) |
2889 RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko. 2809 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2890 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC 2810 (priv->EarlyRxThreshold == 7 ?
2891 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited. 2811 RCR_ONLYERLPKT : 0);
2892 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
2893 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
2894 2812
2895 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER | 2813 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2896 IMR_THPDER | IMR_THPDOK | 2814 IMR_THPDER | IMR_THPDOK |
2897 IMR_TVODER | IMR_TVODOK | 2815 IMR_TVODER | IMR_TVODOK |
2898 IMR_TVIDER | IMR_TVIDOK | 2816 IMR_TVIDER | IMR_TVIDOK |
2899 IMR_TBEDER | IMR_TBEDOK | 2817 IMR_TBEDER | IMR_TBEDOK |
2900 IMR_TBKDER | IMR_TBKDOK | 2818 IMR_TBKDER | IMR_TBKDOK |
2901 IMR_RDU | // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27. 2819 IMR_RDU |
2902 IMR_RER | IMR_ROK | 2820 IMR_RER | IMR_ROK |
2903 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko. 2821 IMR_RQoSOK;
2904 2822
2905 priv->InitialGain = 6; 2823 priv->InitialGain = 6;
2906 2824
@@ -2913,7 +2831,8 @@ short rtl8180_init(struct net_device *dev)
2913 // just for sync 85 2831 // just for sync 85
2914 priv->enable_gpio0 = 0; 2832 priv->enable_gpio0 = 0;
2915 2833
2916 usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET); 2834 eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val);
2835 usValue = eeprom_val;
2917 DMESG("usValue is 0x%x\n",usValue); 2836 DMESG("usValue is 0x%x\n",usValue);
2918 //3Read AntennaDiversity 2837 //3Read AntennaDiversity
2919 2838
@@ -2953,54 +2872,46 @@ short rtl8180_init(struct net_device *dev)
2953 else 2872 else
2954 priv->epromtype=EPROM_93c46; 2873 priv->epromtype=EPROM_93c46;
2955 2874
2956 dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff; 2875 eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2957 dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8; 2876 dev->dev_addr, 3);
2958 dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
2959 dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
2960 dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
2961 dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
2962 2877
2963 for(i=1,j=0; i<14; i+=2,j++){ 2878 for(i=1,j=0; i<14; i+=2,j++){
2964 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j); 2879 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2965 priv->chtxpwr[i]=word & 0xff; 2880 priv->chtxpwr[i]=word & 0xff;
2966 priv->chtxpwr[i+1]=(word & 0xff00)>>8; 2881 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
2967 } 2882 }
2968 for (i = 1, j = 0; i < 14; i += 2, j++) { 2883 for (i = 1, j = 0; i < 14; i += 2, j++) {
2969 word = eprom_read(dev, EPROM_TXPW_OFDM_CH1_2 + j); 2884 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2970 priv->chtxpwr_ofdm[i] = word & 0xff; 2885 priv->chtxpwr_ofdm[i] = word & 0xff;
2971 priv->chtxpwr_ofdm[i+1] = (word & 0xff00)>>8; 2886 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2972 } 2887 }
2973 2888
2974 //3Read crystal calibtration and thermal meter indication on 87SE. 2889 /* 3Read crystal calibtration and thermal meter indication on 87SE. */
2975 2890 eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2976 // By SD3 SY's request. Added by Roger, 2007.12.11.
2977 2891
2978 tmpu16 = eprom_read(dev, EEPROM_RSV>>1); 2892 /* Crystal calibration for Xin and Xout resp. */
2893 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2894 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2895 if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2896 priv->bXtalCalibration = true;
2979 2897
2980 // Crystal calibration for Xin and Xout resp. 2898 /* Thermal meter reference indication. */
2981 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF 2899 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2982 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF 2900 if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2983 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12) 2901 priv->bTxPowerTrack = true;
2984 priv->bXtalCalibration = true;
2985 2902
2986 // Thermal meter reference indication. 2903 eeprom_93cx6_read(&eeprom, EPROM_TXPW_BASE, &word);
2987 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
2988 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
2989 priv->bTxPowerTrack = true;
2990
2991 word = eprom_read(dev,EPROM_TXPW_BASE);
2992 priv->cck_txpwr_base = word & 0xf; 2904 priv->cck_txpwr_base = word & 0xf;
2993 priv->ofdm_txpwr_base = (word>>4) & 0xf; 2905 priv->ofdm_txpwr_base = (word>>4) & 0xf;
2994 2906
2995 version = eprom_read(dev,EPROM_VERSION); 2907 eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version);
2996 DMESG("EEPROM version %x",version); 2908 DMESG("EEPROM version %x",version);
2997 priv->rcr_csense = 3; 2909 priv->rcr_csense = 3;
2998 2910
2999 priv->cs_treshold = (eprom_read(dev, ENERGY_TRESHOLD) & 0xff00) >> 8; 2911 eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val);
3000 2912 priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
3001 priv->rf_chip = 0xff & eprom_read(dev, RFCHIPID);
3002 2913
3003 priv->rf_chip = RF_ZEBRA4; 2914 eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
3004 priv->rf_sleep = rtl8225z4_rf_sleep; 2915 priv->rf_sleep = rtl8225z4_rf_sleep;
3005 priv->rf_wakeup = rtl8225z4_rf_wakeup; 2916 priv->rf_wakeup = rtl8225z4_rf_wakeup;
3006 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!"); 2917 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
@@ -3010,7 +2921,6 @@ short rtl8180_init(struct net_device *dev)
3010 priv->rf_set_chan = rtl8225z2_rf_set_chan; 2921 priv->rf_set_chan = rtl8225z2_rf_set_chan;
3011 priv->rf_set_sens = NULL; 2922 priv->rf_set_sens = NULL;
3012 2923
3013
3014 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount)) 2924 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
3015 return -ENOMEM; 2925 return -ENOMEM;
3016 2926
@@ -3042,11 +2952,7 @@ short rtl8180_init(struct net_device *dev)
3042 TX_BEACON_RING_ADDR)) 2952 TX_BEACON_RING_ADDR))
3043 return -ENOMEM; 2953 return -ENOMEM;
3044 2954
3045#if !defined(SA_SHIRQ)
3046 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){ 2955 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
3047#else
3048 if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
3049#endif
3050 DMESGE("Error allocating IRQ %d",dev->irq); 2956 DMESGE("Error allocating IRQ %d",dev->irq);
3051 return -1; 2957 return -1;
3052 }else{ 2958 }else{
@@ -3169,43 +3075,6 @@ void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
3169 rtl8185_write_phy(dev, adr, data | 0x10000); 3075 rtl8185_write_phy(dev, adr, data | 0x10000);
3170} 3076}
3171 3077
3172/* 70*3 = 210 ms
3173 * I hope this is enougth
3174 */
3175#define MAX_PHY 70
3176void write_phy(struct net_device *dev, u8 adr, u8 data)
3177{
3178 u32 phy;
3179 int i;
3180
3181 phy = 0xff0000;
3182 phy |= adr;
3183 phy |= 0x80; /* this should enable writing */
3184 phy |= (data<<8);
3185
3186 //PHY_ADR, PHY_R and PHY_W are contig and treated as one dword
3187 write_nic_dword(dev,PHY_ADR, phy);
3188
3189 phy= 0xffff00;
3190 phy |= adr;
3191
3192 write_nic_dword(dev,PHY_ADR, phy);
3193 for(i=0;i<MAX_PHY;i++){
3194 phy=read_nic_dword(dev,PHY_ADR);
3195 phy= phy & 0xff0000;
3196 phy= phy >> 16;
3197 if(phy == data){ //SUCCESS!
3198 force_pci_posting(dev);
3199 mdelay(3); //random value
3200 return;
3201 }else{
3202 force_pci_posting(dev);
3203 mdelay(3); //random value
3204 }
3205 }
3206 DMESGW ("Phy writing %x %x failed!", adr,data);
3207}
3208
3209void rtl8185_set_rate(struct net_device *dev) 3078void rtl8185_set_rate(struct net_device *dev)
3210{ 3079{
3211 int i; 3080 int i;
@@ -3335,7 +3204,6 @@ static struct net_device_stats *rtl8180_stats(struct net_device *dev)
3335} 3204}
3336// 3205//
3337// Change current and default preamble mode. 3206// Change current and default preamble mode.
3338// 2005.01.06, by rcnjko.
3339// 3207//
3340bool 3208bool
3341MgntActSet_802_11_PowerSaveMode( 3209MgntActSet_802_11_PowerSaveMode(
@@ -3454,7 +3322,6 @@ void rtl8180_watch_dog(struct net_device *dev)
3454 MgntLinkKeepAlive(priv); 3322 MgntLinkKeepAlive(priv);
3455 3323
3456 //YJ,add,080828,for LPS 3324 //YJ,add,080828,for LPS
3457#ifdef ENABLE_LPS
3458 if (priv->PowerProfile == POWER_PROFILE_BATTERY) 3325 if (priv->PowerProfile == POWER_PROFILE_BATTERY)
3459 priv->bLeisurePs = true; 3326 priv->bLeisurePs = true;
3460 else if (priv->PowerProfile == POWER_PROFILE_AC) { 3327 else if (priv->PowerProfile == POWER_PROFILE_AC) {
@@ -3464,7 +3331,6 @@ void rtl8180_watch_dog(struct net_device *dev)
3464 3331
3465 if(priv->ieee80211->state == IEEE80211_LINKED){ 3332 if(priv->ieee80211->state == IEEE80211_LINKED){
3466 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod; 3333 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
3467 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
3468 if( priv->link_detect.NumRxOkInPeriod> 666 || 3334 if( priv->link_detect.NumRxOkInPeriod> 666 ||
3469 priv->link_detect.NumTxOkInPeriod> 666 ) { 3335 priv->link_detect.NumTxOkInPeriod> 666 ) {
3470 bBusyTraffic = true; 3336 bBusyTraffic = true;
@@ -3481,7 +3347,6 @@ void rtl8180_watch_dog(struct net_device *dev)
3481 LeisurePSLeave(priv); 3347 LeisurePSLeave(priv);
3482 } else 3348 } else
3483 LeisurePSLeave(priv); 3349 LeisurePSLeave(priv);
3484#endif
3485 priv->link_detect.bBusyTraffic = bBusyTraffic; 3350 priv->link_detect.bBusyTraffic = bBusyTraffic;
3486 priv->link_detect.NumRxOkInPeriod = 0; 3351 priv->link_detect.NumRxOkInPeriod = 0;
3487 priv->link_detect.NumTxOkInPeriod = 0; 3352 priv->link_detect.NumTxOkInPeriod = 0;
@@ -3503,16 +3368,11 @@ int _rtl8180_up(struct net_device *dev)
3503 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) 3368 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3504 IPSLeave(dev); 3369 IPSLeave(dev);
3505 } 3370 }
3506#ifdef RATE_ADAPT
3507 timer_rate_adaptive((unsigned long)dev); 3371 timer_rate_adaptive((unsigned long)dev);
3508#endif
3509 watch_dog_adaptive((unsigned long)dev); 3372 watch_dog_adaptive((unsigned long)dev);
3510#ifdef SW_ANTE
3511 if(priv->bSwAntennaDiverity) 3373 if(priv->bSwAntennaDiverity)
3512 SwAntennaDiversityTimerCallback(dev); 3374 SwAntennaDiversityTimerCallback(dev);
3513#endif
3514 ieee80211_softmac_start_protocol(priv->ieee80211); 3375 ieee80211_softmac_start_protocol(priv->ieee80211);
3515
3516 return 0; 3376 return 0;
3517} 3377}
3518 3378
@@ -3748,7 +3608,7 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3748 dev->wireless_handlers = &r8180_wx_handlers_def; 3608 dev->wireless_handlers = &r8180_wx_handlers_def;
3749 3609
3750 dev->type=ARPHRD_ETHER; 3610 dev->type=ARPHRD_ETHER;
3751 dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13 3611 dev->watchdog_timeo = HZ*3;
3752 3612
3753 if (dev_alloc_name(dev, ifname) < 0){ 3613 if (dev_alloc_name(dev, ifname) < 0){
3754 DMESG("Oops: devname already taken! Trying wlan%%d...\n"); 3614 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
@@ -3864,8 +3724,7 @@ static int __init rtl8180_pci_module_init(void)
3864 return ret; 3724 return ret;
3865 } 3725 }
3866 3726
3867 printk(KERN_INFO "\nLinux kernel driver for RTL8180 \ 3727 printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3868/ RTL8185 based WLAN cards\n");
3869 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n"); 3728 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
3870 DMESG("Initializing module"); 3729 DMESG("Initializing module");
3871 DMESG("Wireless extensions version %d", WIRELESS_EXT); 3730 DMESG("Wireless extensions version %d", WIRELESS_EXT);
@@ -4236,60 +4095,51 @@ void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4236 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL}; 4095 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
4237 static int readf_count = 0; 4096 static int readf_count = 0;
4238 4097
4239#ifdef ENABLE_LPS
4240 if(readf_count % 10 == 0) 4098 if(readf_count % 10 == 0)
4241 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state"); 4099 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
4242 4100
4243 readf_count = (readf_count+1)%0xffff; 4101 readf_count = (readf_count+1)%0xffff;
4244#endif 4102 /* We should turn off LED before polling FF51[4]. */
4245 {
4246 // We should turn off LED before polling FF51[4].
4247 4103
4248 //Turn off LED. 4104 /* Turn off LED. */
4249 btPSR = read_nic_byte(dev, PSR); 4105 btPSR = read_nic_byte(dev, PSR);
4250 write_nic_byte(dev, PSR, (btPSR & ~BIT3)); 4106 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
4251 4107
4252 //It need to delay 4us suggested by Jong, 2008-01-16 4108 /* It need to delay 4us suggested by Jong, 2008-01-16 */
4253 udelay(4); 4109 udelay(4);
4254 4110
4255 //HW radio On/Off according to the value of FF51[4](config0) 4111 /* HW radio On/Off according to the value of FF51[4](config0) */
4256 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0); 4112 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
4257 4113
4258 //Turn on LED. 4114 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
4259 write_nic_byte(dev, PSR, btPSR| BIT3);
4260 4115
4261 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff; 4116 /* Turn LED back on when radio enabled */
4117 if (eRfPowerStateToSet == eRfOn)
4118 write_nic_byte(dev, PSR, btPSR | BIT3);
4262 4119
4263 if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn)) 4120 if ((priv->ieee80211->bHwRadioOff == true) &&
4264 { 4121 (eRfPowerStateToSet == eRfOn)) {
4265 priv->ieee80211->bHwRadioOff = false; 4122 priv->ieee80211->bHwRadioOff = false;
4266 bActuallySet = true; 4123 bActuallySet = true;
4267 } 4124 } else if ((priv->ieee80211->bHwRadioOff == false) &&
4268 else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff)) 4125 (eRfPowerStateToSet == eRfOff)) {
4269 { 4126 priv->ieee80211->bHwRadioOff = true;
4270 priv->ieee80211->bHwRadioOff = true; 4127 bActuallySet = true;
4271 bActuallySet = true; 4128 }
4272 }
4273 4129
4274 if(bActuallySet) 4130 if (bActuallySet) {
4275 { 4131 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
4276 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW); 4132
4277 4133 /* To update the UI status for Power status changed */
4278 /* To update the UI status for Power status changed */ 4134 if (priv->ieee80211->bHwRadioOff == true)
4279 if(priv->ieee80211->bHwRadioOff == true) 4135 argv[1] = "RFOFF";
4280 argv[1] = "RFOFF"; 4136 else
4281 else{ 4137 argv[1] = "RFON";
4282 //if(!priv->RfOffReason) 4138 argv[0] = RadioPowerPath;
4283 argv[1] = "RFON"; 4139 argv[2] = NULL;
4284 //else 4140
4285 // argv[1] = "RFOFF"; 4141 call_usermodehelper(RadioPowerPath, argv, envp, 1);
4286 } 4142 }
4287 argv[0] = RadioPowerPath;
4288 argv[2] = NULL;
4289
4290 call_usermodehelper(RadioPowerPath,argv,envp,1);
4291 }
4292 }
4293} 4143}
4294 4144
4295static u8 read_acadapter_file(char *filename) 4145static u8 read_acadapter_file(char *filename)
diff --git a/drivers/staging/rtl8187se/r8180_dm.c b/drivers/staging/rtl8187se/r8180_dm.c
index cbca58db85e..fc4907839c5 100644
--- a/drivers/staging/rtl8187se/r8180_dm.c
+++ b/drivers/staging/rtl8187se/r8180_dm.c
@@ -282,30 +282,13 @@ DIG_Zebra(
282// Dispatch DIG implementation according to RF. 282// Dispatch DIG implementation according to RF.
283// 283//
284void 284void
285DynamicInitGain( 285DynamicInitGain(struct net_device *dev)
286 struct net_device *dev
287 )
288{ 286{
289 struct r8180_priv *priv = ieee80211_priv(dev); 287 DIG_Zebra(dev);
290
291 switch(priv->rf_chip)
292 {
293 case RF_ZEBRA2: // [AnnieWorkaround] For Zebra2, 2005-08-01.
294 case RF_ZEBRA4:
295 DIG_Zebra( dev );
296 break;
297
298 default:
299 printk("DynamicInitGain(): unknown RFChipID(%d) !!!\n", priv->rf_chip);
300 break;
301 }
302} 288}
303 289
304void rtl8180_hw_dig_wq (struct work_struct *work) 290void rtl8180_hw_dig_wq (struct work_struct *work)
305{ 291{
306// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
307// struct ieee80211_device * ieee = (struct ieee80211_device*)
308// container_of(work, struct ieee80211_device, watch_dog_wq);
309 struct delayed_work *dwork = to_delayed_work(work); 292 struct delayed_work *dwork = to_delayed_work(work);
310 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_dig_wq); 293 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_dig_wq);
311 struct net_device *dev = ieee->dev; 294 struct net_device *dev = ieee->dev;
@@ -1310,44 +1293,24 @@ SetAntenna8185(
1310 switch(u1bAntennaIndex) 1293 switch(u1bAntennaIndex)
1311 { 1294 {
1312 case 0: 1295 case 0:
1313 switch(priv->rf_chip) 1296 /* Mac register, main antenna */
1314 { 1297 write_nic_byte(dev, ANTSEL, 0x03);
1315 case RF_ZEBRA2: 1298 /* base band */
1316 case RF_ZEBRA4: 1299 write_phy_cck(dev, 0x11, 0x9b); /* Config CCK RX antenna. */
1317 // Mac register, main antenna 1300 write_phy_ofdm(dev, 0x0d, 0x5c); /* Config OFDM RX antenna. */
1318 write_nic_byte(dev, ANTSEL, 0x03);
1319 //base band
1320 write_phy_cck(dev,0x11, 0x9b); // Config CCK RX antenna.
1321 write_phy_ofdm(dev, 0x0d, 0x5c); // Config OFDM RX antenna.
1322
1323
1324 bAntennaSwitched = true;
1325 break;
1326 1301
1327 default: 1302 bAntennaSwitched = true;
1328 printk("SetAntenna8185: unknown RFChipID(%d)\n", priv->rf_chip);
1329 break;
1330 }
1331 break; 1303 break;
1332 1304
1333 case 1: 1305 case 1:
1334 switch(priv->rf_chip) 1306 /* Mac register, aux antenna */
1335 { 1307 write_nic_byte(dev, ANTSEL, 0x00);
1336 case RF_ZEBRA2: 1308 /* base band */
1337 case RF_ZEBRA4: 1309 write_phy_cck(dev, 0x11, 0xbb); /* Config CCK RX antenna. */
1338 // Mac register, aux antenna 1310 write_phy_ofdm(dev, 0x0d, 0x54); /* Config OFDM RX antenna. */
1339 write_nic_byte(dev, ANTSEL, 0x00); 1311
1340 //base band 1312 bAntennaSwitched = true;
1341 write_phy_cck(dev, 0x11, 0xbb); // Config CCK RX antenna.
1342 write_phy_ofdm(dev, 0x0d, 0x54); // Config OFDM RX antenna.
1343
1344 bAntennaSwitched = true;
1345 break;
1346 1313
1347 default:
1348 printk("SetAntenna8185: unknown RFChipID(%d)\n", priv->rf_chip);
1349 break;
1350 }
1351 break; 1314 break;
1352 1315
1353 default: 1316 default:
diff --git a/drivers/staging/rtl8187se/r8180_rtl8225z2.c b/drivers/staging/rtl8187se/r8180_rtl8225z2.c
index afe10f0b75a..6edf5a46fa4 100644
--- a/drivers/staging/rtl8187se/r8180_rtl8225z2.c
+++ b/drivers/staging/rtl8187se/r8180_rtl8225z2.c
@@ -854,134 +854,48 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
854 btConfig3 = read_nic_byte(dev, CONFIG3); 854 btConfig3 = read_nic_byte(dev, CONFIG3);
855 write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En)); 855 write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En));
856 856
857 switch (priv->rf_chip) { 857 switch (eRFPowerState) {
858 case RF_ZEBRA2: 858 case eRfOn:
859 switch (eRFPowerState) { 859 write_nic_word(dev, 0x37C, 0x00EC);
860 case eRfOn:
861 RF_WriteReg(dev,0x4,0x9FF);
862 860
863 write_nic_dword(dev, ANAPARAM, ANAPARM_ON); 861 /* turn on AFE */
864 write_nic_dword(dev, ANAPARAM2, ANAPARM2_ON); 862 write_nic_byte(dev, 0x54, 0x00);
863 write_nic_byte(dev, 0x62, 0x00);
865 864
866 write_nic_byte(dev, CONFIG4, priv->RFProgType); 865 /* turn on RF */
866 RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
867 RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
867 868
868 /* turn on CCK and OFDM */ 869 /* turn on RF again */
869 u1bTmp = read_nic_byte(dev, 0x24E); 870 RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
870 write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6)))); 871 RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
871 break;
872 case eRfSleep:
873 break;
874 case eRfOff:
875 break;
876 default:
877 bResult = false;
878 break;
879 }
880 break;
881 case RF_ZEBRA4:
882 switch (eRFPowerState) {
883 case eRfOn:
884 write_nic_word(dev, 0x37C, 0x00EC);
885
886 /* turn on AFE */
887 write_nic_byte(dev, 0x54, 0x00);
888 write_nic_byte(dev, 0x62, 0x00);
889
890 /* turn on RF */
891 RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
892 RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
893
894 /* turn on RF again */
895 RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
896 RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
897 872
898 /* turn on BB */ 873 /* turn on BB */
899 write_phy_ofdm(dev,0x10,0x40); 874 write_phy_ofdm(dev, 0x10, 0x40);
900 write_phy_ofdm(dev,0x12,0x40); 875 write_phy_ofdm(dev, 0x12, 0x40);
901
902 /* Avoid power down at init time. */
903 write_nic_byte(dev, CONFIG4, priv->RFProgType);
904
905 u1bTmp = read_nic_byte(dev, 0x24E);
906 write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));
907 break;
908 case eRfSleep:
909 for (QueueID = 0, i = 0; QueueID < 6;) {
910 if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) {
911 QueueID++;
912 continue;
913 } else {
914 priv->TxPollingTimes ++;
915 if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
916 bActionAllowed = false;
917 break;
918 } else
919 udelay(10);
920 }
921 }
922 876
923 if (bActionAllowed) { 877 /* Avoid power down at init time. */
924 /* turn off BB RXIQ matrix to cut off rx signal */ 878 write_nic_byte(dev, CONFIG4, priv->RFProgType);
925 write_phy_ofdm(dev, 0x10, 0x00);
926 write_phy_ofdm(dev, 0x12, 0x00);
927
928 /* turn off RF */
929 RF_WriteReg(dev, 0x4, 0x0000);
930 RF_WriteReg(dev, 0x0, 0x0000);
931
932 /* turn off AFE except PLL */
933 write_nic_byte(dev, 0x62, 0xff);
934 write_nic_byte(dev, 0x54, 0xec);
935
936 mdelay(1);
937
938 {
939 int i = 0;
940 while (true) {
941 u8 tmp24F = read_nic_byte(dev, 0x24f);
942
943 if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
944 bTurnOffBB = true;
945 break;
946 } else {
947 udelay(10);
948 i++;
949 priv->TxPollingTimes++;
950
951 if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
952 bTurnOffBB = false;
953 break;
954 } else
955 udelay(10);
956 }
957 }
958 }
959
960 if (bTurnOffBB) {
961 /* turn off BB */
962 u1bTmp = read_nic_byte(dev, 0x24E);
963 write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
964
965 /* turn off AFE PLL */
966 write_nic_byte(dev, 0x54, 0xFC);
967 write_nic_word(dev, 0x37C, 0x00FC);
968 }
969 }
970 break;
971 case eRfOff:
972 for (QueueID = 0, i = 0; QueueID < 6;) {
973 if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) {
974 QueueID++;
975 continue;
976 } else {
977 udelay(10);
978 i++;
979 }
980 879
981 if (i >= MAX_DOZE_WAITING_TIMES_85B) 880 u1bTmp = read_nic_byte(dev, 0x24E);
881 write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));
882 break;
883 case eRfSleep:
884 for (QueueID = 0, i = 0; QueueID < 6;) {
885 if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) {
886 QueueID++;
887 continue;
888 } else {
889 priv->TxPollingTimes++;
890 if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
891 bActionAllowed = false;
982 break; 892 break;
893 } else
894 udelay(10);
983 } 895 }
896 }
984 897
898 if (bActionAllowed) {
985 /* turn off BB RXIQ matrix to cut off rx signal */ 899 /* turn off BB RXIQ matrix to cut off rx signal */
986 write_phy_ofdm(dev, 0x10, 0x00); 900 write_phy_ofdm(dev, 0x10, 0x00);
987 write_phy_ofdm(dev, 0x12, 0x00); 901 write_phy_ofdm(dev, 0x12, 0x00);
@@ -998,22 +912,23 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
998 912
999 { 913 {
1000 int i = 0; 914 int i = 0;
1001 915 while (true) {
1002 while (true)
1003 {
1004 u8 tmp24F = read_nic_byte(dev, 0x24f); 916 u8 tmp24F = read_nic_byte(dev, 0x24f);
1005 917
1006 if ((tmp24F == 0x01) || (tmp24F == 0x09)) { 918 if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
1007 bTurnOffBB = true; 919 bTurnOffBB = true;
1008 break; 920 break;
1009 } else { 921 } else {
1010 bTurnOffBB = false;
1011 udelay(10); 922 udelay(10);
1012 i++; 923 i++;
1013 } 924 priv->TxPollingTimes++;
1014 925
1015 if (i > MAX_POLLING_24F_TIMES_87SE) 926 if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
1016 break; 927 bTurnOffBB = false;
928 break;
929 } else
930 udelay(10);
931 }
1017 } 932 }
1018 } 933 }
1019 934
@@ -1022,15 +937,68 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
1022 u1bTmp = read_nic_byte(dev, 0x24E); 937 u1bTmp = read_nic_byte(dev, 0x24E);
1023 write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6)); 938 write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
1024 939
1025 /* turn off AFE PLL (80M) */ 940 /* turn off AFE PLL */
1026 write_nic_byte(dev, 0x54, 0xFC); 941 write_nic_byte(dev, 0x54, 0xFC);
1027 write_nic_word(dev, 0x37C, 0x00FC); 942 write_nic_word(dev, 0x37C, 0x00FC);
1028 } 943 }
1029 break; 944 }
1030 default: 945 break;
1031 bResult = false; 946 case eRfOff:
1032 printk("SetZebraRFPowerState8185(): unknown state to set: 0x%X!!!\n", eRFPowerState); 947 for (QueueID = 0, i = 0; QueueID < 6;) {
1033 break; 948 if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) {
949 QueueID++;
950 continue;
951 } else {
952 udelay(10);
953 i++;
954 }
955
956 if (i >= MAX_DOZE_WAITING_TIMES_85B)
957 break;
958 }
959
960 /* turn off BB RXIQ matrix to cut off rx signal */
961 write_phy_ofdm(dev, 0x10, 0x00);
962 write_phy_ofdm(dev, 0x12, 0x00);
963
964 /* turn off RF */
965 RF_WriteReg(dev, 0x4, 0x0000);
966 RF_WriteReg(dev, 0x0, 0x0000);
967
968 /* turn off AFE except PLL */
969 write_nic_byte(dev, 0x62, 0xff);
970 write_nic_byte(dev, 0x54, 0xec);
971
972 mdelay(1);
973
974 {
975 int i = 0;
976
977 while (true) {
978 u8 tmp24F = read_nic_byte(dev, 0x24f);
979
980 if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
981 bTurnOffBB = true;
982 break;
983 } else {
984 bTurnOffBB = false;
985 udelay(10);
986 i++;
987 }
988
989 if (i > MAX_POLLING_24F_TIMES_87SE)
990 break;
991 }
992 }
993
994 if (bTurnOffBB) {
995 /* turn off BB */
996 u1bTmp = read_nic_byte(dev, 0x24E);
997 write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
998
999 /* turn off AFE PLL (80M) */
1000 write_nic_byte(dev, 0x54, 0xFC);
1001 write_nic_word(dev, 0x37C, 0x00FC);
1034 } 1002 }
1035 break; 1003 break;
1036 } 1004 }
diff --git a/drivers/staging/rtl8187se/r8185b_init.c b/drivers/staging/rtl8187se/r8185b_init.c
index 50309f2da9c..a0ece1fd64a 100644
--- a/drivers/staging/rtl8187se/r8185b_init.c
+++ b/drivers/staging/rtl8187se/r8185b_init.c
@@ -238,100 +238,12 @@ PlatformIORead4Byte(
238 return data; 238 return data;
239} 239}
240 240
241void 241void SetOutputEnableOfRfPins(struct net_device *dev)
242SetOutputEnableOfRfPins(
243 struct net_device *dev
244 )
245{ 242{
246 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 243 write_nic_word(dev, RFPinsEnable, 0x1bff);
247
248 switch(priv->rf_chip)
249 {
250 case RFCHIPID_RTL8225:
251 case RF_ZEBRA2:
252 case RF_ZEBRA4:
253 write_nic_word(dev, RFPinsEnable, 0x1bff);
254 //write_nic_word(dev, RFPinsEnable, 0x1fff);
255 break;
256 }
257} 244}
258 245
259void 246static int
260ZEBRA_RFSerialWrite(
261 struct net_device *dev,
262 u32 data2Write,
263 u8 totalLength,
264 u8 low2high
265 )
266{
267 ThreeWireReg twreg;
268 int i;
269 u16 oval,oval2,oval3;
270 u32 mask;
271 u16 UshortBuffer;
272
273 u8 u1bTmp;
274 // RTL8187S HSSI Read/Write Function
275 u1bTmp = read_nic_byte(dev, RF_SW_CONFIG);
276 u1bTmp |= RF_SW_CFG_SI; //reg08[1]=1 Serial Interface(SI)
277 write_nic_byte(dev, RF_SW_CONFIG, u1bTmp);
278 UshortBuffer = read_nic_word(dev, RFPinsOutput);
279 oval = UshortBuffer & 0xfff8; // We shall clear bit0, 1, 2 first, 2005.10.28, by rcnjko.
280
281 oval2 = read_nic_word(dev, RFPinsEnable);
282 oval3 = read_nic_word(dev, RFPinsSelect);
283
284 // <RJ_NOTE> 3-wire should be controled by HW when we finish SW 3-wire programming. 2005.08.10, by rcnjko.
285 oval3 &= 0xfff8;
286
287 write_nic_word(dev, RFPinsEnable, (oval2|0x0007)); // Set To Output Enable
288 write_nic_word(dev, RFPinsSelect, (oval3|0x0007)); // Set To SW Switch
289 udelay(10);
290
291 // Add this to avoid hardware and software 3-wire conflict.
292 // 2005.03.01, by rcnjko.
293 twreg.longData = 0;
294 twreg.struc.enableB = 1;
295 write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); // Set SI_EN (RFLE)
296 udelay(2);
297 twreg.struc.enableB = 0;
298 write_nic_word(dev, RFPinsOutput, (twreg.longData|oval)); // Clear SI_EN (RFLE)
299 udelay(10);
300
301 mask = (low2high)?0x01:((u32)0x01<<(totalLength-1));
302
303 for(i=0; i<totalLength/2; i++)
304 {
305 twreg.struc.data = ((data2Write&mask)!=0) ? 1 : 0;
306 write_nic_word(dev, RFPinsOutput, (twreg.longData|oval));
307 twreg.struc.clk = 1;
308 write_nic_word(dev, RFPinsOutput, (twreg.longData|oval));
309 write_nic_word(dev, RFPinsOutput, (twreg.longData|oval));
310
311 mask = (low2high)?(mask<<1):(mask>>1);
312 twreg.struc.data = ((data2Write&mask)!=0) ? 1 : 0;
313 write_nic_word(dev, RFPinsOutput, (twreg.longData|oval));
314 write_nic_word(dev, RFPinsOutput, (twreg.longData|oval));
315 twreg.struc.clk = 0;
316 write_nic_word(dev, RFPinsOutput, (twreg.longData|oval));
317 mask = (low2high)?(mask<<1):(mask>>1);
318 }
319
320 twreg.struc.enableB = 1;
321 twreg.struc.clk = 0;
322 twreg.struc.data = 0;
323 write_nic_word(dev, RFPinsOutput, twreg.longData|oval);
324 udelay(10);
325
326 write_nic_word(dev, RFPinsOutput, oval|0x0004);
327 write_nic_word(dev, RFPinsSelect, oval3|0x0000);
328
329 SetOutputEnableOfRfPins(dev);
330}
331//by amy
332
333
334int
335HwHSSIThreeWire( 247HwHSSIThreeWire(
336 struct net_device *dev, 248 struct net_device *dev,
337 u8 *pDataBuf, 249 u8 *pDataBuf,
@@ -469,420 +381,30 @@ HwHSSIThreeWire(
469 381
470 return bResult; 382 return bResult;
471} 383}
472//by amy
473
474int
475HwThreeWire(
476 struct net_device *dev,
477 u8 *pDataBuf,
478 u8 nDataBufBitCnt,
479 int bHold,
480 int bWrite
481 )
482{
483 int bResult = 1;
484 u8 TryCnt;
485 u8 u1bTmp;
486
487 do
488 {
489 // Check if WE and RE are cleared.
490 for(TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++)
491 {
492 u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
493 if( (u1bTmp & (SW_3W_CMD1_RE|SW_3W_CMD1_WE)) == 0 )
494 {
495 break;
496 }
497 udelay(10);
498 }
499 if (TryCnt == TC_3W_POLL_MAX_TRY_CNT)
500 panic("HwThreeWire(): CmdReg: %#X RE|WE bits are not clear!!\n", u1bTmp);
501
502 // Fill up data buffer for write operation.
503 if(nDataBufBitCnt == 16)
504 {
505 write_nic_word(dev, SW_3W_DB0, *((u16 *)pDataBuf));
506 }
507 else if(nDataBufBitCnt == 64)
508 {
509 write_nic_dword(dev, SW_3W_DB0, *((u32 *)pDataBuf));
510 write_nic_dword(dev, SW_3W_DB1, *((u32 *)(pDataBuf + 4)));
511 }
512 else
513 {
514 int idx;
515 int ByteCnt = nDataBufBitCnt / 8;
516
517 if ((nDataBufBitCnt % 8) != 0)
518 panic("HwThreeWire(): nDataBufBitCnt(%d) should be multiple of 8!!!\n",
519 nDataBufBitCnt);
520
521 if (nDataBufBitCnt > 64)
522 panic("HwThreeWire(): nDataBufBitCnt(%d) should <= 64!!!\n",
523 nDataBufBitCnt);
524
525 for(idx = 0; idx < ByteCnt; idx++)
526 {
527 write_nic_byte(dev, (SW_3W_DB0+idx), *(pDataBuf+idx));
528 }
529 }
530
531 // Fill up length field.
532 u1bTmp = (u8)(nDataBufBitCnt - 1); // Number of bits - 1.
533 if(bHold)
534 u1bTmp |= SW_3W_CMD0_HOLD;
535 write_nic_byte(dev, SW_3W_CMD0, u1bTmp);
536
537 // Set up command: WE or RE.
538 if(bWrite)
539 {
540 write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_WE);
541 }
542 else
543 {
544 write_nic_byte(dev, SW_3W_CMD1, SW_3W_CMD1_RE);
545 }
546
547 // Check if WE and RE are cleared and DONE is set.
548 for(TryCnt = 0; TryCnt < TC_3W_POLL_MAX_TRY_CNT; TryCnt++)
549 {
550 u1bTmp = read_nic_byte(dev, SW_3W_CMD1);
551 if( (u1bTmp & (SW_3W_CMD1_RE|SW_3W_CMD1_WE)) == 0 &&
552 (u1bTmp & SW_3W_CMD1_DONE) != 0 )
553 {
554 break;
555 }
556 udelay(10);
557 }
558 if(TryCnt == TC_3W_POLL_MAX_TRY_CNT)
559 {
560 //RT_ASSERT(TryCnt != TC_3W_POLL_MAX_TRY_CNT,
561 // ("HwThreeWire(): CmdReg: %#X RE|WE bits are not clear or DONE is not set!!\n", u1bTmp));
562 // Workaround suggested by wcchu: clear WE here. 2006.07.07, by rcnjko.
563 write_nic_byte(dev, SW_3W_CMD1, 0);
564 }
565
566 // Read back data for read operation.
567 // <RJ_TODO> I am not sure if this is correct output format of a read operation.
568 if(bWrite == 0)
569 {
570 if(nDataBufBitCnt == 16)
571 {
572 *((u16 *)pDataBuf) = read_nic_word(dev, SW_3W_DB0);
573 }
574 else if(nDataBufBitCnt == 64)
575 {
576 *((u32 *)pDataBuf) = read_nic_dword(dev, SW_3W_DB0);
577 *((u32 *)(pDataBuf + 4)) = read_nic_dword(dev, SW_3W_DB1);
578 }
579 else
580 {
581 int idx;
582 int ByteCnt = nDataBufBitCnt / 8;
583
584 if ((nDataBufBitCnt % 8) != 0)
585 panic("HwThreeWire(): nDataBufBitCnt(%d) should be multiple of 8!!!\n",
586 nDataBufBitCnt);
587
588 if (nDataBufBitCnt > 64)
589 panic("HwThreeWire(): nDataBufBitCnt(%d) should <= 64!!!\n",
590 nDataBufBitCnt);
591
592 for(idx = 0; idx < ByteCnt; idx++)
593 {
594 *(pDataBuf+idx) = read_nic_byte(dev, (SW_3W_DB0+idx));
595 }
596 }
597 }
598
599 }while(0);
600
601 return bResult;
602}
603
604 384
605void 385void
606RF_WriteReg( 386RF_WriteReg(struct net_device *dev, u8 offset, u32 data)
607 struct net_device *dev,
608 u8 offset,
609 u32 data
610 )
611{ 387{
612 //RFReg reg; 388 u32 data2Write;
613 u32 data2Write; 389 u8 len;
614 u8 len;
615 u8 low2high;
616 //u32 RF_Read = 0;
617 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
618
619
620 switch(priv->rf_chip)
621 {
622 case RFCHIPID_RTL8225:
623 case RF_ZEBRA2: // Annie 2006-05-12.
624 case RF_ZEBRA4: //by amy
625 switch(priv->RegThreeWireMode)
626 {
627 case SW_THREE_WIRE:
628 { // Perform SW 3-wire programming by driver.
629 data2Write = (data << 4) | (u32)(offset & 0x0f);
630 len = 16;
631 low2high = 0;
632 ZEBRA_RFSerialWrite(dev, data2Write, len, low2high);
633 }
634 break;
635 390
636 case HW_THREE_WIRE: 391 /* Pure HW 3-wire. */
637 { // Pure HW 3-wire. 392 data2Write = (data << 4) | (u32)(offset & 0x0f);
638 data2Write = (data << 4) | (u32)(offset & 0x0f); 393 len = 16;
639 len = 16;
640 HwThreeWire(
641 dev,
642 (u8 *)(&data2Write), // pDataBuf,
643 len, // nDataBufBitCnt,
644 0, // bHold,
645 1); // bWrite
646 }
647 break;
648 case HW_THREE_WIRE_PI: //Parallel Interface
649 { // Pure HW 3-wire.
650 data2Write = (data << 4) | (u32)(offset & 0x0f);
651 len = 16;
652 HwHSSIThreeWire(
653 dev,
654 (u8*)(&data2Write), // pDataBuf,
655 len, // nDataBufBitCnt,
656 0, // bSI
657 1); // bWrite
658
659 //printk("33333\n");
660 }
661 break;
662
663 case HW_THREE_WIRE_SI: //Serial Interface
664 { // Pure HW 3-wire.
665 data2Write = (data << 4) | (u32)(offset & 0x0f);
666 len = 16;
667// printk(" enter ZEBRA_RFSerialWrite\n ");
668// low2high = 0;
669// ZEBRA_RFSerialWrite(dev, data2Write, len, low2high);
670
671 HwHSSIThreeWire(
672 dev,
673 (u8*)(&data2Write), // pDataBuf,
674 len, // nDataBufBitCnt,
675 1, // bSI
676 1); // bWrite
677
678// printk(" exit ZEBRA_RFSerialWrite\n ");
679 }
680 break;
681
682
683 default:
684 DMESGE("RF_WriteReg(): invalid RegThreeWireMode(%d) !!!", priv->RegThreeWireMode);
685 break;
686 }
687 break;
688
689 default:
690 DMESGE("RF_WriteReg(): unknown RFChipID: %#X", priv->rf_chip);
691 break;
692 }
693}
694
695
696void
697ZEBRA_RFSerialRead(
698 struct net_device *dev,
699 u32 data2Write,
700 u8 wLength,
701 u32 *data2Read,
702 u8 rLength,
703 u8 low2high
704 )
705{
706 ThreeWireReg twreg;
707 int i;
708 u16 oval,oval2,oval3,tmp, wReg80;
709 u32 mask;
710 u8 u1bTmp;
711 ThreeWireReg tdata;
712 //PHAL_DATA_8187 pHalData = GetHalData8187(pAdapter);
713 { // RTL8187S HSSI Read/Write Function
714 u1bTmp = read_nic_byte(dev, RF_SW_CONFIG);
715 u1bTmp |= RF_SW_CFG_SI; //reg08[1]=1 Serial Interface(SI)
716 write_nic_byte(dev, RF_SW_CONFIG, u1bTmp);
717 }
718
719 wReg80 = oval = read_nic_word(dev, RFPinsOutput);
720 oval2 = read_nic_word(dev, RFPinsEnable);
721 oval3 = read_nic_word(dev, RFPinsSelect);
722
723 write_nic_word(dev, RFPinsEnable, oval2|0xf);
724 write_nic_word(dev, RFPinsSelect, oval3|0xf);
725
726 *data2Read = 0;
727
728 // We must clear BIT0-3 here, otherwise,
729 // SW_Enalbe will be true when we first call ZEBRA_RFSerialRead() after 8187MPVC open,
730 // which will cause the value read become 0. 2005.04.11, by rcnjko.
731 oval &= ~0xf;
732
733 // Avoid collision with hardware three-wire.
734 twreg.longData = 0;
735 twreg.struc.enableB = 1;
736 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(4);
737
738 twreg.longData = 0;
739 twreg.struc.enableB = 0;
740 twreg.struc.clk = 0;
741 twreg.struc.read_write = 0;
742 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(5);
743
744 mask = (low2high) ? 0x01 : ((u32)0x01<<(32-1));
745 for(i = 0; i < wLength/2; i++)
746 {
747 twreg.struc.data = ((data2Write&mask) != 0) ? 1 : 0;
748 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(1);
749 twreg.struc.clk = 1;
750 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
751 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
752
753 mask = (low2high) ? (mask<<1): (mask>>1);
754
755 if(i == 2)
756 {
757 // Commented out by Jackie, 2004.08.26. <RJ_NOTE> We must comment out the following two lines for we cannot pull down VCOPDN during RF Serail Read.
758 //PlatformEFIOWrite2Byte(pAdapter, RFPinsEnable, 0xe); // turn off data enable
759 //PlatformEFIOWrite2Byte(pAdapter, RFPinsSelect, 0xe);
760
761 twreg.struc.read_write=1;
762 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
763 twreg.struc.clk = 0;
764 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
765 break;
766 }
767 twreg.struc.data = ((data2Write&mask) != 0) ? 1: 0;
768 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
769 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
770
771 twreg.struc.clk = 0;
772 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(1);
773
774 mask = (low2high) ? (mask<<1) : (mask>>1);
775 }
776
777 twreg.struc.clk = 0;
778 twreg.struc.data = 0;
779 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
780 mask = (low2high) ? 0x01 : ((u32)0x01 << (12-1));
781
782 //
783 // 061016, by rcnjko:
784 // We must set data pin to HW controled, otherwise RF can't driver it and
785 // value RF register won't be able to read back properly.
786 //
787 write_nic_word(dev, RFPinsEnable, ( ((oval2|0x0E) & (~0x01))) );
788 394
789 for(i = 0; i < rLength; i++) 395 HwHSSIThreeWire(dev, (u8 *)(&data2Write), len, 1, 1);
790 {
791 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(1);
792 twreg.struc.clk = 1;
793 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
794 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
795 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
796 tmp = read_nic_word(dev, RFPinsInput);
797 tdata.longData = tmp;
798 *data2Read |= tdata.struc.clk ? mask : 0;
799
800 twreg.struc.clk = 0;
801 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
802
803 mask = (low2high) ? (mask<<1) : (mask>>1);
804 }
805 twreg.struc.enableB = 1;
806 twreg.struc.clk = 0;
807 twreg.struc.data = 0;
808 twreg.struc.read_write = 1;
809 write_nic_word(dev, RFPinsOutput, twreg.longData|oval); udelay(2);
810
811 //PlatformEFIOWrite2Byte(pAdapter, RFPinsEnable, oval2|0x8); // Set To Output Enable
812 write_nic_word(dev, RFPinsEnable, oval2); // Set To Output Enable, <RJ_NOTE> We cannot enable BIT3 here, otherwise, we will failed to switch channel. 2005.04.12.
813 //PlatformEFIOWrite2Byte(pAdapter, RFPinsEnable, 0x1bff);
814 write_nic_word(dev, RFPinsSelect, oval3); // Set To SW Switch
815 //PlatformEFIOWrite2Byte(pAdapter, RFPinsSelect, 0x0488);
816 write_nic_word(dev, RFPinsOutput, 0x3a0);
817 //PlatformEFIOWrite2Byte(pAdapter, RFPinsOutput, 0x0480);
818} 396}
819 397
820 398u32 RF_ReadReg(struct net_device *dev, u8 offset)
821u32
822RF_ReadReg(
823 struct net_device *dev,
824 u8 offset
825 )
826{ 399{
827 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 400 u32 data2Write;
828 u32 data2Write; 401 u8 wlen;
829 u8 wlen; 402 u32 dataRead;
830 u8 rlen;
831 u8 low2high;
832 u32 dataRead;
833 403
834 switch(priv->rf_chip) 404 data2Write = ((u32)(offset & 0x0f));
835 { 405 wlen = 16;
836 case RFCHIPID_RTL8225: 406 HwHSSIThreeWire(dev, (u8 *)(&data2Write), wlen, 1, 0);
837 case RF_ZEBRA2: 407 dataRead = data2Write;
838 case RF_ZEBRA4:
839 switch(priv->RegThreeWireMode)
840 {
841 case HW_THREE_WIRE_PI: // For 87S Parallel Interface.
842 {
843 data2Write = ((u32)(offset&0x0f));
844 wlen=16;
845 HwHSSIThreeWire(
846 dev,
847 (u8*)(&data2Write), // pDataBuf,
848 wlen, // nDataBufBitCnt,
849 0, // bSI
850 0); // bWrite
851 dataRead= data2Write;
852 }
853 break;
854
855 case HW_THREE_WIRE_SI: // For 87S Serial Interface.
856 {
857 data2Write = ((u32)(offset&0x0f)) ;
858 wlen=16;
859 HwHSSIThreeWire(
860 dev,
861 (u8*)(&data2Write), // pDataBuf,
862 wlen, // nDataBufBitCnt,
863 1, // bSI
864 0 // bWrite
865 );
866 dataRead= data2Write;
867 }
868 break;
869
870 // Perform SW 3-wire programming by driver.
871 default:
872 {
873 data2Write = ((u32)(offset&0x1f)) << 27; // For Zebra E-cut. 2005.04.11, by rcnjko.
874 wlen = 6;
875 rlen = 12;
876 low2high = 0;
877 ZEBRA_RFSerialRead(dev, data2Write, wlen,&dataRead,rlen, low2high);
878 }
879 break;
880 }
881 break;
882 default:
883 dataRead = 0;
884 break;
885 }
886 408
887 return dataRead; 409 return dataRead;
888} 410}
@@ -1043,15 +565,12 @@ ZEBRA_Config_85BASIC_HardCode(
1043 565
1044 // Page0 : reg0-reg15 566 // Page0 : reg0-reg15
1045 567
1046// RF_WriteReg(dev, 0x00, 0x003f); mdelay(1);//1
1047 RF_WriteReg(dev, 0x00, 0x009f); mdelay(1);// 1 568 RF_WriteReg(dev, 0x00, 0x009f); mdelay(1);// 1
1048 569
1049 RF_WriteReg(dev, 0x01, 0x06e0); mdelay(1); 570 RF_WriteReg(dev, 0x01, 0x06e0); mdelay(1);
1050 571
1051// RF_WriteReg(dev, 0x02, 0x004c); mdelay(1);//2
1052 RF_WriteReg(dev, 0x02, 0x004d); mdelay(1);// 2 572 RF_WriteReg(dev, 0x02, 0x004d); mdelay(1);// 2
1053 573
1054// RF_WriteReg(dev, 0x03, 0x0000); mdelay(1);//3
1055 RF_WriteReg(dev, 0x03, 0x07f1); mdelay(1);// 3 574 RF_WriteReg(dev, 0x03, 0x07f1); mdelay(1);// 3
1056 575
1057 RF_WriteReg(dev, 0x04, 0x0975); mdelay(1); 576 RF_WriteReg(dev, 0x04, 0x0975); mdelay(1);
@@ -1080,8 +599,6 @@ ZEBRA_Config_85BASIC_HardCode(
1080 599
1081 RF_WriteReg(dev, 0x07, 0x01A0); mdelay(1); 600 RF_WriteReg(dev, 0x07, 0x01A0); mdelay(1);
1082// Don't write RF23/RF24 to make a difference between 87S C cut and D cut. asked by SD3 stevenl. 601// Don't write RF23/RF24 to make a difference between 87S C cut and D cut. asked by SD3 stevenl.
1083// RF_WriteReg(dev, 0x08, 0x0597); mdelay(1);
1084// RF_WriteReg(dev, 0x09, 0x050a); mdelay(1);
1085 RF_WriteReg(dev, 0x0a, 0x0001); mdelay(1); 602 RF_WriteReg(dev, 0x0a, 0x0001); mdelay(1);
1086 RF_WriteReg(dev, 0x0b, 0x0418); mdelay(1); 603 RF_WriteReg(dev, 0x0b, 0x0418); mdelay(1);
1087 604
@@ -1097,7 +614,6 @@ ZEBRA_Config_85BASIC_HardCode(
1097 614
1098 RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1); 615 RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1);
1099 616
1100// RF_WriteReg(dev, 0x00, 0x017f); mdelay(1);//6
1101 RF_WriteReg(dev, 0x00, 0x01d7); mdelay(1);// 6 617 RF_WriteReg(dev, 0x00, 0x01d7); mdelay(1);// 6
1102 618
1103 RF_WriteReg(dev, 0x03, 0x0e00); mdelay(1); 619 RF_WriteReg(dev, 0x03, 0x0e00); mdelay(1);
@@ -1106,20 +622,14 @@ ZEBRA_Config_85BASIC_HardCode(
1106 { 622 {
1107 RF_WriteReg(dev, 0x01, i); mdelay(1); 623 RF_WriteReg(dev, 0x01, i); mdelay(1);
1108 RF_WriteReg(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1); 624 RF_WriteReg(dev, 0x02, ZEBRA_RF_RX_GAIN_TABLE[i]); mdelay(1);
1109 //DbgPrint("RF - 0x%x = 0x%x", i, ZEBRA_RF_RX_GAIN_TABLE[i]);
1110 } 625 }
1111 626
1112 RF_WriteReg(dev, 0x05, 0x0203); mdelay(1); /// 203, 343 627 RF_WriteReg(dev, 0x05, 0x0203); mdelay(1); /// 203, 343
1113 //RF_WriteReg(dev, 0x06, 0x0300); mdelay(1); // 400
1114 RF_WriteReg(dev, 0x06, 0x0200); mdelay(1); // 400 628 RF_WriteReg(dev, 0x06, 0x0200); mdelay(1); // 400
1115 629
1116 RF_WriteReg(dev, 0x00, 0x0137); mdelay(1); // switch to reg16-reg30, and HSSI disable 137 630 RF_WriteReg(dev, 0x00, 0x0137); mdelay(1); // switch to reg16-reg30, and HSSI disable 137
1117 mdelay(10); // Deay 10 ms. //0xfd 631 mdelay(10); // Deay 10 ms. //0xfd
1118 632
1119// RF_WriteReg(dev, 0x0c, 0x09be); mdelay(1); // 7
1120 //RF_WriteReg(dev, 0x0c, 0x07be); mdelay(1);
1121 //mdelay(10); // Deay 10 ms. //0xfd
1122
1123 RF_WriteReg(dev, 0x0d, 0x0008); mdelay(1); // Z4 synthesizer loop filter setting, 392 633 RF_WriteReg(dev, 0x0d, 0x0008); mdelay(1); // Z4 synthesizer loop filter setting, 392
1124 mdelay(10); // Deay 10 ms. //0xfd 634 mdelay(10); // Deay 10 ms. //0xfd
1125 635
@@ -1165,10 +675,8 @@ ZEBRA_Config_85BASIC_HardCode(
1165 RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1); 675 RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1);
1166 } 676 }
1167//by amy 080312 677//by amy 080312
1168// RF_WriteReg(dev, 0x0f, 0x0acc); mdelay(1); //-by amy 080312
1169 678
1170 RF_WriteReg(dev, 0x00, 0x00bf); mdelay(1); // switch to reg0-reg15, and HSSI enable 679 RF_WriteReg(dev, 0x00, 0x00bf); mdelay(1); // switch to reg0-reg15, and HSSI enable
1171// RF_WriteReg(dev, 0x0d, 0x009f); mdelay(1); // Rx BB start calibration, 00c//-edward
1172 RF_WriteReg(dev, 0x0d, 0x08df); mdelay(1); // Rx BB start calibration, 00c//+edward 680 RF_WriteReg(dev, 0x0d, 0x08df); mdelay(1); // Rx BB start calibration, 00c//+edward
1173 RF_WriteReg(dev, 0x02, 0x004d); mdelay(1); // temperature meter off 681 RF_WriteReg(dev, 0x02, 0x004d); mdelay(1); // temperature meter off
1174 RF_WriteReg(dev, 0x04, 0x0975); mdelay(1); // Rx mode 682 RF_WriteReg(dev, 0x04, 0x0975); mdelay(1); // Rx mode
@@ -1217,13 +725,10 @@ ZEBRA_Config_85BASIC_HardCode(
1217 // AGC.txt 725 // AGC.txt
1218 //============================================================================= 726 //=============================================================================
1219 727
1220// PlatformIOWrite4Byte( dev, PhyAddr, 0x00001280); // Annie, 2006-05-05
1221 write_phy_ofdm(dev, 0x00, 0x12); 728 write_phy_ofdm(dev, 0x00, 0x12);
1222 //WriteBBPortUchar(dev, 0x00001280);
1223 729
1224 for (i=0; i<128; i++) 730 for (i=0; i<128; i++)
1225 { 731 {
1226 //DbgPrint("AGC - [%x+1] = 0x%x\n", i, ZEBRA_AGC[i+1]);
1227 732
1228 data = ZEBRA_AGC[i+1]; 733 data = ZEBRA_AGC[i+1];
1229 data = data << 8; 734 data = data << 8;
@@ -1239,7 +744,6 @@ ZEBRA_Config_85BASIC_HardCode(
1239 } 744 }
1240 745
1241 PlatformIOWrite4Byte( dev, PhyAddr, 0x00001080); // Annie, 2006-05-05 746 PlatformIOWrite4Byte( dev, PhyAddr, 0x00001080); // Annie, 2006-05-05
1242 //WriteBBPortUchar(dev, 0x00001080);
1243 747
1244 //============================================================================= 748 //=============================================================================
1245 749
@@ -1252,8 +756,6 @@ ZEBRA_Config_85BASIC_HardCode(
1252 u4bRegOffset=i; 756 u4bRegOffset=i;
1253 u4bRegValue=OFDM_CONFIG[i]; 757 u4bRegValue=OFDM_CONFIG[i];
1254 758
1255 //DbgPrint("OFDM - 0x%x = 0x%x\n", u4bRegOffset, u4bRegValue);
1256
1257 WriteBBPortUchar(dev, 759 WriteBBPortUchar(dev,
1258 (0x00000080 | 760 (0x00000080 |
1259 (u4bRegOffset & 0x7f) | 761 (u4bRegOffset & 0x7f) |
@@ -1277,9 +779,6 @@ UpdateInitialGain(
1277 ) 779 )
1278{ 780{
1279 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 781 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1280 //unsigned char* IGTable;
1281 //u8 DIG_CurrentInitialGain = 4;
1282 //unsigned char u1Tmp;
1283 782
1284 //lzm add 080826 783 //lzm add 080826
1285 if(priv->eRFPowerState != eRfOn) 784 if(priv->eRFPowerState != eRfOn)
@@ -1291,81 +790,59 @@ UpdateInitialGain(
1291 return; 790 return;
1292 } 791 }
1293 792
1294 switch(priv->rf_chip) 793 switch (priv->InitialGain) {
1295 { 794 case 1: /* m861dBm */
1296 case RF_ZEBRA4: 795 write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
1297 // Dynamic set initial gain, follow 87B 796 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
1298 switch(priv->InitialGain) 797 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
1299 { 798 break;
1300 case 1: //m861dBm
1301 //DMESG("RTL8187 + 8225 Initial Gain State 1: -82 dBm \n");
1302 write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
1303 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
1304 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
1305 break;
1306
1307 case 2: //m862dBm
1308 //DMESG("RTL8187 + 8225 Initial Gain State 2: -82 dBm \n");
1309 write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
1310 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
1311 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
1312 break;
1313
1314 case 3: //m863dBm
1315 //DMESG("RTL8187 + 8225 Initial Gain State 3: -82 dBm \n");
1316 write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
1317 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
1318 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
1319 break;
1320
1321 case 4: //m864dBm
1322 //DMESG("RTL8187 + 8225 Initial Gain State 4: -78 dBm \n");
1323 write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
1324 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
1325 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
1326 break;
1327 799
1328 case 5: //m82dBm 800 case 2: /* m862dBm */
1329 //DMESG("RTL8187 + 8225 Initial Gain State 5: -74 dBm \n"); 801 write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
1330 write_phy_ofdm(dev, 0x17, 0x46); mdelay(1); 802 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
1331 write_phy_ofdm(dev, 0x24, 0x96); mdelay(1); 803 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
1332 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1); 804 break;
1333 break;
1334 805
1335 case 6: //m78dBm 806 case 3: /* m863dBm */
1336 //DMESG ("RTL8187 + 8225 Initial Gain State 6: -70 dBm \n"); 807 write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
1337 write_phy_ofdm(dev, 0x17, 0x56); mdelay(1); 808 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
1338 write_phy_ofdm(dev, 0x24, 0x96); mdelay(1); 809 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
1339 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); 810 break;
1340 break;
1341 811
1342 case 7: //m74dBm 812 case 4: /* m864dBm */
1343 //DMESG("RTL8187 + 8225 Initial Gain State 7: -66 dBm \n"); 813 write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
1344 write_phy_ofdm(dev, 0x17, 0x56); mdelay(1); 814 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
1345 write_phy_ofdm(dev, 0x24, 0xa6); mdelay(1); 815 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
1346 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); 816 break;
1347 break;
1348 817
1349 case 8: 818 case 5: /* m82dBm */
1350 //DMESG("RTL8187 + 8225 Initial Gain State 8:\n"); 819 write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
1351 write_phy_ofdm(dev, 0x17, 0x66); mdelay(1); 820 write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
1352 write_phy_ofdm(dev, 0x24, 0xb6); mdelay(1); 821 write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
1353 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1); 822 break;
1354 break;
1355 823
824 case 6: /* m78dBm */
825 write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
826 write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
827 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
828 break;
1356 829
1357 default: //MP 830 case 7: /* m74dBm */
1358 //DMESG("RTL8187 + 8225 Initial Gain State 1: -82 dBm (default)\n"); 831 write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
1359 write_phy_ofdm(dev, 0x17, 0x26); mdelay(1); 832 write_phy_ofdm(dev, 0x24, 0xa6); mdelay(1);
1360 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); 833 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
1361 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
1362 break;
1363 }
1364 break; 834 break;
1365 835
836 case 8:
837 write_phy_ofdm(dev, 0x17, 0x66); mdelay(1);
838 write_phy_ofdm(dev, 0x24, 0xb6); mdelay(1);
839 write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
840 break;
1366 841
1367 default: 842 default: /* MP */
1368 DMESG("UpdateInitialGain(): unknown RFChipID: %#X\n", priv->rf_chip); 843 write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
844 write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
845 write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
1369 break; 846 break;
1370 } 847 }
1371} 848}
@@ -1379,13 +856,11 @@ InitTxPwrTracking87SE(
1379 struct net_device *dev 856 struct net_device *dev
1380) 857)
1381{ 858{
1382 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1383 u32 u4bRfReg; 859 u32 u4bRfReg;
1384 860
1385 u4bRfReg = RF_ReadReg(dev, 0x02); 861 u4bRfReg = RF_ReadReg(dev, 0x02);
1386 862
1387 // Enable Thermal meter indication. 863 // Enable Thermal meter indication.
1388 //printk("InitTxPwrTracking87SE(): Enable thermal meter indication, Write RF[0x02] = %#x", u4bRfReg|PWR_METER_EN);
1389 RF_WriteReg(dev, 0x02, u4bRfReg|PWR_METER_EN); mdelay(1); 864 RF_WriteReg(dev, 0x02, u4bRfReg|PWR_METER_EN); mdelay(1);
1390} 865}
1391 866
@@ -1397,21 +872,14 @@ PhyConfig8185(
1397 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 872 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1398 write_nic_dword(dev, RCR, priv->ReceiveConfig); 873 write_nic_dword(dev, RCR, priv->ReceiveConfig);
1399 priv->RFProgType = read_nic_byte(dev, CONFIG4) & 0x03; 874 priv->RFProgType = read_nic_byte(dev, CONFIG4) & 0x03;
1400 // RF config 875 /* RF config */
1401 switch(priv->rf_chip) 876 ZEBRA_Config_85BASIC_HardCode(dev);
1402 {
1403 case RF_ZEBRA2:
1404 case RF_ZEBRA4:
1405 ZEBRA_Config_85BASIC_HardCode( dev);
1406 break;
1407 }
1408//{by amy 080312 877//{by amy 080312
1409 // Set default initial gain state to 4, approved by SD3 DZ, by Bruce, 2007-06-06. 878 // Set default initial gain state to 4, approved by SD3 DZ, by Bruce, 2007-06-06.
1410 if(priv->bDigMechanism) 879 if(priv->bDigMechanism)
1411 { 880 {
1412 if(priv->InitialGain == 0) 881 if(priv->InitialGain == 0)
1413 priv->InitialGain = 4; 882 priv->InitialGain = 4;
1414 //printk("PhyConfig8185(): DIG is enabled, set default initial gain index to %d\n", priv->InitialGain);
1415 } 883 }
1416 884
1417 // 885 //
@@ -1429,34 +897,17 @@ PhyConfig8185(
1429 return; 897 return;
1430} 898}
1431 899
1432
1433
1434
1435void 900void
1436HwConfigureRTL8185( 901HwConfigureRTL8185(
1437 struct net_device *dev 902 struct net_device *dev
1438 ) 903 )
1439{ 904{
1440 //RTL8185_TODO: Determine Retrylimit, TxAGC, AutoRateFallback control. 905 //RTL8185_TODO: Determine Retrylimit, TxAGC, AutoRateFallback control.
1441// u8 bUNIVERSAL_CONTROL_RL = 1;
1442 u8 bUNIVERSAL_CONTROL_RL = 0; 906 u8 bUNIVERSAL_CONTROL_RL = 0;
1443
1444 u8 bUNIVERSAL_CONTROL_AGC = 1; 907 u8 bUNIVERSAL_CONTROL_AGC = 1;
1445 u8 bUNIVERSAL_CONTROL_ANT = 1; 908 u8 bUNIVERSAL_CONTROL_ANT = 1;
1446 u8 bAUTO_RATE_FALLBACK_CTL = 1; 909 u8 bAUTO_RATE_FALLBACK_CTL = 1;
1447 u8 val8; 910 u8 val8;
1448 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1449 //struct ieee80211_device *ieee = priv->ieee80211;
1450 //if(IS_WIRELESS_MODE_A(dev) || IS_WIRELESS_MODE_G(dev))
1451//{by amy 080312 if((ieee->mode == IEEE_G)||(ieee->mode == IEEE_A))
1452// {
1453// write_nic_word(dev, BRSR, 0xffff);
1454// }
1455// else
1456// {
1457// write_nic_word(dev, BRSR, 0x000f);
1458// }
1459//by amy 080312}
1460 write_nic_word(dev, BRSR, 0x0fff); 911 write_nic_word(dev, BRSR, 0x0fff);
1461 // Retry limit 912 // Retry limit
1462 val8 = read_nic_byte(dev, CW_CONF); 913 val8 = read_nic_byte(dev, CW_CONF);
@@ -1507,20 +958,11 @@ HwConfigureRTL8185(
1507 val8 |= RATE_FALLBACK_CTL_ENABLE | RATE_FALLBACK_CTL_AUTO_STEP1; 958 val8 |= RATE_FALLBACK_CTL_ENABLE | RATE_FALLBACK_CTL_AUTO_STEP1;
1508 959
1509 // <RJ_TODO_8185B> We shall set up the ARFR according to user's setting. 960 // <RJ_TODO_8185B> We shall set up the ARFR according to user's setting.
1510 //write_nic_word(dev, ARFR, 0x0fff); // set 1M ~ 54M
1511//by amy
1512 // Aadded by Roger, 2007.11.15.
1513 PlatformIOWrite2Byte(dev, ARFR, 0x0fff); //set 1M ~ 54Mbps. 961 PlatformIOWrite2Byte(dev, ARFR, 0x0fff); //set 1M ~ 54Mbps.
1514//by amy
1515 }
1516 else
1517 {
1518 } 962 }
1519 write_nic_byte(dev, RATE_FALLBACK, val8); 963 write_nic_byte(dev, RATE_FALLBACK, val8);
1520} 964}
1521 965
1522
1523
1524static void 966static void
1525MacConfig_85BASIC_HardCode( 967MacConfig_85BASIC_HardCode(
1526 struct net_device *dev) 968 struct net_device *dev)
@@ -1548,14 +990,11 @@ MacConfig_85BASIC_HardCode(
1548 { 990 {
1549 u4bRegOffset |= (u4bPageIndex << 8); 991 u4bRegOffset |= (u4bPageIndex << 8);
1550 } 992 }
1551 //DbgPrint("MAC - 0x%x = 0x%x\n", u4bRegOffset, u4bRegValue);
1552 write_nic_byte(dev, u4bRegOffset, (u8)u4bRegValue); 993 write_nic_byte(dev, u4bRegOffset, (u8)u4bRegValue);
1553 } 994 }
1554 //============================================================================ 995 //============================================================================
1555} 996}
1556 997
1557
1558
1559static void 998static void
1560MacConfig_85BASIC( 999MacConfig_85BASIC(
1561 struct net_device *dev) 1000 struct net_device *dev)
@@ -1578,8 +1017,6 @@ MacConfig_85BASIC(
1578 PlatformIOWrite1Byte(dev, 0x1F8, 0x00); 1017 PlatformIOWrite1Byte(dev, 0x1F8, 0x00);
1579 1018
1580 // Asked for by SD3 CM Lin, 2006.06.27, by rcnjko. 1019 // Asked for by SD3 CM Lin, 2006.06.27, by rcnjko.
1581 //PlatformIOWrite4Byte(dev, RFTiming, 0x00004001);
1582//by amy
1583 // power save parameter based on "87SE power save parameters 20071127.doc", as follow. 1020 // power save parameter based on "87SE power save parameters 20071127.doc", as follow.
1584 1021
1585 //Enable DA10 TX power saving 1022 //Enable DA10 TX power saving
@@ -1598,35 +1035,18 @@ MacConfig_85BASIC(
1598 write_nic_word(dev, 0x378, 0x0560); 1035 write_nic_word(dev, 0x378, 0x0560);
1599 write_nic_word(dev, 0x37A, 0x0560); 1036 write_nic_word(dev, 0x37A, 0x0560);
1600 write_nic_word(dev, 0x37C, 0x00EC); 1037 write_nic_word(dev, 0x37C, 0x00EC);
1601// write_nic_word(dev, 0x37E, 0x00FE);//-edward
1602 write_nic_word(dev, 0x37E, 0x00EC);//+edward 1038 write_nic_word(dev, 0x37E, 0x00EC);//+edward
1603 write_nic_byte(dev, 0x24E,0x01); 1039 write_nic_byte(dev, 0x24E,0x01);
1604//by amy
1605
1606} 1040}
1607 1041
1608
1609
1610
1611u8 1042u8
1612GetSupportedWirelessMode8185( 1043GetSupportedWirelessMode8185(
1613 struct net_device *dev 1044 struct net_device *dev
1614) 1045)
1615{ 1046{
1616 u8 btSupportedWirelessMode = 0; 1047 u8 btSupportedWirelessMode = 0;
1617 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1618
1619 switch(priv->rf_chip)
1620 {
1621 case RF_ZEBRA2:
1622 case RF_ZEBRA4:
1623 btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G);
1624 break;
1625 default:
1626 btSupportedWirelessMode = WIRELESS_MODE_B;
1627 break;
1628 }
1629 1048
1049 btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G);
1630 return btSupportedWirelessMode; 1050 return btSupportedWirelessMode;
1631} 1051}
1632 1052
@@ -1641,7 +1061,6 @@ ActUpdateChannelAccessSetting(
1641 struct ieee80211_device *ieee = priv->ieee80211; 1061 struct ieee80211_device *ieee = priv->ieee80211;
1642 AC_CODING eACI; 1062 AC_CODING eACI;
1643 AC_PARAM AcParam; 1063 AC_PARAM AcParam;
1644 //PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos;
1645 u8 bFollowLegacySetting = 0; 1064 u8 bFollowLegacySetting = 0;
1646 u8 u1bAIFS; 1065 u8 u1bAIFS;
1647 1066
@@ -1663,40 +1082,14 @@ ActUpdateChannelAccessSetting(
1663 ChnlAccessSetting->CWmaxIndex = 7; // 2006.06.02, by rcnjko. 1082 ChnlAccessSetting->CWmaxIndex = 7; // 2006.06.02, by rcnjko.
1664 1083
1665 write_nic_byte(dev, SIFS, ChnlAccessSetting->SIFS_Timer); 1084 write_nic_byte(dev, SIFS, ChnlAccessSetting->SIFS_Timer);
1666 //Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SLOT_TIME, &ChnlAccessSetting->SlotTimeTimer ); // Rewrited from directly use PlatformEFIOWrite1Byte(), by Annie, 2006-03-29.
1667 write_nic_byte(dev, SLOT, ChnlAccessSetting->SlotTimeTimer); // Rewrited from directly use PlatformEFIOWrite1Byte(), by Annie, 2006-03-29. 1085 write_nic_byte(dev, SLOT, ChnlAccessSetting->SlotTimeTimer); // Rewrited from directly use PlatformEFIOWrite1Byte(), by Annie, 2006-03-29.
1668 1086
1669 u1bAIFS = aSifsTime + (2 * ChnlAccessSetting->SlotTimeTimer ); 1087 u1bAIFS = aSifsTime + (2 * ChnlAccessSetting->SlotTimeTimer );
1670 1088
1671 //write_nic_byte(dev, AC_VO_PARAM, u1bAIFS);
1672 //write_nic_byte(dev, AC_VI_PARAM, u1bAIFS);
1673 //write_nic_byte(dev, AC_BE_PARAM, u1bAIFS);
1674 //write_nic_byte(dev, AC_BK_PARAM, u1bAIFS);
1675
1676 write_nic_byte(dev, EIFS, ChnlAccessSetting->EIFS_Timer); 1089 write_nic_byte(dev, EIFS, ChnlAccessSetting->EIFS_Timer);
1677 1090
1678 write_nic_byte(dev, AckTimeOutReg, 0x5B); // <RJ_EXPR_QOS> Suggested by wcchu, it is the default value of EIFS register, 2005.12.08. 1091 write_nic_byte(dev, AckTimeOutReg, 0x5B); // <RJ_EXPR_QOS> Suggested by wcchu, it is the default value of EIFS register, 2005.12.08.
1679 1092
1680#ifdef TODO
1681 // <RJ_TODO_NOW_8185B> Update ECWmin/ECWmax, AIFS, TXOP Limit of each AC to the value defined by SPEC.
1682 if( pStaQos->CurrentQosMode > QOS_DISABLE )
1683 { // QoS mode.
1684 if(pStaQos->QBssWirelessMode == WirelessMode)
1685 {
1686 // Follow AC Parameters of the QBSS.
1687 for(eACI = 0; eACI < AC_MAX; eACI++)
1688 {
1689 Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, (pu1Byte)(&(pStaQos->WMMParamEle.AcParam[eACI])) );
1690 }
1691 }
1692 else
1693 {
1694 // Follow Default WMM AC Parameters.
1695 bFollowLegacySetting = 1;
1696 }
1697 }
1698 else
1699#endif
1700 { // Legacy 802.11. 1093 { // Legacy 802.11.
1701 bFollowLegacySetting = 1; 1094 bFollowLegacySetting = 1;
1702 1095
@@ -1719,14 +1112,12 @@ ActUpdateChannelAccessSetting(
1719 AcParam.f.TXOPLimit = 0; 1112 AcParam.f.TXOPLimit = 0;
1720 1113
1721 //lzm reserved 080826 1114 //lzm reserved 080826
1722#if 1
1723 // For turbo mode setting. port from 87B by Isaiah 2008-08-01 1115 // For turbo mode setting. port from 87B by Isaiah 2008-08-01
1724 if( ieee->current_network.Turbo_Enable == 1 ) 1116 if( ieee->current_network.Turbo_Enable == 1 )
1725 AcParam.f.TXOPLimit = 0x01FF; 1117 AcParam.f.TXOPLimit = 0x01FF;
1726 // For 87SE with Intel 4965 Ad-Hoc mode have poor throughput (19MB) 1118 // For 87SE with Intel 4965 Ad-Hoc mode have poor throughput (19MB)
1727 if (ieee->iw_mode == IW_MODE_ADHOC) 1119 if (ieee->iw_mode == IW_MODE_ADHOC)
1728 AcParam.f.TXOPLimit = 0x0020; 1120 AcParam.f.TXOPLimit = 0x0020;
1729#endif
1730 1121
1731 for(eACI = 0; eACI < AC_MAX; eACI++) 1122 for(eACI = 0; eACI < AC_MAX; eACI++)
1732 { 1123 {
@@ -1770,18 +1161,13 @@ ActUpdateChannelAccessSetting(
1770 1161
1771 // Cehck ACM bit. 1162 // Cehck ACM bit.
1772 // If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13. 1163 // If it is set, immediately set ACM control bit to downgrading AC for passing WMM testplan. Annie, 2005-12-13.
1773 //write_nic_byte(dev, ACM_CONTROL, pAcParam->f.AciAifsn);
1774 { 1164 {
1775 PACI_AIFSN pAciAifsn = (PACI_AIFSN)(&pAcParam->f.AciAifsn); 1165 PACI_AIFSN pAciAifsn = (PACI_AIFSN)(&pAcParam->f.AciAifsn);
1776 AC_CODING eACI = pAciAifsn->f.ACI; 1166 AC_CODING eACI = pAciAifsn->f.ACI;
1777 1167
1778 //modified Joseph 1168 //modified Joseph
1779 //for 8187B AsynIORead issue 1169 //for 8187B AsynIORead issue
1780#ifdef TODO
1781 u8 AcmCtrl = pHalData->AcmControl;
1782#else
1783 u8 AcmCtrl = 0; 1170 u8 AcmCtrl = 0;
1784#endif
1785 if( pAciAifsn->f.ACM ) 1171 if( pAciAifsn->f.ACM )
1786 { // ACM bit is 1. 1172 { // ACM bit is 1.
1787 switch(eACI) 1173 switch(eACI)
@@ -1823,19 +1209,10 @@ ActUpdateChannelAccessSetting(
1823 break; 1209 break;
1824 } 1210 }
1825 } 1211 }
1826
1827 //printk(KERN_WARNING "SetHwReg8185(): [HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1828
1829#ifdef TO_DO
1830 pHalData->AcmControl = AcmCtrl;
1831#endif
1832 //write_nic_byte(dev, ACM_CONTROL, AcmCtrl);
1833 write_nic_byte(dev, ACM_CONTROL, 0); 1212 write_nic_byte(dev, ACM_CONTROL, 0);
1834 } 1213 }
1835 } 1214 }
1836 } 1215 }
1837
1838
1839 } 1216 }
1840} 1217}
1841 1218
@@ -1847,7 +1224,6 @@ ActSetWirelessMode8185(
1847{ 1224{
1848 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1225 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1849 struct ieee80211_device *ieee = priv->ieee80211; 1226 struct ieee80211_device *ieee = priv->ieee80211;
1850 //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
1851 u8 btSupportedWirelessMode = GetSupportedWirelessMode8185(dev); 1227 u8 btSupportedWirelessMode = GetSupportedWirelessMode8185(dev);
1852 1228
1853 if( (btWirelessMode & btSupportedWirelessMode) == 0 ) 1229 if( (btWirelessMode & btSupportedWirelessMode) == 0 )
@@ -1880,24 +1256,11 @@ ActSetWirelessMode8185(
1880 } 1256 }
1881 } 1257 }
1882 1258
1883 1259 /* 2. Swtich band: RF or BB specific actions,
1884 // 2. Swtich band: RF or BB specific actions, 1260 * for example, refresh tables in omc8255, or change initial gain if necessary.
1885 // for example, refresh tables in omc8255, or change initial gain if necessary. 1261 * Nothing to do for Zebra to switch band.
1886 switch(priv->rf_chip) 1262 * Update current wireless mode if we swtich to specified band successfully. */
1887 { 1263 ieee->mode = (WIRELESS_MODE)btWirelessMode;
1888 case RF_ZEBRA2:
1889 case RF_ZEBRA4:
1890 {
1891 // Nothing to do for Zebra to switch band.
1892 // Update current wireless mode if we swtich to specified band successfully.
1893 ieee->mode = (WIRELESS_MODE)btWirelessMode;
1894 }
1895 break;
1896
1897 default:
1898 DMESGW("ActSetWirelessMode8185(): unsupported RF: 0x%X !!!\n", priv->rf_chip);
1899 break;
1900 }
1901 1264
1902 // 3. Change related setting. 1265 // 3. Change related setting.
1903 if( ieee->mode == WIRELESS_MODE_A ){ 1266 if( ieee->mode == WIRELESS_MODE_A ){
@@ -1909,7 +1272,6 @@ ActSetWirelessMode8185(
1909 else if( ieee->mode == WIRELESS_MODE_G ){ 1272 else if( ieee->mode == WIRELESS_MODE_G ){
1910 DMESG("WIRELESS_MODE_G\n"); 1273 DMESG("WIRELESS_MODE_G\n");
1911 } 1274 }
1912
1913 ActUpdateChannelAccessSetting( dev, ieee->mode, &priv->ChannelAccessSetting); 1275 ActUpdateChannelAccessSetting( dev, ieee->mode, &priv->ChannelAccessSetting);
1914} 1276}
1915 1277
@@ -1927,11 +1289,7 @@ DrvIFIndicateDisassociation(
1927 u16 reason 1289 u16 reason
1928 ) 1290 )
1929{ 1291{
1930 //printk("==> DrvIFIndicateDisassociation()\n");
1931
1932 // nothing is needed after disassociation request. 1292 // nothing is needed after disassociation request.
1933
1934 //printk("<== DrvIFIndicateDisassociation()\n");
1935} 1293}
1936void 1294void
1937MgntDisconnectIBSS( 1295MgntDisconnectIBSS(
@@ -1941,11 +1299,7 @@ MgntDisconnectIBSS(
1941 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1299 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1942 u8 i; 1300 u8 i;
1943 1301
1944 //printk("XXXXXXXXXX MgntDisconnect IBSS\n");
1945
1946 DrvIFIndicateDisassociation(dev, unspec_reason); 1302 DrvIFIndicateDisassociation(dev, unspec_reason);
1947
1948// PlatformZeroMemory( pMgntInfo->Bssid, 6 );
1949 for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x55; 1303 for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x55;
1950 1304
1951 priv->ieee80211->state = IEEE80211_NOLINK; 1305 priv->ieee80211->state = IEEE80211_NOLINK;
@@ -1957,16 +1311,10 @@ MgntDisconnectIBSS(
1957 // Because Bcn DMA isn't complete, mgnt queue would stuck until Bcn packet send. 1311 // Because Bcn DMA isn't complete, mgnt queue would stuck until Bcn packet send.
1958 1312
1959 // Disable Beacon Queue Own bit, suggested by jong 1313 // Disable Beacon Queue Own bit, suggested by jong
1960// Adapter->HalFunc.SetTxDescOWNHandler(Adapter, BEACON_QUEUE, 0, 0);
1961 ieee80211_stop_send_beacons(priv->ieee80211); 1314 ieee80211_stop_send_beacons(priv->ieee80211);
1962 1315
1963 priv->ieee80211->link_change(dev); 1316 priv->ieee80211->link_change(dev);
1964 notify_wx_assoc_event(priv->ieee80211); 1317 notify_wx_assoc_event(priv->ieee80211);
1965
1966 // Stop SW Beacon.Use hw beacon so do not need to do so.by amy
1967
1968// MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE );
1969
1970} 1318}
1971void 1319void
1972MlmeDisassociateRequest( 1320MlmeDisassociateRequest(
@@ -1986,14 +1334,8 @@ MlmeDisassociateRequest(
1986 DrvIFIndicateDisassociation(dev, unspec_reason); 1334 DrvIFIndicateDisassociation(dev, unspec_reason);
1987 1335
1988 1336
1989 // pMgntInfo->AsocTimestamp = 0;
1990 for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22; 1337 for(i=0;i<6;i++) priv->ieee80211->current_network.bssid[i] = 0x22;
1991// pMgntInfo->mBrates.Length = 0;
1992// Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_BASIC_RATE, (pu1Byte)(&pMgntInfo->mBrates) );
1993
1994 ieee80211_disassociate(priv->ieee80211); 1338 ieee80211_disassociate(priv->ieee80211);
1995
1996
1997 } 1339 }
1998 1340
1999} 1341}
@@ -2011,23 +1353,12 @@ MgntDisconnectAP(
2011// I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE(). 1353// I move SecClearAllKeys() to MgntActSet_802_11_DISASSOCIATE().
2012// 1354//
2013// //2004/09/15, kcwu, the key should be cleared, or the new handshaking will not success 1355// //2004/09/15, kcwu, the key should be cleared, or the new handshaking will not success
2014// SecClearAllKeys(Adapter);
2015 1356
2016 // In WPA WPA2 need to Clear all key ... because new key will set after new handshaking. 1357 // In WPA WPA2 need to Clear all key ... because new key will set after new handshaking.
2017#ifdef TODO
2018 if( pMgntInfo->SecurityInfo.AuthMode > RT_802_11AuthModeAutoSwitch ||
2019 (pMgntInfo->bAPSuportCCKM && pMgntInfo->bCCX8021xenable) ) // In CCKM mode will Clear key
2020 {
2021 SecClearAllKeys(Adapter);
2022 RT_TRACE(COMP_SEC, DBG_LOUD,("======>CCKM clear key..."))
2023 }
2024#endif
2025 // 2004.10.11, by rcnjko. 1358 // 2004.10.11, by rcnjko.
2026 //MlmeDisassociateRequest( Adapter, pMgntInfo->Bssid, disas_lv_ss );
2027 MlmeDisassociateRequest( dev, priv->ieee80211->current_network.bssid, asRsn ); 1359 MlmeDisassociateRequest( dev, priv->ieee80211->current_network.bssid, asRsn );
2028 1360
2029 priv->ieee80211->state = IEEE80211_NOLINK; 1361 priv->ieee80211->state = IEEE80211_NOLINK;
2030// pMgntInfo->AsocTimestamp = 0;
2031} 1362}
2032bool 1363bool
2033MgntDisconnect( 1364MgntDisconnect(
@@ -2039,20 +1370,7 @@ MgntDisconnect(
2039 // 1370 //
2040 // Schedule an workitem to wake up for ps mode, 070109, by rcnjko. 1371 // Schedule an workitem to wake up for ps mode, 070109, by rcnjko.
2041 // 1372 //
2042#ifdef TODO
2043 if(pMgntInfo->mPss != eAwake)
2044 {
2045 //
2046 // Using AwkaeTimer to prevent mismatch ps state.
2047 // In the timer the state will be changed according to the RF is being awoke or not. By Bruce, 2007-10-31.
2048 //
2049 // PlatformScheduleWorkItem( &(pMgntInfo->AwakeWorkItem) );
2050 PlatformSetTimer( Adapter, &(pMgntInfo->AwakeTimer), 0 );
2051 }
2052#endif
2053 1373
2054 // Indication of disassociation event.
2055 //DrvIFIndicateDisassociation(Adapter, asRsn);
2056 if(IS_DOT11D_ENABLE(priv->ieee80211)) 1374 if(IS_DOT11D_ENABLE(priv->ieee80211))
2057 Dot11d_Reset(priv->ieee80211); 1375 Dot11d_Reset(priv->ieee80211);
2058 // In adhoc mode, update beacon frame. 1376 // In adhoc mode, update beacon frame.
@@ -2060,8 +1378,6 @@ MgntDisconnect(
2060 { 1378 {
2061 if( priv->ieee80211->iw_mode == IW_MODE_ADHOC ) 1379 if( priv->ieee80211->iw_mode == IW_MODE_ADHOC )
2062 { 1380 {
2063// RT_TRACE(COMP_MLME, DBG_LOUD, ("MgntDisconnect() ===> MgntDisconnectIBSS\n"));
2064 //printk("MgntDisconnect() ===> MgntDisconnectIBSS\n");
2065 MgntDisconnectIBSS(dev); 1381 MgntDisconnectIBSS(dev);
2066 } 1382 }
2067 if( priv->ieee80211->iw_mode == IW_MODE_INFRA ) 1383 if( priv->ieee80211->iw_mode == IW_MODE_INFRA )
@@ -2071,17 +1387,10 @@ MgntDisconnect(
2071 // e.g. OID_802_11_DISASSOCIATE in Windows while as MgntDisconnectAP() is 1387 // e.g. OID_802_11_DISASSOCIATE in Windows while as MgntDisconnectAP() is
2072 // used to handle disassociation related things to AP, e.g. send Disassoc 1388 // used to handle disassociation related things to AP, e.g. send Disassoc
2073 // frame to AP. 2005.01.27, by rcnjko. 1389 // frame to AP. 2005.01.27, by rcnjko.
2074// SecClearAllKeys(Adapter);
2075
2076// RT_TRACE(COMP_MLME, DBG_LOUD, ("MgntDisconnect() ===> MgntDisconnectAP\n"));
2077 //printk("MgntDisconnect() ===> MgntDisconnectAP\n");
2078 MgntDisconnectAP(dev, asRsn); 1390 MgntDisconnectAP(dev, asRsn);
2079 } 1391 }
2080
2081 // Inidicate Disconnect, 2005.02.23, by rcnjko. 1392 // Inidicate Disconnect, 2005.02.23, by rcnjko.
2082// MgntIndicateMediaStatus( Adapter, RT_MEDIA_DISCONNECT, GENERAL_INDICATE);
2083 } 1393 }
2084
2085 return true; 1394 return true;
2086} 1395}
2087// 1396//
@@ -2101,25 +1410,12 @@ SetRFPowerState(
2101 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1410 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2102 bool bResult = false; 1411 bool bResult = false;
2103 1412
2104// printk("---------> SetRFPowerState(): eRFPowerState(%d)\n", eRFPowerState);
2105 if(eRFPowerState == priv->eRFPowerState) 1413 if(eRFPowerState == priv->eRFPowerState)
2106 { 1414 {
2107// printk("<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState);
2108 return bResult; 1415 return bResult;
2109 } 1416 }
2110 1417
2111 switch(priv->rf_chip) 1418 bResult = SetZebraRFPowerState8185(dev, eRFPowerState);
2112 {
2113 case RF_ZEBRA2:
2114 case RF_ZEBRA4:
2115 bResult = SetZebraRFPowerState8185(dev, eRFPowerState);
2116 break;
2117
2118 default:
2119 printk("SetRFPowerState8185(): unknown RFChipID: 0x%X!!!\n", priv->rf_chip);
2120 break;;
2121}
2122// printk("<--------- SetRFPowerState(): bResult(%d)\n", bResult);
2123 1419
2124 return bResult; 1420 return bResult;
2125} 1421}
@@ -2149,33 +1445,25 @@ MgntActSet_RF_State(
2149 RT_RF_POWER_STATE rtState; 1445 RT_RF_POWER_STATE rtState;
2150 u16 RFWaitCounter = 0; 1446 u16 RFWaitCounter = 0;
2151 unsigned long flag; 1447 unsigned long flag;
2152// printk("===>MgntActSet_RF_State(): StateToSet(%d), ChangeSource(0x%x)\n",StateToSet, ChangeSource);
2153 // 1448 //
2154 // Prevent the race condition of RF state change. By Bruce, 2007-11-28. 1449 // Prevent the race condition of RF state change. By Bruce, 2007-11-28.
2155 // Only one thread can change the RF state at one time, and others should wait to be executed. 1450 // Only one thread can change the RF state at one time, and others should wait to be executed.
2156 // 1451 //
2157#if 1
2158 while(true) 1452 while(true)
2159 { 1453 {
2160// down(&priv->rf_state);
2161 spin_lock_irqsave(&priv->rf_ps_lock,flag); 1454 spin_lock_irqsave(&priv->rf_ps_lock,flag);
2162 if(priv->RFChangeInProgress) 1455 if(priv->RFChangeInProgress)
2163 { 1456 {
2164// printk("====================>haha111111111\n");
2165// up(&priv->rf_state);
2166// RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n", StateToSet));
2167 spin_unlock_irqrestore(&priv->rf_ps_lock,flag); 1457 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
2168 // Set RF after the previous action is done. 1458 // Set RF after the previous action is done.
2169 while(priv->RFChangeInProgress) 1459 while(priv->RFChangeInProgress)
2170 { 1460 {
2171 RFWaitCounter ++; 1461 RFWaitCounter ++;
2172// RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): Wait 1 ms (%d times)...\n", RFWaitCounter));
2173 udelay(1000); // 1 ms 1462 udelay(1000); // 1 ms
2174 1463
2175 // Wait too long, return FALSE to avoid to be stuck here. 1464 // Wait too long, return FALSE to avoid to be stuck here.
2176 if(RFWaitCounter > 1000) // 1sec 1465 if(RFWaitCounter > 1000) // 1sec
2177 { 1466 {
2178// RT_ASSERT(FALSE, ("MgntActSet_RF_State(): Wait too logn to set RF\n"));
2179 printk("MgntActSet_RF_State(): Wait too long to set RF\n"); 1467 printk("MgntActSet_RF_State(): Wait too long to set RF\n");
2180 // TODO: Reset RF state? 1468 // TODO: Reset RF state?
2181 return false; 1469 return false;
@@ -2184,17 +1472,13 @@ MgntActSet_RF_State(
2184 } 1472 }
2185 else 1473 else
2186 { 1474 {
2187// printk("========================>haha2\n");
2188 priv->RFChangeInProgress = true; 1475 priv->RFChangeInProgress = true;
2189// up(&priv->rf_state);
2190 spin_unlock_irqrestore(&priv->rf_ps_lock,flag); 1476 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
2191 break; 1477 break;
2192 } 1478 }
2193 } 1479 }
2194#endif
2195 rtState = priv->eRFPowerState; 1480 rtState = priv->eRFPowerState;
2196 1481
2197
2198 switch(StateToSet) 1482 switch(StateToSet)
2199 { 1483 {
2200 case eRfOn: 1484 case eRfOn:
@@ -2215,7 +1499,6 @@ MgntActSet_RF_State(
2215 } 1499 }
2216 } 1500 }
2217 else 1501 else
2218// RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n", pMgntInfo->RfOffReason, ChangeSource));
2219 ; 1502 ;
2220 break; 1503 break;
2221 1504
@@ -2232,38 +1515,26 @@ MgntActSet_RF_State(
2232 // 1515 //
2233 // Calling MgntDisconnect() instead of MgntActSet_802_11_DISASSOCIATE(), 1516 // Calling MgntDisconnect() instead of MgntActSet_802_11_DISASSOCIATE(),
2234 // because we do NOT need to set ssid to dummy ones. 1517 // because we do NOT need to set ssid to dummy ones.
2235 // Revised by Roger, 2007.12.04.
2236 // 1518 //
2237 MgntDisconnect( dev, disas_lv_ss ); 1519 MgntDisconnect( dev, disas_lv_ss );
2238 1520
2239 // Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI. 1521 // Clear content of bssDesc[] and bssDesc4Query[] to avoid reporting old bss to UI.
2240 // 2007.05.28, by shien chang.
2241// PlatformZeroMemory( pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC );
2242// pMgntInfo->NumBssDesc = 0;
2243// PlatformZeroMemory( pMgntInfo->bssDesc4Query, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC );
2244// pMgntInfo->NumBssDesc4Query = 0;
2245 } 1522 }
2246 1523
2247
2248
2249 priv->RfOffReason |= ChangeSource; 1524 priv->RfOffReason |= ChangeSource;
2250 bActionAllowed = true; 1525 bActionAllowed = true;
2251 break; 1526 break;
2252
2253 case eRfSleep: 1527 case eRfSleep:
2254 priv->RfOffReason |= ChangeSource; 1528 priv->RfOffReason |= ChangeSource;
2255 bActionAllowed = true; 1529 bActionAllowed = true;
2256 break; 1530 break;
2257
2258 default: 1531 default:
2259 break; 1532 break;
2260 } 1533 }
2261 1534
2262 if(bActionAllowed) 1535 if(bActionAllowed)
2263 { 1536 {
2264// RT_TRACE(COMP_RF, DBG_LOUD, ("MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, pMgntInfo->RfOffReason));
2265 // Config HW to the specified mode. 1537 // Config HW to the specified mode.
2266// printk("MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n", StateToSet, priv->RfOffReason);
2267 SetRFPowerState(dev, StateToSet); 1538 SetRFPowerState(dev, StateToSet);
2268 1539
2269 // Turn on RF. 1540 // Turn on RF.
@@ -2273,7 +1544,6 @@ MgntActSet_RF_State(
2273 if(bConnectBySSID) 1544 if(bConnectBySSID)
2274 { 1545 {
2275 // by amy not supported 1546 // by amy not supported
2276// MgntActSet_802_11_SSID(Adapter, Adapter->MgntInfo.Ssid.Octet, Adapter->MgntInfo.Ssid.Length, TRUE );
2277 } 1547 }
2278 } 1548 }
2279 // Turn off RF. 1549 // Turn off RF.
@@ -2282,18 +1552,11 @@ MgntActSet_RF_State(
2282 HalDisableRx8185Dummy(dev); 1552 HalDisableRx8185Dummy(dev);
2283 } 1553 }
2284 } 1554 }
2285 else
2286 {
2287 // printk("MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource, priv->RfOffReason);
2288 }
2289 1555
2290 // Release RF spinlock 1556 // Release RF spinlock
2291// down(&priv->rf_state);
2292 spin_lock_irqsave(&priv->rf_ps_lock,flag); 1557 spin_lock_irqsave(&priv->rf_ps_lock,flag);
2293 priv->RFChangeInProgress = false; 1558 priv->RFChangeInProgress = false;
2294// up(&priv->rf_state);
2295 spin_unlock_irqrestore(&priv->rf_ps_lock,flag); 1559 spin_unlock_irqrestore(&priv->rf_ps_lock,flag);
2296// printk("<===MgntActSet_RF_State()\n");
2297 return bActionAllowed; 1560 return bActionAllowed;
2298} 1561}
2299void 1562void
@@ -2302,15 +1565,12 @@ InactivePowerSave(
2302 ) 1565 )
2303{ 1566{
2304 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1567 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2305 //u8 index = 0;
2306
2307 // 1568 //
2308 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem 1569 // This flag "bSwRfProcessing", indicates the status of IPS procedure, should be set if the IPS workitem
2309 // is really scheduled. 1570 // is really scheduled.
2310 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the 1571 // The old code, sets this flag before scheduling the IPS workitem and however, at the same time the
2311 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing 1572 // previous IPS workitem did not end yet, fails to schedule the current workitem. Thus, bSwRfProcessing
2312 // blocks the IPS procedure of switching RF. 1573 // blocks the IPS procedure of switching RF.
2313 // By Bruce, 2007-12-25.
2314 // 1574 //
2315 priv->bSwRfProcessing = true; 1575 priv->bSwRfProcessing = true;
2316 1576
@@ -2326,7 +1586,6 @@ InactivePowerSave(
2326// 1586//
2327// Description: 1587// Description:
2328// Enter the inactive power save mode. RF will be off 1588// Enter the inactive power save mode. RF will be off
2329// 2007.08.17, by shien chang.
2330// 1589//
2331void 1590void
2332IPSEnter( 1591IPSEnter(
@@ -2335,13 +1594,11 @@ IPSEnter(
2335{ 1594{
2336 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1595 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2337 RT_RF_POWER_STATE rtState; 1596 RT_RF_POWER_STATE rtState;
2338 //printk("==============================>enter IPS\n");
2339 if (priv->bInactivePs) 1597 if (priv->bInactivePs)
2340 { 1598 {
2341 rtState = priv->eRFPowerState; 1599 rtState = priv->eRFPowerState;
2342 1600
2343 // 1601 //
2344 // Added by Bruce, 2007-12-25.
2345 // Do not enter IPS in the following conditions: 1602 // Do not enter IPS in the following conditions:
2346 // (1) RF is already OFF or Sleep 1603 // (1) RF is already OFF or Sleep
2347 // (2) bSwRfProcessing (indicates the IPS is still under going) 1604 // (2) bSwRfProcessing (indicates the IPS is still under going)
@@ -2352,12 +1609,10 @@ IPSEnter(
2352 if (rtState == eRfOn && !priv->bSwRfProcessing 1609 if (rtState == eRfOn && !priv->bSwRfProcessing
2353 && (priv->ieee80211->state != IEEE80211_LINKED )) 1610 && (priv->ieee80211->state != IEEE80211_LINKED ))
2354 { 1611 {
2355 // printk("IPSEnter(): Turn off RF.\n");
2356 priv->eInactivePowerState = eRfOff; 1612 priv->eInactivePowerState = eRfOff;
2357 InactivePowerSave(dev); 1613 InactivePowerSave(dev);
2358 } 1614 }
2359 } 1615 }
2360// printk("priv->eRFPowerState is %d\n",priv->eRFPowerState);
2361} 1616}
2362void 1617void
2363IPSLeave( 1618IPSLeave(
@@ -2366,20 +1621,17 @@ IPSLeave(
2366{ 1621{
2367 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1622 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2368 RT_RF_POWER_STATE rtState; 1623 RT_RF_POWER_STATE rtState;
2369 //printk("===================================>leave IPS\n");
2370 if (priv->bInactivePs) 1624 if (priv->bInactivePs)
2371 { 1625 {
2372 rtState = priv->eRFPowerState; 1626 rtState = priv->eRFPowerState;
2373 if ((rtState == eRfOff || rtState == eRfSleep) && (!priv->bSwRfProcessing) && priv->RfOffReason <= RF_CHANGE_BY_IPS) 1627 if ((rtState == eRfOff || rtState == eRfSleep) && (!priv->bSwRfProcessing) && priv->RfOffReason <= RF_CHANGE_BY_IPS)
2374 { 1628 {
2375// printk("IPSLeave(): Turn on RF.\n");
2376 priv->eInactivePowerState = eRfOn; 1629 priv->eInactivePowerState = eRfOn;
2377 InactivePowerSave(dev); 1630 InactivePowerSave(dev);
2378 } 1631 }
2379 } 1632 }
2380// printk("priv->eRFPowerState is %d\n",priv->eRFPowerState);
2381} 1633}
2382//by amy for power save 1634
2383void rtl8185b_adapter_start(struct net_device *dev) 1635void rtl8185b_adapter_start(struct net_device *dev)
2384{ 1636{
2385 struct r8180_priv *priv = ieee80211_priv(dev); 1637 struct r8180_priv *priv = ieee80211_priv(dev);
@@ -2388,75 +1640,45 @@ void rtl8185b_adapter_start(struct net_device *dev)
2388 u8 SupportedWirelessMode; 1640 u8 SupportedWirelessMode;
2389 u8 InitWirelessMode; 1641 u8 InitWirelessMode;
2390 u8 bInvalidWirelessMode = 0; 1642 u8 bInvalidWirelessMode = 0;
2391 //int i;
2392 u8 tmpu8; 1643 u8 tmpu8;
2393 //u8 u1tmp,u2tmp;
2394 u8 btCR9346; 1644 u8 btCR9346;
2395 u8 TmpU1b; 1645 u8 TmpU1b;
2396 u8 btPSR; 1646 u8 btPSR;
2397 1647
2398 //rtl8180_rtx_disable(dev);
2399//{by amy 080312
2400 write_nic_byte(dev,0x24e, (BIT5|BIT6|BIT0)); 1648 write_nic_byte(dev,0x24e, (BIT5|BIT6|BIT0));
2401//by amy 080312}
2402 rtl8180_reset(dev); 1649 rtl8180_reset(dev);
2403 1650
2404 priv->dma_poll_mask = 0; 1651 priv->dma_poll_mask = 0;
2405 priv->dma_poll_stop_mask = 0; 1652 priv->dma_poll_stop_mask = 0;
2406 1653
2407 //rtl8180_beacon_tx_disable(dev);
2408
2409 HwConfigureRTL8185(dev); 1654 HwConfigureRTL8185(dev);
2410
2411 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]); 1655 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
2412 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff ); 1656 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
2413
2414 write_nic_byte(dev, MSR, read_nic_byte(dev, MSR) & 0xf3); // default network type to 'No Link' 1657 write_nic_byte(dev, MSR, read_nic_byte(dev, MSR) & 0xf3); // default network type to 'No Link'
2415
2416 //write_nic_byte(dev, BRSR, 0x0); // Set BRSR= 1M
2417
2418 write_nic_word(dev, BcnItv, 100); 1658 write_nic_word(dev, BcnItv, 100);
2419 write_nic_word(dev, AtimWnd, 2); 1659 write_nic_word(dev, AtimWnd, 2);
2420
2421 //PlatformEFIOWrite2Byte(dev, FEMR, 0xFFFF);
2422 PlatformIOWrite2Byte(dev, FEMR, 0xFFFF); 1660 PlatformIOWrite2Byte(dev, FEMR, 0xFFFF);
2423
2424 write_nic_byte(dev, WPA_CONFIG, 0); 1661 write_nic_byte(dev, WPA_CONFIG, 0);
2425
2426 MacConfig_85BASIC(dev); 1662 MacConfig_85BASIC(dev);
2427
2428 // Override the RFSW_CTRL (MAC offset 0x272-0x273), 2006.06.07, by rcnjko. 1663 // Override the RFSW_CTRL (MAC offset 0x272-0x273), 2006.06.07, by rcnjko.
2429 // BT_DEMO_BOARD type 1664 // BT_DEMO_BOARD type
2430 PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x569a); 1665 PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x569a);
2431//by amy
2432//#ifdef CONFIG_RTL818X_S
2433 // for jong required
2434// PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x9a56);
2435//#endif
2436//by amy
2437 //BT_QA_BOARD
2438 //PlatformIOWrite2Byte(dev, RFSW_CTRL, 0x9a56);
2439 1666
2440 //----------------------------------------------------------------------------- 1667 //-----------------------------------------------------------------------------
2441 // Set up PHY related. 1668 // Set up PHY related.
2442 //----------------------------------------------------------------------------- 1669 //-----------------------------------------------------------------------------
2443 // Enable Config3.PARAM_En to revise AnaaParm. 1670 // Enable Config3.PARAM_En to revise AnaaParm.
2444 write_nic_byte(dev, CR9346, 0xc0); // enable config register write 1671 write_nic_byte(dev, CR9346, 0xc0); // enable config register write
2445//by amy
2446 tmpu8 = read_nic_byte(dev, CONFIG3); 1672 tmpu8 = read_nic_byte(dev, CONFIG3);
2447 write_nic_byte(dev, CONFIG3, (tmpu8 |CONFIG3_PARM_En) ); 1673 write_nic_byte(dev, CONFIG3, (tmpu8 |CONFIG3_PARM_En) );
2448//by amy
2449 // Turn on Analog power. 1674 // Turn on Analog power.
2450 // Asked for by William, otherwise, MAC 3-wire can't work, 2006.06.27, by rcnjko. 1675 // Asked for by William, otherwise, MAC 3-wire can't work, 2006.06.27, by rcnjko.
2451 write_nic_dword(dev, ANAPARAM2, ANAPARM2_ASIC_ON); 1676 write_nic_dword(dev, ANAPARAM2, ANAPARM2_ASIC_ON);
2452 write_nic_dword(dev, ANAPARAM, ANAPARM_ASIC_ON); 1677 write_nic_dword(dev, ANAPARAM, ANAPARM_ASIC_ON);
2453//by amy
2454 write_nic_word(dev, ANAPARAM3, 0x0010); 1678 write_nic_word(dev, ANAPARAM3, 0x0010);
2455//by amy
2456 1679
2457 write_nic_byte(dev, CONFIG3, tmpu8); 1680 write_nic_byte(dev, CONFIG3, tmpu8);
2458 write_nic_byte(dev, CR9346, 0x00); 1681 write_nic_byte(dev, CR9346, 0x00);
2459//{by amy 080312 for led
2460 // enable EEM0 and EEM1 in 9346CR 1682 // enable EEM0 and EEM1 in 9346CR
2461 btCR9346 = read_nic_byte(dev, CR9346); 1683 btCR9346 = read_nic_byte(dev, CR9346);
2462 write_nic_byte(dev, CR9346, (btCR9346|0xC0) ); 1684 write_nic_byte(dev, CR9346, (btCR9346|0xC0) );
@@ -2474,7 +1696,6 @@ void rtl8185b_adapter_start(struct net_device *dev)
2474 // B-cut RF Radio on/off 5e[3]=0 1696 // B-cut RF Radio on/off 5e[3]=0
2475 btPSR = read_nic_byte(dev, PSR); 1697 btPSR = read_nic_byte(dev, PSR);
2476 write_nic_byte(dev, PSR, (btPSR | BIT3)); 1698 write_nic_byte(dev, PSR, (btPSR | BIT3));
2477//by amy 080312 for led}
2478 // setup initial timing for RFE. 1699 // setup initial timing for RFE.
2479 write_nic_word(dev, RFPinsOutput, 0x0480); 1700 write_nic_word(dev, RFPinsOutput, 0x0480);
2480 SetOutputEnableOfRfPins(dev); 1701 SetOutputEnableOfRfPins(dev);
@@ -2537,55 +1758,19 @@ void rtl8185b_adapter_start(struct net_device *dev)
2537 InitWirelessMode = ieee->mode; 1758 InitWirelessMode = ieee->mode;
2538 } 1759 }
2539//by amy for power save 1760//by amy for power save
2540// printk("initialize ENABLE_IPS\n");
2541 priv->eRFPowerState = eRfOff; 1761 priv->eRFPowerState = eRfOff;
2542 priv->RfOffReason = 0; 1762 priv->RfOffReason = 0;
2543 { 1763 {
2544 // u32 tmp2;
2545 // u32 tmp = jiffies;
2546 MgntActSet_RF_State(dev, eRfOn, 0); 1764 MgntActSet_RF_State(dev, eRfOn, 0);
2547 // tmp2 = jiffies;
2548 // printk("rf on cost jiffies:%lx\n", (tmp2-tmp)*1000/HZ);
2549 } 1765 }
2550// DrvIFIndicateCurrentPhyStatus(priv);
2551 // 1766 //
2552 // If inactive power mode is enabled, disable rf while in disconnected state. 1767 // If inactive power mode is enabled, disable rf while in disconnected state.
2553 // 2007.07.16, by shien chang.
2554 // 1768 //
2555 if (priv->bInactivePs) 1769 if (priv->bInactivePs)
2556 { 1770 {
2557 // u32 tmp2;
2558 // u32 tmp = jiffies;
2559 MgntActSet_RF_State(dev,eRfOff, RF_CHANGE_BY_IPS); 1771 MgntActSet_RF_State(dev,eRfOff, RF_CHANGE_BY_IPS);
2560 // tmp2 = jiffies;
2561 // printk("rf off cost jiffies:%lx\n", (tmp2-tmp)*1000/HZ);
2562
2563 } 1772 }
2564// IPSEnter(dev);
2565//by amy for power save 1773//by amy for power save
2566#ifdef TODO
2567 // Turn off RF if necessary. 2005.08.23, by rcnjko.
2568 // We shall turn off RF after setting CMDR, otherwise,
2569 // RF will be turnned on after we enable MAC Tx/Rx.
2570 if(Adapter->MgntInfo.RegRfOff == TRUE)
2571 {
2572 SetRFPowerState8185(Adapter, RF_OFF);
2573 }
2574 else
2575 {
2576 SetRFPowerState8185(Adapter, RF_ON);
2577 }
2578#endif
2579
2580/* //these is equal with above TODO.
2581 write_nic_byte(dev, CR9346, 0xc0); // enable config register write
2582 write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3) | CONFIG3_PARM_En);
2583 RF_WriteReg(dev, 0x4, 0x9FF);
2584 write_nic_dword(dev, ANAPARAM2, ANAPARM2_ASIC_ON);
2585 write_nic_dword(dev, ANAPARAM, ANAPARM_ASIC_ON);
2586 write_nic_byte(dev, CONFIG3, (read_nic_byte(dev, CONFIG3)&(~CONFIG3_PARM_En)));
2587 write_nic_byte(dev, CR9346, 0x00);
2588*/
2589 1774
2590 ActSetWirelessMode8185(dev, (u8)(InitWirelessMode)); 1775 ActSetWirelessMode8185(dev, (u8)(InitWirelessMode));
2591 1776
@@ -2594,14 +1779,11 @@ void rtl8185b_adapter_start(struct net_device *dev)
2594 rtl8185b_irq_enable(dev); 1779 rtl8185b_irq_enable(dev);
2595 1780
2596 netif_start_queue(dev); 1781 netif_start_queue(dev);
2597
2598 } 1782 }
2599 1783
2600
2601void rtl8185b_rx_enable(struct net_device *dev) 1784void rtl8185b_rx_enable(struct net_device *dev)
2602{ 1785{
2603 u8 cmd; 1786 u8 cmd;
2604 //u32 rxconf;
2605 /* for now we accept data, management & ctl frame*/ 1787 /* for now we accept data, management & ctl frame*/
2606 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1788 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2607 1789
@@ -2613,11 +1795,6 @@ void rtl8185b_rx_enable(struct net_device *dev)
2613 priv->ReceiveConfig = priv->ReceiveConfig | RCR_AAP; 1795 priv->ReceiveConfig = priv->ReceiveConfig | RCR_AAP;
2614 } 1796 }
2615 1797
2616 /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
2617 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
2618 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
2619 }*/
2620
2621 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){ 1798 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2622 priv->ReceiveConfig = priv->ReceiveConfig | RCR_ACF | RCR_APWRMGT | RCR_AICV; 1799 priv->ReceiveConfig = priv->ReceiveConfig | RCR_ACF | RCR_APWRMGT | RCR_AICV;
2623 } 1800 }
@@ -2629,9 +1806,6 @@ void rtl8185b_rx_enable(struct net_device *dev)
2629 1806
2630 fix_rx_fifo(dev); 1807 fix_rx_fifo(dev);
2631 1808
2632#ifdef DEBUG_RX
2633 DMESG("rxconf: %x %x",priv->ReceiveConfig ,read_nic_dword(dev,RCR));
2634#endif
2635 cmd=read_nic_byte(dev,CMD); 1809 cmd=read_nic_byte(dev,CMD);
2636 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT)); 1810 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
2637 1811
@@ -2640,9 +1814,7 @@ void rtl8185b_rx_enable(struct net_device *dev)
2640void rtl8185b_tx_enable(struct net_device *dev) 1814void rtl8185b_tx_enable(struct net_device *dev)
2641{ 1815{
2642 u8 cmd; 1816 u8 cmd;
2643 //u8 tx_agc_ctl;
2644 u8 byte; 1817 u8 byte;
2645 //u32 txconf;
2646 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1818 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2647 1819
2648 write_nic_dword(dev, TCR, priv->TransmitConfig); 1820 write_nic_dword(dev, TCR, priv->TransmitConfig);
@@ -2652,21 +1824,7 @@ void rtl8185b_tx_enable(struct net_device *dev)
2652 1824
2653 fix_tx_fifo(dev); 1825 fix_tx_fifo(dev);
2654 1826
2655#ifdef DEBUG_TX
2656 DMESG("txconf: %x %x",priv->TransmitConfig,read_nic_dword(dev,TCR));
2657#endif
2658
2659 cmd=read_nic_byte(dev,CMD); 1827 cmd=read_nic_byte(dev,CMD);
2660 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT)); 1828 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
2661
2662 //write_nic_dword(dev,TX_CONF,txconf);
2663
2664
2665/*
2666 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2667 write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
2668 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2669 */
2670} 1829}
2671 1830
2672
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 21:32:36 -0400