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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2009-06-28 10:19:17 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-09-15 15:01:29 -0400
commit6a9a9e42b6b62551804c8c496704f5c851871fde (patch)
tree37b782afe45195e62ed8ddeae72fade1b0138713 /drivers/staging/rtl8187se
parentf19fd3357768b5964167d5ad9139b4f619007dc7 (diff)
Staging: rtl8187se: remove CONFIG_RTL8180_IO_MAP ifdefs
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/rtl8187se')
-rw-r--r--drivers/staging/rtl8187se/Makefile1
-rw-r--r--drivers/staging/rtl8187se/r8180_core.c83
-rw-r--r--drivers/staging/rtl8187se/r8185b_init.c168
3 files changed, 0 insertions, 252 deletions
diff --git a/drivers/staging/rtl8187se/Makefile b/drivers/staging/rtl8187se/Makefile
index df7227621b2..0ad7842ed81 100644
--- a/drivers/staging/rtl8187se/Makefile
+++ b/drivers/staging/rtl8187se/Makefile
@@ -1,6 +1,5 @@
1 1
2#EXTRA_CFLAGS += -DCONFIG_IEEE80211_NOWEP=y 2#EXTRA_CFLAGS += -DCONFIG_IEEE80211_NOWEP=y
3#EXTRA_CFLAGS += -DCONFIG_RTL8180_IOMAP
4#EXTRA_CFLAGS += -std=gnu89 3#EXTRA_CFLAGS += -std=gnu89
5#EXTRA_CFLAGS += -O2 4#EXTRA_CFLAGS += -O2
6#CC = gcc 5#CC = gcc
diff --git a/drivers/staging/rtl8187se/r8180_core.c b/drivers/staging/rtl8187se/r8180_core.c
index f5cbd32648a..9cf82875d95 100644
--- a/drivers/staging/rtl8187se/r8180_core.c
+++ b/drivers/staging/rtl8187se/r8180_core.c
@@ -59,7 +59,6 @@ double __extendsfdf2(float a) {return a;}
59//#define DEBUG_RX 59//#define DEBUG_RX
60//#define DEBUG_RX_SKB 60//#define DEBUG_RX_SKB
61 61
62//#define CONFIG_RTL8180_IO_MAP
63#include <linux/syscalls.h> 62#include <linux/syscalls.h>
64//#include <linux/fcntl.h> 63//#include <linux/fcntl.h>
65//#include <asm/uaccess.h> 64//#include <asm/uaccess.h>
@@ -78,8 +77,6 @@ double __extendsfdf2(float a) {return a;}
78 77
79#include "ieee80211/dot11d.h" 78#include "ieee80211/dot11d.h"
80 79
81//#define CONFIG_RTL8180_IO_MAP
82
83#ifndef PCI_VENDOR_ID_BELKIN 80#ifndef PCI_VENDOR_ID_BELKIN
84 #define PCI_VENDOR_ID_BELKIN 0x1799 81 #define PCI_VENDOR_ID_BELKIN 0x1799
85#endif 82#endif
@@ -202,39 +199,6 @@ static struct pci_driver rtl8180_pci_driver = {
202 199
203 200
204 201
205#ifdef CONFIG_RTL8180_IO_MAP
206
207u8 read_nic_byte(struct net_device *dev, int x)
208{
209 return 0xff&inb(dev->base_addr +x);
210}
211
212u32 read_nic_dword(struct net_device *dev, int x)
213{
214 return inl(dev->base_addr +x);
215}
216
217u16 read_nic_word(struct net_device *dev, int x)
218{
219 return inw(dev->base_addr +x);
220}
221
222void write_nic_byte(struct net_device *dev, int x,u8 y)
223{
224 outb(y&0xff,dev->base_addr +x);
225}
226
227void write_nic_word(struct net_device *dev, int x,u16 y)
228{
229 outw(y,dev->base_addr +x);
230}
231
232void write_nic_dword(struct net_device *dev, int x,u32 y)
233{
234 outl(y,dev->base_addr +x);
235}
236
237#else /* RTL_IO_MAP */
238 202
239u8 read_nic_byte(struct net_device *dev, int x) 203u8 read_nic_byte(struct net_device *dev, int x)
240{ 204{
@@ -269,7 +233,6 @@ void write_nic_word(struct net_device *dev, int x,u16 y)
269 udelay(20); 233 udelay(20);
270} 234}
271 235
272#endif /* RTL_IO_MAP */
273 236
274 237
275 238
@@ -278,9 +241,7 @@ void write_nic_word(struct net_device *dev, int x,u16 y)
278inline void force_pci_posting(struct net_device *dev) 241inline void force_pci_posting(struct net_device *dev)
279{ 242{
280 read_nic_byte(dev,EPROM_CMD); 243 read_nic_byte(dev,EPROM_CMD);
281#ifndef CONFIG_RTL8180_IO_MAP
282 mb(); 244 mb();
283#endif
284} 245}
285 246
286 247
@@ -5411,11 +5372,7 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5411 //u8 *ptr; 5372 //u8 *ptr;
5412 u8 unit = 0; 5373 u8 unit = 0;
5413 5374
5414#ifdef CONFIG_RTL8180_IO_MAP
5415 unsigned long pio_start, pio_len, pio_flags;
5416#else
5417 unsigned long pmem_start, pmem_len, pmem_flags; 5375 unsigned long pmem_start, pmem_len, pmem_flags;
5418#endif //end #ifdef RTL_IO_MAP
5419 5376
5420 DMESG("Configuring chip resources"); 5377 DMESG("Configuring chip resources");
5421 5378
@@ -5442,27 +5399,6 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5442 priv->pdev=pdev; 5399 priv->pdev=pdev;
5443 5400
5444 5401
5445#ifdef CONFIG_RTL8180_IO_MAP
5446
5447 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5448 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5449 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5450
5451 if (!(pio_flags & IORESOURCE_IO)) {
5452 DMESG("region #0 not a PIO resource, aborting");
5453 goto fail;
5454 }
5455
5456 //DMESG("IO space @ 0x%08lx", pio_start );
5457 if( ! request_region( pio_start, pio_len, RTL8180_MODULE_NAME ) ){
5458 DMESG("request_region failed!");
5459 goto fail;
5460 }
5461
5462 ioaddr = pio_start;
5463 dev->base_addr = ioaddr; // device I/O address
5464
5465#else
5466 5402
5467 pmem_start = pci_resource_start(pdev, 1); 5403 pmem_start = pci_resource_start(pdev, 1);
5468 pmem_len = pci_resource_len(pdev, 1); 5404 pmem_len = pci_resource_len(pdev, 1);
@@ -5490,7 +5426,6 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5490 dev->mem_start = ioaddr; // shared mem start 5426 dev->mem_start = ioaddr; // shared mem start
5491 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end 5427 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5492 5428
5493#endif //end #ifdef RTL_IO_MAP
5494 5429
5495 //pci_read_config_byte(pdev, 0x05, ptr); 5430 //pci_read_config_byte(pdev, 0x05, ptr);
5496 //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04)); 5431 //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
@@ -5530,20 +5465,11 @@ static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5530 5465
5531fail1: 5466fail1:
5532 5467
5533#ifdef CONFIG_RTL8180_IO_MAP
5534
5535 if( dev->base_addr != 0 ){
5536
5537 release_region(dev->base_addr,
5538 pci_resource_len(pdev, 0) );
5539 }
5540#else
5541 if( dev->mem_start != (unsigned long)NULL ){ 5468 if( dev->mem_start != (unsigned long)NULL ){
5542 iounmap( (void *)dev->mem_start ); 5469 iounmap( (void *)dev->mem_start );
5543 release_mem_region( pci_resource_start(pdev, 1), 5470 release_mem_region( pci_resource_start(pdev, 1),
5544 pci_resource_len(pdev, 1) ); 5471 pci_resource_len(pdev, 1) );
5545 } 5472 }
5546#endif //end #ifdef RTL_IO_MAP
5547 5473
5548 5474
5549fail: 5475fail:
@@ -5598,20 +5524,11 @@ static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
5598 free_tx_desc_rings(dev); 5524 free_tx_desc_rings(dev);
5599 // free_beacon_desc_ring(dev,priv->txbeaconcount); 5525 // free_beacon_desc_ring(dev,priv->txbeaconcount);
5600 5526
5601#ifdef CONFIG_RTL8180_IO_MAP
5602
5603 if( dev->base_addr != 0 ){
5604
5605 release_region(dev->base_addr,
5606 pci_resource_len(pdev, 0) );
5607 }
5608#else
5609 if( dev->mem_start != (unsigned long)NULL ){ 5527 if( dev->mem_start != (unsigned long)NULL ){
5610 iounmap( (void *)dev->mem_start ); 5528 iounmap( (void *)dev->mem_start );
5611 release_mem_region( pci_resource_start(pdev, 1), 5529 release_mem_region( pci_resource_start(pdev, 1),
5612 pci_resource_len(pdev, 1) ); 5530 pci_resource_len(pdev, 1) );
5613 } 5531 }
5614#endif /*end #ifdef RTL_IO_MAP*/
5615 5532
5616 free_ieee80211(dev); 5533 free_ieee80211(dev);
5617 } 5534 }
diff --git a/drivers/staging/rtl8187se/r8185b_init.c b/drivers/staging/rtl8187se/r8185b_init.c
index c3fac5d3f93..88cfb26f446 100644
--- a/drivers/staging/rtl8187se/r8185b_init.c
+++ b/drivers/staging/rtl8187se/r8185b_init.c
@@ -131,37 +131,9 @@ PlatformIOWrite1Byte(
131 u8 data 131 u8 data
132 ) 132 )
133{ 133{
134#ifndef CONFIG_RTL8180_IO_MAP
135 write_nic_byte(dev, offset, data); 134 write_nic_byte(dev, offset, data);
136 read_nic_byte(dev, offset); // To make sure write operation is completed, 2005.11.09, by rcnjko. 135 read_nic_byte(dev, offset); // To make sure write operation is completed, 2005.11.09, by rcnjko.
137 136
138#else // Port IO
139 u32 Page = (offset >> 8);
140
141 switch(Page)
142 {
143 case 0: // Page 0
144 write_nic_byte(dev, offset, data);
145 break;
146
147 case 1: // Page 1
148 case 2: // Page 2
149 case 3: // Page 3
150 {
151 u8 psr = read_nic_byte(dev, PSR);
152
153 write_nic_byte(dev, PSR, ((psr & 0xfc) | (u8)Page)); // Switch to page N.
154 write_nic_byte(dev, (offset & 0xff), data);
155 write_nic_byte(dev, PSR, (psr & 0xfc)); // Switch to page 0.
156 }
157 break;
158
159 default:
160 // Illegal page number.
161 DMESGE("PlatformIOWrite1Byte(): illegal page number: %d, offset: %#X", Page, offset);
162 break;
163 }
164#endif
165} 137}
166 138
167void 139void
@@ -171,38 +143,10 @@ PlatformIOWrite2Byte(
171 u16 data 143 u16 data
172 ) 144 )
173{ 145{
174#ifndef CONFIG_RTL8180_IO_MAP
175 write_nic_word(dev, offset, data); 146 write_nic_word(dev, offset, data);
176 read_nic_word(dev, offset); // To make sure write operation is completed, 2005.11.09, by rcnjko. 147 read_nic_word(dev, offset); // To make sure write operation is completed, 2005.11.09, by rcnjko.
177 148
178 149
179#else // Port IO
180 u32 Page = (offset >> 8);
181
182 switch(Page)
183 {
184 case 0: // Page 0
185 write_nic_word(dev, offset, data);
186 break;
187
188 case 1: // Page 1
189 case 2: // Page 2
190 case 3: // Page 3
191 {
192 u8 psr = read_nic_byte(dev, PSR);
193
194 write_nic_byte(dev, PSR, ((psr & 0xfc) | (u8)Page)); // Switch to page N.
195 write_nic_word(dev, (offset & 0xff), data);
196 write_nic_byte(dev, PSR, (psr & 0xfc)); // Switch to page 0.
197 }
198 break;
199
200 default:
201 // Illegal page number.
202 DMESGE("PlatformIOWrite2Byte(): illegal page number: %d, offset: %#X", Page, offset);
203 break;
204 }
205#endif
206} 150}
207u8 PlatformIORead1Byte(struct net_device *dev, u32 offset); 151u8 PlatformIORead1Byte(struct net_device *dev, u32 offset);
208 152
@@ -213,7 +157,6 @@ PlatformIOWrite4Byte(
213 u32 data 157 u32 data
214 ) 158 )
215{ 159{
216#ifndef CONFIG_RTL8180_IO_MAP
217//{by amy 080312 160//{by amy 080312
218if (offset == PhyAddr) 161if (offset == PhyAddr)
219 {//For Base Band configuration. 162 {//For Base Band configuration.
@@ -257,33 +200,6 @@ if (offset == PhyAddr)
257 write_nic_dword(dev, offset, data); 200 write_nic_dword(dev, offset, data);
258 read_nic_dword(dev, offset); // To make sure write operation is completed, 2005.11.09, by rcnjko. 201 read_nic_dword(dev, offset); // To make sure write operation is completed, 2005.11.09, by rcnjko.
259 } 202 }
260#else // Port IO
261 u32 Page = (offset >> 8);
262
263 switch(Page)
264 {
265 case 0: // Page 0
266 write_nic_word(dev, offset, data);
267 break;
268
269 case 1: // Page 1
270 case 2: // Page 2
271 case 3: // Page 3
272 {
273 u8 psr = read_nic_byte(dev, PSR);
274
275 write_nic_byte(dev, PSR, ((psr & 0xfc) | (u8)Page)); // Switch to page N.
276 write_nic_dword(dev, (offset & 0xff), data);
277 write_nic_byte(dev, PSR, (psr & 0xfc)); // Switch to page 0.
278 }
279 break;
280
281 default:
282 // Illegal page number.
283 DMESGE("PlatformIOWrite4Byte(): illegal page number: %d, offset: %#X", Page, offset);
284 break;
285 }
286#endif
287} 203}
288 204
289u8 205u8
@@ -294,36 +210,8 @@ PlatformIORead1Byte(
294{ 210{
295 u8 data = 0; 211 u8 data = 0;
296 212
297#ifndef CONFIG_RTL8180_IO_MAP
298 data = read_nic_byte(dev, offset); 213 data = read_nic_byte(dev, offset);
299 214
300#else // Port IO
301 u32 Page = (offset >> 8);
302
303 switch(Page)
304 {
305 case 0: // Page 0
306 data = read_nic_byte(dev, offset);
307 break;
308
309 case 1: // Page 1
310 case 2: // Page 2
311 case 3: // Page 3
312 {
313 u8 psr = read_nic_byte(dev, PSR);
314
315 write_nic_byte(dev, PSR, ((psr & 0xfc) | (u8)Page)); // Switch to page N.
316 data = read_nic_byte(dev, (offset & 0xff));
317 write_nic_byte(dev, PSR, (psr & 0xfc)); // Switch to page 0.
318 }
319 break;
320
321 default:
322 // Illegal page number.
323 DMESGE("PlatformIORead1Byte(): illegal page number: %d, offset: %#X", Page, offset);
324 break;
325 }
326#endif
327 215
328 return data; 216 return data;
329} 217}
@@ -336,36 +224,8 @@ PlatformIORead2Byte(
336{ 224{
337 u16 data = 0; 225 u16 data = 0;
338 226
339#ifndef CONFIG_RTL8180_IO_MAP
340 data = read_nic_word(dev, offset); 227 data = read_nic_word(dev, offset);
341 228
342#else // Port IO
343 u32 Page = (offset >> 8);
344
345 switch(Page)
346 {
347 case 0: // Page 0
348 data = read_nic_word(dev, offset);
349 break;
350
351 case 1: // Page 1
352 case 2: // Page 2
353 case 3: // Page 3
354 {
355 u8 psr = read_nic_byte(dev, PSR);
356
357 write_nic_byte(dev, PSR, ((psr & 0xfc) | (u8)Page)); // Switch to page N.
358 data = read_nic_word(dev, (offset & 0xff));
359 write_nic_byte(dev, PSR, (psr & 0xfc)); // Switch to page 0.
360 }
361 break;
362
363 default:
364 // Illegal page number.
365 DMESGE("PlatformIORead2Byte(): illegal page number: %d, offset: %#X", Page, offset);
366 break;
367 }
368#endif
369 229
370 return data; 230 return data;
371} 231}
@@ -378,36 +238,8 @@ PlatformIORead4Byte(
378{ 238{
379 u32 data = 0; 239 u32 data = 0;
380 240
381#ifndef CONFIG_RTL8180_IO_MAP
382 data = read_nic_dword(dev, offset); 241 data = read_nic_dword(dev, offset);
383 242
384#else // Port IO
385 u32 Page = (offset >> 8);
386
387 switch(Page)
388 {
389 case 0: // Page 0
390 data = read_nic_dword(dev, offset);
391 break;
392
393 case 1: // Page 1
394 case 2: // Page 2
395 case 3: // Page 3
396 {
397 u8 psr = read_nic_byte(dev, PSR);
398
399 write_nic_byte(dev, PSR, ((psr & 0xfc) | (u8)Page)); // Switch to page N.
400 data = read_nic_dword(dev, (offset & 0xff));
401 write_nic_byte(dev, PSR, (psr & 0xfc)); // Switch to page 0.
402 }
403 break;
404
405 default:
406 // Illegal page number.
407 DMESGE("PlatformIORead4Byte(): illegal page number: %d, offset: %#X\n", Page, offset);
408 break;
409 }
410#endif
411 243
412 return data; 244 return data;
413} 245}