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authorAndre Haupt <andre@bitwigglers.org>2009-01-26 10:12:23 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2009-04-03 17:53:24 -0400
commit370eb29dc441fb67a0175cc04134d13202b09c7d (patch)
tree4aa5af1cc956a1b8af2961898290315befa359ef /drivers/staging/me4000
parentb8341a8d32f3dc08ac6da569b6d152a1db7a0109 (diff)
Staging: me4000: do not use C99 style comments.
Signed-off-by: Andre Haupt <andre@bitwigglers.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/me4000')
-rw-r--r--drivers/staging/me4000/me4000.c81
1 files changed, 49 insertions, 32 deletions
diff --git a/drivers/staging/me4000/me4000.c b/drivers/staging/me4000/me4000.c
index 7f7c88e014a..be8ffefb9c3 100644
--- a/drivers/staging/me4000/me4000.c
+++ b/drivers/staging/me4000/me4000.c
@@ -402,17 +402,25 @@ static struct file_operations me4000_ext_int_fops = {
402}; 402};
403 403
404static struct file_operations *me4000_ao_fops_array[] = { 404static struct file_operations *me4000_ao_fops_array[] = {
405 &me4000_ao_fops_sing, // single operations 405 /* single operations */
406 &me4000_ao_fops_wrap, // wraparound operations 406 &me4000_ao_fops_sing,
407 &me4000_ao_fops_cont, // continous operations 407 /* wraparound operations */
408 &me4000_ao_fops_wrap,
409 /* continuous operations */
410 &me4000_ao_fops_cont,
408}; 411};
409 412
410static struct file_operations *me4000_ai_fops_array[] = { 413static struct file_operations *me4000_ai_fops_array[] = {
411 &me4000_ai_fops_sing, // single operations 414 /* single operations */
412 &me4000_ai_fops_cont_sw, // continuous operations with software start 415 &me4000_ai_fops_sing,
413 &me4000_ai_fops_cont_et, // continous operations with external trigger 416 /* continuous operations with software start */
414 &me4000_ai_fops_cont_et_value, // sample values by external trigger 417 &me4000_ai_fops_cont_sw,
415 &me4000_ai_fops_cont_et_chanlist, // work through one channel list by external trigger 418 /* continuous operations with external trigger */
419 &me4000_ai_fops_cont_et,
420 /* sample values by external trigger */
421 &me4000_ai_fops_cont_et_value,
422 /* work through one channel list by external trigger */
423 &me4000_ai_fops_cont_et_chanlist,
416}; 424};
417 425
418static int __init me4000_init_module(void) 426static int __init me4000_init_module(void)
@@ -1460,7 +1468,7 @@ static int me4000_open(struct inode *inode_p, struct file *file_p)
1460 /* Set file operations pointer to single functions */ 1468 /* Set file operations pointer to single functions */
1461 file_p->f_op = &me4000_dio_fops; 1469 file_p->f_op = &me4000_dio_fops;
1462 1470
1463 //me4000_dio_reset(dio_context); 1471 /* me4000_dio_reset(dio_context); */
1464 } 1472 }
1465 /* Counters */ 1473 /* Counters */
1466 else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) { 1474 else if (MAJOR(inode_p->i_rdev) == me4000_cnt_major_driver_no) {
@@ -2400,8 +2408,8 @@ static int me4000_ao_stop(struct me4000_ao_context *ao_context)
2400 } 2408 }
2401 2409
2402 /* Clear the stop bit */ 2410 /* Clear the stop bit */
2403 //tmp &= ~ME4000_AO_CTRL_BIT_STOP; 2411 /* tmp &= ~ME4000_AO_CTRL_BIT_STOP; */
2404 //me4000_outl(tmp, ao_context->ctrl_reg); 2412 /* me4000_outl(tmp, ao_context->ctrl_reg); */
2405 2413
2406 return 0; 2414 return 0;
2407} 2415}
@@ -2432,8 +2440,8 @@ static int me4000_ao_immediate_stop(struct me4000_ao_context *ao_context)
2432 } 2440 }
2433 2441
2434 /* Clear the stop bits */ 2442 /* Clear the stop bits */
2435 //tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP); 2443 /* tmp &= ~(ME4000_AO_CTRL_BIT_STOP | ME4000_AO_CTRL_BIT_IMMEDIATE_STOP); */
2436 //me4000_outl(tmp, ao_context->ctrl_reg); 2444 /* me4000_outl(tmp, ao_context->ctrl_reg); */
2437 2445
2438 return 0; 2446 return 0;
2439} 2447}
@@ -2596,8 +2604,10 @@ static int me4000_ao_simultaneous_disable(struct me4000_ao_context *ao_context)
2596 2604
2597 spin_lock(&ao_context->board_info->preload_lock); 2605 spin_lock(&ao_context->board_info->preload_lock);
2598 tmp = me4000_inl(ao_context->preload_reg); 2606 tmp = me4000_inl(ao_context->preload_reg);
2599 tmp &= ~(0x1 << ao_context->index); // Disable preload bit 2607 /* Disable preload bit */
2600 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable hw simultaneous bit 2608 tmp &= ~(0x1 << ao_context->index);
2609 /* Disable hw simultaneous bit */
2610 tmp &= ~(0x1 << (ao_context->index + 16));
2601 me4000_outl(tmp, ao_context->preload_reg); 2611 me4000_outl(tmp, ao_context->preload_reg);
2602 spin_unlock(&ao_context->board_info->preload_lock); 2612 spin_unlock(&ao_context->board_info->preload_lock);
2603 2613
@@ -2612,8 +2622,10 @@ static int me4000_ao_simultaneous_ex_trig(struct me4000_ao_context *ao_context)
2612 2622
2613 spin_lock(&ao_context->board_info->preload_lock); 2623 spin_lock(&ao_context->board_info->preload_lock);
2614 tmp = me4000_inl(ao_context->preload_reg); 2624 tmp = me4000_inl(ao_context->preload_reg);
2615 tmp |= (0x1 << ao_context->index); // Enable preload bit 2625 /* Enable preload bit */
2616 tmp |= (0x1 << (ao_context->index + 16)); // Enable hw simultaneous bit 2626 tmp |= (0x1 << ao_context->index);
2627 /* Enable hw simulatenous bit */
2628 tmp |= (0x1 << (ao_context->index + 16));
2617 me4000_outl(tmp, ao_context->preload_reg); 2629 me4000_outl(tmp, ao_context->preload_reg);
2618 spin_unlock(&ao_context->board_info->preload_lock); 2630 spin_unlock(&ao_context->board_info->preload_lock);
2619 2631
@@ -2628,8 +2640,10 @@ static int me4000_ao_simultaneous_sw(struct me4000_ao_context *ao_context)
2628 2640
2629 spin_lock(&ao_context->board_info->preload_lock); 2641 spin_lock(&ao_context->board_info->preload_lock);
2630 tmp = me4000_inl(ao_context->preload_reg); 2642 tmp = me4000_inl(ao_context->preload_reg);
2631 tmp |= (0x1 << ao_context->index); // Enable preload bit 2643 /* Enable preload bit */
2632 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable hw simultaneous bit 2644 tmp |= (0x1 << ao_context->index);
2645 /* Enable hw simulatenous bit */
2646 tmp &= ~(0x1 << (ao_context->index + 16));
2633 me4000_outl(tmp, ao_context->preload_reg); 2647 me4000_outl(tmp, ao_context->preload_reg);
2634 spin_unlock(&ao_context->board_info->preload_lock); 2648 spin_unlock(&ao_context->board_info->preload_lock);
2635 2649
@@ -2730,8 +2744,10 @@ static int me4000_ao_simultaneous_update(struct me4000_ao_channel_list *arg,
2730 "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n"); 2744 "ME4000:me4000_ao_simultaneous_update():Invalid board number specified\n");
2731 return -EFAULT; 2745 return -EFAULT;
2732 } 2746 }
2733 tmp &= ~(0x1 << channels.list[i]); // Clear the preload bit 2747 /* Clear the preload bit */
2734 tmp &= ~(0x1 << (channels.list[i] + 16)); // Clear the hw simultaneous bit 2748 tmp &= ~(0x1 << channels.list[i]);
2749 /* Clear the hw simultaneous bit */
2750 tmp &= ~(0x1 << (channels.list[i] + 16));
2735 } 2751 }
2736 me4000_outl(tmp, ao_context->preload_reg); 2752 me4000_outl(tmp, ao_context->preload_reg);
2737 spin_unlock(&ao_context->board_info->preload_lock); 2753 spin_unlock(&ao_context->board_info->preload_lock);
@@ -2757,8 +2773,10 @@ static int me4000_ao_synchronous_ex_trig(struct me4000_ao_context *ao_context)
2757 2773
2758 spin_lock(&ao_context->board_info->preload_lock); 2774 spin_lock(&ao_context->board_info->preload_lock);
2759 tmp = me4000_inl(ao_context->preload_reg); 2775 tmp = me4000_inl(ao_context->preload_reg);
2760 tmp &= ~(0x1 << ao_context->index); // Disable synchronous sw bit 2776 /* Disable synchronous sw bit */
2761 tmp |= 0x1 << (ao_context->index + 16); // Enable synchronous hw bit 2777 tmp &= ~(0x1 << ao_context->index);
2778 /* Enable synchronous hw bit */
2779 tmp |= 0x1 << (ao_context->index + 16);
2762 me4000_outl(tmp, ao_context->preload_reg); 2780 me4000_outl(tmp, ao_context->preload_reg);
2763 spin_unlock(&ao_context->board_info->preload_lock); 2781 spin_unlock(&ao_context->board_info->preload_lock);
2764 2782
@@ -2792,8 +2810,10 @@ static int me4000_ao_synchronous_sw(struct me4000_ao_context *ao_context)
2792 2810
2793 spin_lock(&ao_context->board_info->preload_lock); 2811 spin_lock(&ao_context->board_info->preload_lock);
2794 tmp = me4000_inl(ao_context->preload_reg); 2812 tmp = me4000_inl(ao_context->preload_reg);
2795 tmp |= 0x1 << ao_context->index; // Enable synchronous sw bit 2813 /* Enable synchronous sw bit */
2796 tmp &= ~(0x1 << (ao_context->index + 16)); // Disable synchronous hw bit 2814 tmp |= 0x1 << ao_context->index;
2815 /* Disable synchronous hw bit */
2816 tmp &= ~(0x1 << (ao_context->index + 16));
2797 me4000_outl(tmp, ao_context->preload_reg); 2817 me4000_outl(tmp, ao_context->preload_reg);
2798 spin_unlock(&ao_context->board_info->preload_lock); 2818 spin_unlock(&ao_context->board_info->preload_lock);
2799 2819
@@ -5434,8 +5454,6 @@ static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5434 int i; 5454 int i;
5435 int c = 0; 5455 int c = 0;
5436 int c1 = 0; 5456 int c1 = 0;
5437 //unsigned long before;
5438 //unsigned long after;
5439 5457
5440 ISR_PDEBUG("me4000_ao_isr() is executed\n"); 5458 ISR_PDEBUG("me4000_ao_isr() is executed\n");
5441 5459
@@ -5487,7 +5505,6 @@ static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5487 ("me4000_ao_isr():Work done or buffer empty\n"); 5505 ("me4000_ao_isr():Work done or buffer empty\n");
5488 break; 5506 break;
5489 } 5507 }
5490 //rdtscl(before);
5491 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) || 5508 if (((ao_context->fifo_reg & 0xFF) == ME4000_AO_01_FIFO_REG) ||
5492 ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) { 5509 ((ao_context->fifo_reg & 0xFF) == ME4000_AO_03_FIFO_REG)) {
5493 for (i = 0; i < c1; i++) { 5510 for (i = 0; i < c1; i++) {
@@ -5503,8 +5520,6 @@ static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5503 ao_context->circ_buf.buf + 5520 ao_context->circ_buf.buf +
5504 ao_context->circ_buf.tail, c1); 5521 ao_context->circ_buf.tail, c1);
5505 5522
5506 //rdtscl(after);
5507 //printk(KERN_ERR"ME4000:me4000_ao_isr():Time lapse = %lu\n", after - before);
5508 5523
5509 ao_context->circ_buf.tail = 5524 ao_context->circ_buf.tail =
5510 (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT - 5525 (ao_context->circ_buf.tail + c1) & (ME4000_AO_BUFFER_COUNT -
@@ -5536,8 +5551,10 @@ static irqreturn_t me4000_ao_isr(int irq, void *dev_id)
5536 /* If state machine is stopped, flow was interrupted */ 5551 /* If state machine is stopped, flow was interrupted */
5537 if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) { 5552 if (!(me4000_inl(ao_context->status_reg) & ME4000_AO_STATUS_BIT_FSM)) {
5538 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n"); 5553 printk(KERN_ERR "ME4000:me4000_ao_isr():Broken pipe\n");
5539 ao_context->pipe_flag = 1; // Set flag in order to inform write routine 5554 /* Set flag in order to inform write routine */
5540 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ; // Disable interrupt 5555 ao_context->pipe_flag = 1;
5556 /* Disable interrupt */
5557 tmp &= ~ME4000_AO_CTRL_BIT_ENABLE_IRQ;
5541 } 5558 }
5542 me4000_outl(tmp, ao_context->ctrl_reg); 5559 me4000_outl(tmp, ao_context->ctrl_reg);
5543 spin_unlock(&ao_context->int_lock); 5560 spin_unlock(&ao_context->int_lock);