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authorHaiyang Zhang <haiyangz@microsoft.com>2010-11-08 17:04:39 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2010-11-09 19:42:10 -0500
commitf6feebe073db4c97dc10f6fab54f9d4b5816886b (patch)
treec38936f8449f8b428858fad90c5e58a06af38a28 /drivers/staging/hv/hv.c
parentc50f7fb28400bc4829c26bb4a2d6c06a45e90b1a (diff)
staging: hv: Convert camel cased struct fields in hv_api.h to lower cases
staging: hv: Convert camel cased struct fields in hv_api.h to lower cases Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Signed-off-by: Hank Janssen <hjanssen@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/hv/hv.c')
-rw-r--r--drivers/staging/hv/hv.c120
1 files changed, 60 insertions, 60 deletions
diff --git a/drivers/staging/hv/hv.c b/drivers/staging/hv/hv.c
index 86b1ddd9040..ab033277226 100644
--- a/drivers/staging/hv/hv.c
+++ b/drivers/staging/hv/hv.c
@@ -50,7 +50,7 @@ static int HvQueryHypervisorPresence(void)
50 ebx = 0; 50 ebx = 0;
51 ecx = 0; 51 ecx = 0;
52 edx = 0; 52 edx = 0;
53 op = HvCpuIdFunctionVersionAndFeatures; 53 op = HVCPUID_VERSION_FEATURES;
54 cpuid(op, &eax, &ebx, &ecx, &edx); 54 cpuid(op, &eax, &ebx, &ecx, &edx);
55 55
56 return ecx & HV_PRESENT_BIT; 56 return ecx & HV_PRESENT_BIT;
@@ -76,7 +76,7 @@ static int HvQueryHypervisorInfo(void)
76 ebx = 0; 76 ebx = 0;
77 ecx = 0; 77 ecx = 0;
78 edx = 0; 78 edx = 0;
79 op = HvCpuIdFunctionHvVendorAndMaxFunction; 79 op = HVCPUID_VENDOR_MAXFUNCTION;
80 cpuid(op, &eax, &ebx, &ecx, &edx); 80 cpuid(op, &eax, &ebx, &ecx, &edx);
81 81
82 DPRINT_INFO(VMBUS, "Vendor ID: %c%c%c%c%c%c%c%c%c%c%c%c", 82 DPRINT_INFO(VMBUS, "Vendor ID: %c%c%c%c%c%c%c%c%c%c%c%c",
@@ -98,7 +98,7 @@ static int HvQueryHypervisorInfo(void)
98 ebx = 0; 98 ebx = 0;
99 ecx = 0; 99 ecx = 0;
100 edx = 0; 100 edx = 0;
101 op = HvCpuIdFunctionHvInterface; 101 op = HVCPUID_INTERFACE;
102 cpuid(op, &eax, &ebx, &ecx, &edx); 102 cpuid(op, &eax, &ebx, &ecx, &edx);
103 103
104 DPRINT_INFO(VMBUS, "Interface ID: %c%c%c%c", 104 DPRINT_INFO(VMBUS, "Interface ID: %c%c%c%c",
@@ -107,12 +107,12 @@ static int HvQueryHypervisorInfo(void)
107 ((eax >> 16) & 0xFF), 107 ((eax >> 16) & 0xFF),
108 ((eax >> 24) & 0xFF)); 108 ((eax >> 24) & 0xFF));
109 109
110 if (maxLeaf >= HvCpuIdFunctionMsHvVersion) { 110 if (maxLeaf >= HVCPUID_VERSION) {
111 eax = 0; 111 eax = 0;
112 ebx = 0; 112 ebx = 0;
113 ecx = 0; 113 ecx = 0;
114 edx = 0; 114 edx = 0;
115 op = HvCpuIdFunctionMsHvVersion; 115 op = HVCPUID_VERSION;
116 cpuid(op, &eax, &ebx, &ecx, &edx); 116 cpuid(op, &eax, &ebx, &ecx, &edx);
117 DPRINT_INFO(VMBUS, "OS Build:%d-%d.%d-%d-%d.%d",\ 117 DPRINT_INFO(VMBUS, "OS Build:%d-%d.%d-%d-%d.%d",\
118 eax, 118 eax,
@@ -222,7 +222,7 @@ int HvInit(void)
222 gHvContext.GuestId = HV_LINUX_GUEST_ID; 222 gHvContext.GuestId = HV_LINUX_GUEST_ID;
223 223
224 /* See if the hypercall page is already set */ 224 /* See if the hypercall page is already set */
225 rdmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); 225 rdmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.as_uint64);
226 226
227 /* 227 /*
228 * Allocate the hypercall page memory 228 * Allocate the hypercall page memory
@@ -236,16 +236,16 @@ int HvInit(void)
236 goto Cleanup; 236 goto Cleanup;
237 } 237 }
238 238
239 hypercallMsr.Enable = 1; 239 hypercallMsr.enable = 1;
240 240
241 hypercallMsr.GuestPhysicalAddress = vmalloc_to_pfn(virtAddr); 241 hypercallMsr.guest_physical_address = vmalloc_to_pfn(virtAddr);
242 wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); 242 wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.as_uint64);
243 243
244 /* Confirm that hypercall page did get setup. */ 244 /* Confirm that hypercall page did get setup. */
245 hypercallMsr.AsUINT64 = 0; 245 hypercallMsr.as_uint64 = 0;
246 rdmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); 246 rdmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.as_uint64);
247 247
248 if (!hypercallMsr.Enable) { 248 if (!hypercallMsr.enable) {
249 DPRINT_ERR(VMBUS, "unable to set hypercall page!!"); 249 DPRINT_ERR(VMBUS, "unable to set hypercall page!!");
250 goto Cleanup; 250 goto Cleanup;
251 } 251 }
@@ -254,7 +254,7 @@ int HvInit(void)
254 254
255 DPRINT_INFO(VMBUS, "Hypercall page VA=%p, PA=0x%0llx", 255 DPRINT_INFO(VMBUS, "Hypercall page VA=%p, PA=0x%0llx",
256 gHvContext.HypercallPage, 256 gHvContext.HypercallPage,
257 (u64)hypercallMsr.GuestPhysicalAddress << PAGE_SHIFT); 257 (u64)hypercallMsr.guest_physical_address << PAGE_SHIFT);
258 258
259 /* Setup the global signal event param for the signal event hypercall */ 259 /* Setup the global signal event param for the signal event hypercall */
260 gHvContext.SignalEventBuffer = 260 gHvContext.SignalEventBuffer =
@@ -267,19 +267,19 @@ int HvInit(void)
267 (struct hv_input_signal_event *) 267 (struct hv_input_signal_event *)
268 (ALIGN_UP((unsigned long)gHvContext.SignalEventBuffer, 268 (ALIGN_UP((unsigned long)gHvContext.SignalEventBuffer,
269 HV_HYPERCALL_PARAM_ALIGN)); 269 HV_HYPERCALL_PARAM_ALIGN));
270 gHvContext.SignalEventParam->ConnectionId.Asu32 = 0; 270 gHvContext.SignalEventParam->connectionid.asu32 = 0;
271 gHvContext.SignalEventParam->ConnectionId.u.Id = 271 gHvContext.SignalEventParam->connectionid.u.id =
272 VMBUS_EVENT_CONNECTION_ID; 272 VMBUS_EVENT_CONNECTION_ID;
273 gHvContext.SignalEventParam->FlagNumber = 0; 273 gHvContext.SignalEventParam->flag_number = 0;
274 gHvContext.SignalEventParam->RsvdZ = 0; 274 gHvContext.SignalEventParam->rsvdz = 0;
275 275
276 return ret; 276 return ret;
277 277
278Cleanup: 278Cleanup:
279 if (virtAddr) { 279 if (virtAddr) {
280 if (hypercallMsr.Enable) { 280 if (hypercallMsr.enable) {
281 hypercallMsr.AsUINT64 = 0; 281 hypercallMsr.as_uint64 = 0;
282 wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); 282 wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.as_uint64);
283 } 283 }
284 284
285 vfree(virtAddr); 285 vfree(virtAddr);
@@ -302,8 +302,8 @@ void HvCleanup(void)
302 gHvContext.SignalEventParam = NULL; 302 gHvContext.SignalEventParam = NULL;
303 303
304 if (gHvContext.HypercallPage) { 304 if (gHvContext.HypercallPage) {
305 hypercallMsr.AsUINT64 = 0; 305 hypercallMsr.as_uint64 = 0;
306 wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.AsUINT64); 306 wrmsrl(HV_X64_MSR_HYPERCALL, hypercallMsr.as_uint64);
307 vfree(gHvContext.HypercallPage); 307 vfree(gHvContext.HypercallPage);
308 gHvContext.HypercallPage = NULL; 308 gHvContext.HypercallPage = NULL;
309 } 309 }
@@ -337,12 +337,12 @@ u16 HvPostMessage(union hv_connection_id connectionId,
337 alignedMsg = (struct hv_input_post_message *) 337 alignedMsg = (struct hv_input_post_message *)
338 (ALIGN_UP(addr, HV_HYPERCALL_PARAM_ALIGN)); 338 (ALIGN_UP(addr, HV_HYPERCALL_PARAM_ALIGN));
339 339
340 alignedMsg->ConnectionId = connectionId; 340 alignedMsg->connectionid = connectionId;
341 alignedMsg->MessageType = messageType; 341 alignedMsg->message_type = messageType;
342 alignedMsg->PayloadSize = payloadSize; 342 alignedMsg->payload_size = payloadSize;
343 memcpy((void *)alignedMsg->Payload, payload, payloadSize); 343 memcpy((void *)alignedMsg->payload, payload, payloadSize);
344 344
345 status = HvDoHypercall(HvCallPostMessage, alignedMsg, NULL) & 0xFFFF; 345 status = HvDoHypercall(HVCALL_POST_MESSAGE, alignedMsg, NULL) & 0xFFFF;
346 346
347 kfree((void *)addr); 347 kfree((void *)addr);
348 348
@@ -359,7 +359,7 @@ u16 HvSignalEvent(void)
359{ 359{
360 u16 status; 360 u16 status;
361 361
362 status = HvDoHypercall(HvCallSignalEvent, gHvContext.SignalEventParam, 362 status = HvDoHypercall(HVCALL_SIGNAL_EVENT, gHvContext.SignalEventParam,
363 NULL) & 0xFFFF; 363 NULL) & 0xFFFF;
364 return status; 364 return status;
365} 365}
@@ -407,47 +407,47 @@ void HvSynicInit(void *irqarg)
407 } 407 }
408 408
409 /* Setup the Synic's message page */ 409 /* Setup the Synic's message page */
410 rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); 410 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
411 simp.SimpEnabled = 1; 411 simp.simp_enabled = 1;
412 simp.BaseSimpGpa = virt_to_phys(gHvContext.synICMessagePage[cpu]) 412 simp.base_simp_gpa = virt_to_phys(gHvContext.synICMessagePage[cpu])
413 >> PAGE_SHIFT; 413 >> PAGE_SHIFT;
414 414
415 DPRINT_DBG(VMBUS, "HV_X64_MSR_SIMP msr set to: %llx", simp.AsUINT64); 415 DPRINT_DBG(VMBUS, "HV_X64_MSR_SIMP msr set to: %llx", simp.as_uint64);
416 416
417 wrmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); 417 wrmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
418 418
419 /* Setup the Synic's event page */ 419 /* Setup the Synic's event page */
420 rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); 420 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
421 siefp.SiefpEnabled = 1; 421 siefp.siefp_enabled = 1;
422 siefp.BaseSiefpGpa = virt_to_phys(gHvContext.synICEventPage[cpu]) 422 siefp.base_siefp_gpa = virt_to_phys(gHvContext.synICEventPage[cpu])
423 >> PAGE_SHIFT; 423 >> PAGE_SHIFT;
424 424
425 DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", siefp.AsUINT64); 425 DPRINT_DBG(VMBUS, "HV_X64_MSR_SIEFP msr set to: %llx", siefp.as_uint64);
426 426
427 wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); 427 wrmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
428 428
429 /* Setup the interception SINT. */ 429 /* Setup the interception SINT. */
430 /* wrmsrl((HV_X64_MSR_SINT0 + HV_SYNIC_INTERCEPTION_SINT_INDEX), */ 430 /* wrmsrl((HV_X64_MSR_SINT0 + HV_SYNIC_INTERCEPTION_SINT_INDEX), */
431 /* interceptionSint.AsUINT64); */ 431 /* interceptionSint.as_uint64); */
432 432
433 /* Setup the shared SINT. */ 433 /* Setup the shared SINT. */
434 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64); 434 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.as_uint64);
435 435
436 sharedSint.AsUINT64 = 0; 436 sharedSint.as_uint64 = 0;
437 sharedSint.Vector = irqVector; /* HV_SHARED_SINT_IDT_VECTOR + 0x20; */ 437 sharedSint.vector = irqVector; /* HV_SHARED_SINT_IDT_VECTOR + 0x20; */
438 sharedSint.Masked = false; 438 sharedSint.masked = false;
439 sharedSint.AutoEoi = true; 439 sharedSint.auto_eoi = true;
440 440
441 DPRINT_DBG(VMBUS, "HV_X64_MSR_SINT1 msr set to: %llx", 441 DPRINT_DBG(VMBUS, "HV_X64_MSR_SINT1 msr set to: %llx",
442 sharedSint.AsUINT64); 442 sharedSint.as_uint64);
443 443
444 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64); 444 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.as_uint64);
445 445
446 /* Enable the global synic bit */ 446 /* Enable the global synic bit */
447 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.AsUINT64); 447 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
448 sctrl.Enable = 1; 448 sctrl.enable = 1;
449 449
450 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.AsUINT64); 450 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
451 451
452 gHvContext.SynICInitialized = true; 452 gHvContext.SynICInitialized = true;
453 return; 453 return;
@@ -474,25 +474,25 @@ void HvSynicCleanup(void *arg)
474 if (!gHvContext.SynICInitialized) 474 if (!gHvContext.SynICInitialized)
475 return; 475 return;
476 476
477 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64); 477 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.as_uint64);
478 478
479 sharedSint.Masked = 1; 479 sharedSint.masked = 1;
480 480
481 /* Need to correctly cleanup in the case of SMP!!! */ 481 /* Need to correctly cleanup in the case of SMP!!! */
482 /* Disable the interrupt */ 482 /* Disable the interrupt */
483 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.AsUINT64); 483 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, sharedSint.as_uint64);
484 484
485 rdmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); 485 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
486 simp.SimpEnabled = 0; 486 simp.simp_enabled = 0;
487 simp.BaseSimpGpa = 0; 487 simp.base_simp_gpa = 0;
488 488
489 wrmsrl(HV_X64_MSR_SIMP, simp.AsUINT64); 489 wrmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
490 490
491 rdmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); 491 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
492 siefp.SiefpEnabled = 0; 492 siefp.siefp_enabled = 0;
493 siefp.BaseSiefpGpa = 0; 493 siefp.base_siefp_gpa = 0;
494 494
495 wrmsrl(HV_X64_MSR_SIEFP, siefp.AsUINT64); 495 wrmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
496 496
497 osd_PageFree(gHvContext.synICMessagePage[cpu], 1); 497 osd_PageFree(gHvContext.synICMessagePage[cpu], 1);
498 osd_PageFree(gHvContext.synICEventPage[cpu], 1); 498 osd_PageFree(gHvContext.synICEventPage[cpu], 1);