diff options
author | Roland Vossen <rvossen@broadcom.com> | 2011-08-08 09:58:01 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2011-08-23 15:59:55 -0400 |
commit | 0da649102e6b2efc772b48ab7d1f70b9486ac6f1 (patch) | |
tree | d40366afda402dadee94f4c1f364465a92dfd5bf /drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c | |
parent | 786d00f7a0d744d55a211dc0c1f701c2c4e3d6bd (diff) |
staging: brcm80211: replaced all volatile typedefs
Volatile keyword is not needed, hardware is accessed using native Linux
calls that provide synchronization.
Signed-off-by: Roland Vossen <rvossen@broadcom.com>
Reviewed-by: Arend van Spriel <arend@broadcom.com>
Reviewed-by: Franky Lin <frankyl@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c')
-rw-r--r-- | drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c | 33 |
1 files changed, 18 insertions, 15 deletions
diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c index 13a447fea5b..940f76ba778 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c | |||
@@ -365,7 +365,7 @@ void write_phy_channel_reg(struct brcms_phy *pi, uint val) | |||
365 | 365 | ||
366 | u16 read_phy_reg(struct brcms_phy *pi, u16 addr) | 366 | u16 read_phy_reg(struct brcms_phy *pi, u16 addr) |
367 | { | 367 | { |
368 | d11regs_t *regs; | 368 | struct d11regs *regs; |
369 | 369 | ||
370 | regs = pi->regs; | 370 | regs = pi->regs; |
371 | 371 | ||
@@ -377,7 +377,7 @@ u16 read_phy_reg(struct brcms_phy *pi, u16 addr) | |||
377 | 377 | ||
378 | void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) | 378 | void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) |
379 | { | 379 | { |
380 | d11regs_t *regs; | 380 | struct d11regs *regs; |
381 | 381 | ||
382 | regs = pi->regs; | 382 | regs = pi->regs; |
383 | 383 | ||
@@ -400,7 +400,7 @@ void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) | |||
400 | 400 | ||
401 | void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) | 401 | void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) |
402 | { | 402 | { |
403 | d11regs_t *regs; | 403 | struct d11regs *regs; |
404 | 404 | ||
405 | regs = pi->regs; | 405 | regs = pi->regs; |
406 | 406 | ||
@@ -412,7 +412,7 @@ void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) | |||
412 | 412 | ||
413 | void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) | 413 | void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) |
414 | { | 414 | { |
415 | d11regs_t *regs; | 415 | struct d11regs *regs; |
416 | 416 | ||
417 | regs = pi->regs; | 417 | regs = pi->regs; |
418 | 418 | ||
@@ -424,7 +424,7 @@ void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) | |||
424 | 424 | ||
425 | void mod_phy_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val) | 425 | void mod_phy_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val) |
426 | { | 426 | { |
427 | d11regs_t *regs; | 427 | struct d11regs *regs; |
428 | 428 | ||
429 | regs = pi->regs; | 429 | regs = pi->regs; |
430 | 430 | ||
@@ -543,7 +543,7 @@ wlc_phy_attach(struct shared_phy *sh, void *regs, int bandtype, | |||
543 | return NULL; | 543 | return NULL; |
544 | } | 544 | } |
545 | pi->wiphy = wiphy; | 545 | pi->wiphy = wiphy; |
546 | pi->regs = (d11regs_t *) regs; | 546 | pi->regs = (struct d11regs *) regs; |
547 | pi->sh = sh; | 547 | pi->sh = sh; |
548 | pi->phy_init_por = true; | 548 | pi->phy_init_por = true; |
549 | pi->phy_wreg_limit = PHY_WREG_LIMIT; | 549 | pi->phy_wreg_limit = PHY_WREG_LIMIT; |
@@ -1134,7 +1134,7 @@ wlc_phy_init_radio_regs(struct brcms_phy *pi, struct radio_regs *radioregs, | |||
1134 | void wlc_phy_do_dummy_tx(struct brcms_phy *pi, bool ofdm, bool pa_on) | 1134 | void wlc_phy_do_dummy_tx(struct brcms_phy *pi, bool ofdm, bool pa_on) |
1135 | { | 1135 | { |
1136 | #define DUMMY_PKT_LEN 20 | 1136 | #define DUMMY_PKT_LEN 20 |
1137 | d11regs_t *regs = pi->regs; | 1137 | struct d11regs *regs = pi->regs; |
1138 | int i, count; | 1138 | int i, count; |
1139 | u8 ofdmpkt[DUMMY_PKT_LEN] = { | 1139 | u8 ofdmpkt[DUMMY_PKT_LEN] = { |
1140 | 0xcc, 0x01, 0x02, 0x00, 0x00, 0x00, 0xd4, 0x00, 0x00, 0x00, | 1140 | 0xcc, 0x01, 0x02, 0x00, 0x00, 0x00, 0xd4, 0x00, 0x00, 0x00, |
@@ -3134,12 +3134,13 @@ void wlc_lcnphy_epa_switch(struct brcms_phy *pi, bool mode) | |||
3134 | 3134 | ||
3135 | } | 3135 | } |
3136 | ai_corereg(pi->sh->sih, SI_CC_IDX, | 3136 | ai_corereg(pi->sh->sih, SI_CC_IDX, |
3137 | offsetof(chipcregs_t, gpiocontrol), ~0x0, | 3137 | offsetof(struct chipcregs, gpiocontrol), |
3138 | 0x0); | 3138 | ~0x0, 0x0); |
3139 | ai_corereg(pi->sh->sih, SI_CC_IDX, | 3139 | ai_corereg(pi->sh->sih, SI_CC_IDX, |
3140 | offsetof(chipcregs_t, gpioout), 0x40, 0x40); | 3140 | offsetof(struct chipcregs, gpioout), 0x40, |
3141 | 0x40); | ||
3141 | ai_corereg(pi->sh->sih, SI_CC_IDX, | 3142 | ai_corereg(pi->sh->sih, SI_CC_IDX, |
3142 | offsetof(chipcregs_t, gpioouten), 0x40, | 3143 | offsetof(struct chipcregs, gpioouten), 0x40, |
3143 | 0x40); | 3144 | 0x40); |
3144 | } else { | 3145 | } else { |
3145 | mod_phy_reg(pi, 0x44c, (0x1 << 2), (0) << 2); | 3146 | mod_phy_reg(pi, 0x44c, (0x1 << 2), (0) << 2); |
@@ -3147,12 +3148,14 @@ void wlc_lcnphy_epa_switch(struct brcms_phy *pi, bool mode) | |||
3147 | mod_phy_reg(pi, 0x44d, (0x1 << 2), (0) << 2); | 3148 | mod_phy_reg(pi, 0x44d, (0x1 << 2), (0) << 2); |
3148 | 3149 | ||
3149 | ai_corereg(pi->sh->sih, SI_CC_IDX, | 3150 | ai_corereg(pi->sh->sih, SI_CC_IDX, |
3150 | offsetof(chipcregs_t, gpioout), 0x40, 0x00); | 3151 | offsetof(struct chipcregs, gpioout), 0x40, |
3152 | 0x00); | ||
3151 | ai_corereg(pi->sh->sih, SI_CC_IDX, | 3153 | ai_corereg(pi->sh->sih, SI_CC_IDX, |
3152 | offsetof(chipcregs_t, gpioouten), 0x40, 0x0); | 3154 | offsetof(struct chipcregs, gpioouten), 0x40, |
3155 | 0x0); | ||
3153 | ai_corereg(pi->sh->sih, SI_CC_IDX, | 3156 | ai_corereg(pi->sh->sih, SI_CC_IDX, |
3154 | offsetof(chipcregs_t, gpiocontrol), ~0x0, | 3157 | offsetof(struct chipcregs, gpiocontrol), |
3155 | 0x40); | 3158 | ~0x0, 0x40); |
3156 | } | 3159 | } |
3157 | } | 3160 | } |
3158 | } | 3161 | } |