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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /drivers/ssb
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'drivers/ssb')
-rw-r--r--drivers/ssb/Kconfig8
-rw-r--r--drivers/ssb/Makefile1
-rw-r--r--drivers/ssb/b43_pci_bridge.c5
-rw-r--r--drivers/ssb/driver_chipcommon.c179
-rw-r--r--drivers/ssb/driver_chipcommon_pmu.c79
-rw-r--r--drivers/ssb/driver_extif.c67
-rw-r--r--drivers/ssb/driver_gige.c15
-rw-r--r--drivers/ssb/driver_gpio.c176
-rw-r--r--drivers/ssb/driver_mipscore.c47
-rw-r--r--drivers/ssb/driver_pcicore.c13
-rw-r--r--drivers/ssb/embedded.c36
-rw-r--r--drivers/ssb/main.c93
-rw-r--r--drivers/ssb/pci.c192
-rw-r--r--drivers/ssb/pcihost_wrapper.c7
-rw-r--r--drivers/ssb/pcmcia.c12
-rw-r--r--drivers/ssb/scan.c5
-rw-r--r--drivers/ssb/sdio.c12
-rw-r--r--drivers/ssb/ssb_private.h52
18 files changed, 144 insertions, 855 deletions
diff --git a/drivers/ssb/Kconfig b/drivers/ssb/Kconfig
index 5d6f2ec1c70..42cdaa9a4d8 100644
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -160,12 +160,4 @@ config SSB_DRIVER_GIGE
160 160
161 If unsure, say N 161 If unsure, say N
162 162
163config SSB_DRIVER_GPIO
164 bool "SSB GPIO driver"
165 depends on SSB && GPIOLIB
166 help
167 Driver to provide access to the GPIO pins on the bus.
168
169 If unsure, say N
170
171endmenu 163endmenu
diff --git a/drivers/ssb/Makefile b/drivers/ssb/Makefile
index 9159ba77c38..656e58b9261 100644
--- a/drivers/ssb/Makefile
+++ b/drivers/ssb/Makefile
@@ -15,7 +15,6 @@ ssb-$(CONFIG_SSB_DRIVER_MIPS) += driver_mipscore.o
15ssb-$(CONFIG_SSB_DRIVER_EXTIF) += driver_extif.o 15ssb-$(CONFIG_SSB_DRIVER_EXTIF) += driver_extif.o
16ssb-$(CONFIG_SSB_DRIVER_PCICORE) += driver_pcicore.o 16ssb-$(CONFIG_SSB_DRIVER_PCICORE) += driver_pcicore.o
17ssb-$(CONFIG_SSB_DRIVER_GIGE) += driver_gige.o 17ssb-$(CONFIG_SSB_DRIVER_GIGE) += driver_gige.o
18ssb-$(CONFIG_SSB_DRIVER_GPIO) += driver_gpio.o
19 18
20# b43 pci-ssb-bridge driver 19# b43 pci-ssb-bridge driver
21# Not strictly a part of SSB, but kept here for convenience 20# Not strictly a part of SSB, but kept here for convenience
diff --git a/drivers/ssb/b43_pci_bridge.c b/drivers/ssb/b43_pci_bridge.c
index 19396dc4ee4..bf53e44c82a 100644
--- a/drivers/ssb/b43_pci_bridge.c
+++ b/drivers/ssb/b43_pci_bridge.c
@@ -11,7 +11,6 @@
11 */ 11 */
12 12
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/module.h>
15#include <linux/ssb/ssb.h> 14#include <linux/ssb/ssb.h>
16 15
17#include "ssb_private.h" 16#include "ssb_private.h"
@@ -29,15 +28,11 @@ static const struct pci_device_id b43_pci_bridge_tbl[] = {
29 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) }, 28 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4319) },
30 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) }, 29 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4320) },
31 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) }, 30 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4321) },
32 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4322) },
33 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43222) },
34 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) }, 31 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4324) },
35 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) }, 32 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4325) },
36 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) }, 33 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4328) },
37 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4329) }, 34 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4329) },
38 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x432b) }, 35 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x432b) },
39 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x432c) },
40 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4350) },
41 { 0, }, 36 { 0, },
42}; 37};
43MODULE_DEVICE_TABLE(pci, b43_pci_bridge_tbl); 38MODULE_DEVICE_TABLE(pci, b43_pci_bridge_tbl);
diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c
index 71098a7b5fe..5d9c97c2479 100644
--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
@@ -4,16 +4,13 @@
4 * 4 *
5 * Copyright 2005, Broadcom Corporation 5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <m@bues.ch> 6 * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
8 * 7 *
9 * Licensed under the GNU/GPL. See COPYING for details. 8 * Licensed under the GNU/GPL. See COPYING for details.
10 */ 9 */
11 10
12#include <linux/ssb/ssb.h> 11#include <linux/ssb/ssb.h>
13#include <linux/ssb/ssb_regs.h> 12#include <linux/ssb/ssb_regs.h>
14#include <linux/export.h>
15#include <linux/pci.h> 13#include <linux/pci.h>
16#include <linux/bcm47xx_wdt.h>
17 14
18#include "ssb_private.h" 15#include "ssb_private.h"
19 16
@@ -282,76 +279,10 @@ static void calc_fast_powerup_delay(struct ssb_chipcommon *cc)
282 cc->fast_pwrup_delay = tmp; 279 cc->fast_pwrup_delay = tmp;
283} 280}
284 281
285static u32 ssb_chipco_alp_clock(struct ssb_chipcommon *cc)
286{
287 if (cc->capabilities & SSB_CHIPCO_CAP_PMU)
288 return ssb_pmu_get_alp_clock(cc);
289
290 return 20000000;
291}
292
293static u32 ssb_chipco_watchdog_get_max_timer(struct ssb_chipcommon *cc)
294{
295 u32 nb;
296
297 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
298 if (cc->dev->id.revision < 26)
299 nb = 16;
300 else
301 nb = (cc->dev->id.revision >= 37) ? 32 : 24;
302 } else {
303 nb = 28;
304 }
305 if (nb == 32)
306 return 0xffffffff;
307 else
308 return (1 << nb) - 1;
309}
310
311u32 ssb_chipco_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks)
312{
313 struct ssb_chipcommon *cc = bcm47xx_wdt_get_drvdata(wdt);
314
315 if (cc->dev->bus->bustype != SSB_BUSTYPE_SSB)
316 return 0;
317
318 return ssb_chipco_watchdog_timer_set(cc, ticks);
319}
320
321u32 ssb_chipco_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms)
322{
323 struct ssb_chipcommon *cc = bcm47xx_wdt_get_drvdata(wdt);
324 u32 ticks;
325
326 if (cc->dev->bus->bustype != SSB_BUSTYPE_SSB)
327 return 0;
328
329 ticks = ssb_chipco_watchdog_timer_set(cc, cc->ticks_per_ms * ms);
330 return ticks / cc->ticks_per_ms;
331}
332
333static int ssb_chipco_watchdog_ticks_per_ms(struct ssb_chipcommon *cc)
334{
335 struct ssb_bus *bus = cc->dev->bus;
336
337 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
338 /* based on 32KHz ILP clock */
339 return 32;
340 } else {
341 if (cc->dev->id.revision < 18)
342 return ssb_clockspeed(bus) / 1000;
343 else
344 return ssb_chipco_alp_clock(cc) / 1000;
345 }
346}
347
348void ssb_chipcommon_init(struct ssb_chipcommon *cc) 282void ssb_chipcommon_init(struct ssb_chipcommon *cc)
349{ 283{
350 if (!cc->dev) 284 if (!cc->dev)
351 return; /* We don't have a ChipCommon */ 285 return; /* We don't have a ChipCommon */
352
353 spin_lock_init(&cc->gpio_lock);
354
355 if (cc->dev->id.revision >= 11) 286 if (cc->dev->id.revision >= 11)
356 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT); 287 cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT);
357 ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status); 288 ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status);
@@ -365,11 +296,6 @@ void ssb_chipcommon_init(struct ssb_chipcommon *cc)
365 chipco_powercontrol_init(cc); 296 chipco_powercontrol_init(cc);
366 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST); 297 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST);
367 calc_fast_powerup_delay(cc); 298 calc_fast_powerup_delay(cc);
368
369 if (cc->dev->bus->bustype == SSB_BUSTYPE_SSB) {
370 cc->ticks_per_ms = ssb_chipco_watchdog_ticks_per_ms(cc);
371 cc->max_timer_ms = ssb_chipco_watchdog_get_max_timer(cc) / cc->ticks_per_ms;
372 }
373} 299}
374 300
375void ssb_chipco_suspend(struct ssb_chipcommon *cc) 301void ssb_chipco_suspend(struct ssb_chipcommon *cc)
@@ -468,27 +394,10 @@ void ssb_chipco_timing_init(struct ssb_chipcommon *cc,
468} 394}
469 395
470/* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */ 396/* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
471u32 ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc, u32 ticks) 397void ssb_chipco_watchdog_timer_set(struct ssb_chipcommon *cc, u32 ticks)
472{ 398{
473 u32 maxt; 399 /* instant NMI */
474 enum ssb_clkmode clkmode; 400 chipco_write32(cc, SSB_CHIPCO_WATCHDOG, ticks);
475
476 maxt = ssb_chipco_watchdog_get_max_timer(cc);
477 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
478 if (ticks == 1)
479 ticks = 2;
480 else if (ticks > maxt)
481 ticks = maxt;
482 chipco_write32(cc, SSB_CHIPCO_PMU_WATCHDOG, ticks);
483 } else {
484 clkmode = ticks ? SSB_CLKMODE_FAST : SSB_CLKMODE_DYNAMIC;
485 ssb_chipco_set_clockmode(cc, clkmode);
486 if (ticks > maxt)
487 ticks = maxt;
488 /* instant NMI */
489 chipco_write32(cc, SSB_CHIPCO_WATCHDOG, ticks);
490 }
491 return ticks;
492} 401}
493 402
494void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value) 403void ssb_chipco_irq_mask(struct ssb_chipcommon *cc, u32 mask, u32 value)
@@ -508,93 +417,28 @@ u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc, u32 mask)
508 417
509u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value) 418u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc, u32 mask, u32 value)
510{ 419{
511 unsigned long flags; 420 return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
512 u32 res = 0;
513
514 spin_lock_irqsave(&cc->gpio_lock, flags);
515 res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUT, mask, value);
516 spin_unlock_irqrestore(&cc->gpio_lock, flags);
517
518 return res;
519} 421}
520 422
521u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value) 423u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc, u32 mask, u32 value)
522{ 424{
523 unsigned long flags; 425 return chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
524 u32 res = 0;
525
526 spin_lock_irqsave(&cc->gpio_lock, flags);
527 res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOOUTEN, mask, value);
528 spin_unlock_irqrestore(&cc->gpio_lock, flags);
529
530 return res;
531} 426}
532 427
533u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value) 428u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc, u32 mask, u32 value)
534{ 429{
535 unsigned long flags; 430 return chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value);
536 u32 res = 0;
537
538 spin_lock_irqsave(&cc->gpio_lock, flags);
539 res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOCTL, mask, value);
540 spin_unlock_irqrestore(&cc->gpio_lock, flags);
541
542 return res;
543} 431}
544EXPORT_SYMBOL(ssb_chipco_gpio_control); 432EXPORT_SYMBOL(ssb_chipco_gpio_control);
545 433
546u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value) 434u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc, u32 mask, u32 value)
547{ 435{
548 unsigned long flags; 436 return chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value);
549 u32 res = 0;
550
551 spin_lock_irqsave(&cc->gpio_lock, flags);
552 res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOIRQ, mask, value);
553 spin_unlock_irqrestore(&cc->gpio_lock, flags);
554
555 return res;
556} 437}
557 438
558u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value) 439u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc, u32 mask, u32 value)
559{ 440{
560 unsigned long flags; 441 return chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value);
561 u32 res = 0;
562
563 spin_lock_irqsave(&cc->gpio_lock, flags);
564 res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOPOL, mask, value);
565 spin_unlock_irqrestore(&cc->gpio_lock, flags);
566
567 return res;
568}
569
570u32 ssb_chipco_gpio_pullup(struct ssb_chipcommon *cc, u32 mask, u32 value)
571{
572 unsigned long flags;
573 u32 res = 0;
574
575 if (cc->dev->id.revision < 20)
576 return 0xffffffff;
577
578 spin_lock_irqsave(&cc->gpio_lock, flags);
579 res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOPULLUP, mask, value);
580 spin_unlock_irqrestore(&cc->gpio_lock, flags);
581
582 return res;
583}
584
585u32 ssb_chipco_gpio_pulldown(struct ssb_chipcommon *cc, u32 mask, u32 value)
586{
587 unsigned long flags;
588 u32 res = 0;
589
590 if (cc->dev->id.revision < 20)
591 return 0xffffffff;
592
593 spin_lock_irqsave(&cc->gpio_lock, flags);
594 res = chipco_write32_masked(cc, SSB_CHIPCO_GPIOPULLDOWN, mask, value);
595 spin_unlock_irqrestore(&cc->gpio_lock, flags);
596
597 return res;
598} 442}
599 443
600#ifdef CONFIG_SSB_SERIAL 444#ifdef CONFIG_SSB_SERIAL
@@ -628,7 +472,12 @@ int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
628 chipco_read32(cc, SSB_CHIPCO_CORECTL) 472 chipco_read32(cc, SSB_CHIPCO_CORECTL)
629 | SSB_CHIPCO_CORECTL_UARTCLK0); 473 | SSB_CHIPCO_CORECTL_UARTCLK0);
630 } else if ((ccrev >= 11) && (ccrev != 15)) { 474 } else if ((ccrev >= 11) && (ccrev != 15)) {
631 baud_base = ssb_chipco_alp_clock(cc); 475 /* Fixed ALP clock */
476 baud_base = 20000000;
477 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
478 /* FIXME: baud_base is different for devices with a PMU */
479 SSB_WARN_ON(1);
480 }
632 div = 1; 481 div = 1;
633 if (ccrev >= 21) { 482 if (ccrev >= 21) {
634 /* Turn off UART clock before switching clocksource. */ 483 /* Turn off UART clock before switching clocksource. */
diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c
index a43415a7fbe..52901c14c68 100644
--- a/drivers/ssb/driver_chipcommon_pmu.c
+++ b/drivers/ssb/driver_chipcommon_pmu.c
@@ -12,10 +12,6 @@
12#include <linux/ssb/ssb_regs.h> 12#include <linux/ssb/ssb_regs.h>
13#include <linux/ssb/ssb_driver_chipcommon.h> 13#include <linux/ssb/ssb_driver_chipcommon.h>
14#include <linux/delay.h> 14#include <linux/delay.h>
15#include <linux/export.h>
16#ifdef CONFIG_BCM47XX
17#include <asm/mach-bcm47xx/nvram.h>
18#endif
19 15
20#include "ssb_private.h" 16#include "ssb_private.h"
21 17
@@ -95,6 +91,10 @@ static void ssb_pmu0_pllinit_r0(struct ssb_chipcommon *cc,
95 u32 pmuctl, tmp, pllctl; 91 u32 pmuctl, tmp, pllctl;
96 unsigned int i; 92 unsigned int i;
97 93
94 if ((bus->chip_id == 0x5354) && !crystalfreq) {
95 /* The 5354 crystal freq is 25MHz */
96 crystalfreq = 25000;
97 }
98 if (crystalfreq) 98 if (crystalfreq)
99 e = pmu0_plltab_find_entry(crystalfreq); 99 e = pmu0_plltab_find_entry(crystalfreq);
100 if (!e) 100 if (!e)
@@ -320,11 +320,7 @@ static void ssb_pmu_pll_init(struct ssb_chipcommon *cc)
320 u32 crystalfreq = 0; /* in kHz. 0 = keep default freq. */ 320 u32 crystalfreq = 0; /* in kHz. 0 = keep default freq. */
321 321
322 if (bus->bustype == SSB_BUSTYPE_SSB) { 322 if (bus->bustype == SSB_BUSTYPE_SSB) {
323#ifdef CONFIG_BCM47XX 323 /* TODO: The user may override the crystal frequency. */
324 char buf[20];
325 if (nvram_getenv("xtalfreq", buf, sizeof(buf)) >= 0)
326 crystalfreq = simple_strtoul(buf, NULL, 0);
327#endif
328 } 324 }
329 325
330 switch (bus->chip_id) { 326 switch (bus->chip_id) {
@@ -333,11 +329,7 @@ static void ssb_pmu_pll_init(struct ssb_chipcommon *cc)
333 ssb_pmu1_pllinit_r0(cc, crystalfreq); 329 ssb_pmu1_pllinit_r0(cc, crystalfreq);
334 break; 330 break;
335 case 0x4328: 331 case 0x4328:
336 ssb_pmu0_pllinit_r0(cc, crystalfreq);
337 break;
338 case 0x5354: 332 case 0x5354:
339 if (crystalfreq == 0)
340 crystalfreq = 25000;
341 ssb_pmu0_pllinit_r0(cc, crystalfreq); 333 ssb_pmu0_pllinit_r0(cc, crystalfreq);
342 break; 334 break;
343 case 0x4322: 335 case 0x4322:
@@ -346,8 +338,6 @@ static void ssb_pmu_pll_init(struct ssb_chipcommon *cc)
346 chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, 0x380005C0); 338 chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, 0x380005C0);
347 } 339 }
348 break; 340 break;
349 case 43222:
350 break;
351 default: 341 default:
352 ssb_printk(KERN_ERR PFX 342 ssb_printk(KERN_ERR PFX
353 "ERROR: PLL init unknown for device %04X\n", 343 "ERROR: PLL init unknown for device %04X\n",
@@ -436,7 +426,6 @@ static void ssb_pmu_resources_init(struct ssb_chipcommon *cc)
436 min_msk = 0xCBB; 426 min_msk = 0xCBB;
437 break; 427 break;
438 case 0x4322: 428 case 0x4322:
439 case 43222:
440 /* We keep the default settings: 429 /* We keep the default settings:
441 * min_msk = 0xCBB 430 * min_msk = 0xCBB
442 * max_msk = 0x7FFFF 431 * max_msk = 0x7FFFF
@@ -617,61 +606,3 @@ void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on)
617 606
618EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage); 607EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage);
619EXPORT_SYMBOL(ssb_pmu_set_ldo_paref); 608EXPORT_SYMBOL(ssb_pmu_set_ldo_paref);
620
621static u32 ssb_pmu_get_alp_clock_clk0(struct ssb_chipcommon *cc)
622{
623 u32 crystalfreq;
624 const struct pmu0_plltab_entry *e = NULL;
625
626 crystalfreq = chipco_read32(cc, SSB_CHIPCO_PMU_CTL) &
627 SSB_CHIPCO_PMU_CTL_XTALFREQ >> SSB_CHIPCO_PMU_CTL_XTALFREQ_SHIFT;
628 e = pmu0_plltab_find_entry(crystalfreq);
629 BUG_ON(!e);
630 return e->freq * 1000;
631}
632
633u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc)
634{
635 struct ssb_bus *bus = cc->dev->bus;
636
637 switch (bus->chip_id) {
638 case 0x5354:
639 ssb_pmu_get_alp_clock_clk0(cc);
640 default:
641 ssb_printk(KERN_ERR PFX
642 "ERROR: PMU alp clock unknown for device %04X\n",
643 bus->chip_id);
644 return 0;
645 }
646}
647
648u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc)
649{
650 struct ssb_bus *bus = cc->dev->bus;
651
652 switch (bus->chip_id) {
653 case 0x5354:
654 /* 5354 chip uses a non programmable PLL of frequency 240MHz */
655 return 240000000;
656 default:
657 ssb_printk(KERN_ERR PFX
658 "ERROR: PMU cpu clock unknown for device %04X\n",
659 bus->chip_id);
660 return 0;
661 }
662}
663
664u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc)
665{
666 struct ssb_bus *bus = cc->dev->bus;
667
668 switch (bus->chip_id) {
669 case 0x5354:
670 return 120000000;
671 default:
672 ssb_printk(KERN_ERR PFX
673 "ERROR: PMU controlclock unknown for device %04X\n",
674 bus->chip_id);
675 return 0;
676 }
677}
diff --git a/drivers/ssb/driver_extif.c b/drivers/ssb/driver_extif.c
index 59385fdab5b..dc47f30e9cf 100644
--- a/drivers/ssb/driver_extif.c
+++ b/drivers/ssb/driver_extif.c
@@ -112,37 +112,10 @@ void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
112 *m = extif_read32(extif, SSB_EXTIF_CLOCK_SB); 112 *m = extif_read32(extif, SSB_EXTIF_CLOCK_SB);
113} 113}
114 114
115u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks) 115void ssb_extif_watchdog_timer_set(struct ssb_extif *extif,
116 u32 ticks)
116{ 117{
117 struct ssb_extif *extif = bcm47xx_wdt_get_drvdata(wdt);
118
119 return ssb_extif_watchdog_timer_set(extif, ticks);
120}
121
122u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms)
123{
124 struct ssb_extif *extif = bcm47xx_wdt_get_drvdata(wdt);
125 u32 ticks = (SSB_EXTIF_WATCHDOG_CLK / 1000) * ms;
126
127 ticks = ssb_extif_watchdog_timer_set(extif, ticks);
128
129 return (ticks * 1000) / SSB_EXTIF_WATCHDOG_CLK;
130}
131
132u32 ssb_extif_watchdog_timer_set(struct ssb_extif *extif, u32 ticks)
133{
134 if (ticks > SSB_EXTIF_WATCHDOG_MAX_TIMER)
135 ticks = SSB_EXTIF_WATCHDOG_MAX_TIMER;
136 extif_write32(extif, SSB_EXTIF_WATCHDOG, ticks); 118 extif_write32(extif, SSB_EXTIF_WATCHDOG, ticks);
137
138 return ticks;
139}
140
141void ssb_extif_init(struct ssb_extif *extif)
142{
143 if (!extif->dev)
144 return; /* We don't have a Extif core */
145 spin_lock_init(&extif->gpio_lock);
146} 119}
147 120
148u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask) 121u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
@@ -152,50 +125,22 @@ u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask)
152 125
153u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value) 126u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value)
154{ 127{
155 unsigned long flags; 128 return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
156 u32 res = 0;
157
158 spin_lock_irqsave(&extif->gpio_lock, flags);
159 res = extif_write32_masked(extif, SSB_EXTIF_GPIO_OUT(0),
160 mask, value); 129 mask, value);
161 spin_unlock_irqrestore(&extif->gpio_lock, flags);
162
163 return res;
164} 130}
165 131
166u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value) 132u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value)
167{ 133{
168 unsigned long flags; 134 return extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
169 u32 res = 0;
170
171 spin_lock_irqsave(&extif->gpio_lock, flags);
172 res = extif_write32_masked(extif, SSB_EXTIF_GPIO_OUTEN(0),
173 mask, value); 135 mask, value);
174 spin_unlock_irqrestore(&extif->gpio_lock, flags);
175
176 return res;
177} 136}
178 137
179u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value) 138u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value)
180{ 139{
181 unsigned long flags; 140 return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
182 u32 res = 0;
183
184 spin_lock_irqsave(&extif->gpio_lock, flags);
185 res = extif_write32_masked(extif, SSB_EXTIF_GPIO_INTPOL, mask, value);
186 spin_unlock_irqrestore(&extif->gpio_lock, flags);
187
188 return res;
189} 141}
190 142
191u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value) 143u32 ssb_extif_gpio_intmask(struct ssb_extif *extif, u32 mask, u32 value)
192{ 144{
193 unsigned long flags; 145 return extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
194 u32 res = 0;
195
196 spin_lock_irqsave(&extif->gpio_lock, flags);
197 res = extif_write32_masked(extif, SSB_EXTIF_GPIO_INTMASK, mask, value);
198 spin_unlock_irqrestore(&extif->gpio_lock, flags);
199
200 return res;
201} 146}
diff --git a/drivers/ssb/driver_gige.c b/drivers/ssb/driver_gige.c
index 21f71a1581f..3adb98dad70 100644
--- a/drivers/ssb/driver_gige.c
+++ b/drivers/ssb/driver_gige.c
@@ -10,7 +10,6 @@
10 10
11#include <linux/ssb/ssb.h> 11#include <linux/ssb/ssb.h>
12#include <linux/ssb/ssb_driver_gige.h> 12#include <linux/ssb/ssb_driver_gige.h>
13#include <linux/export.h>
14#include <linux/pci.h> 13#include <linux/pci.h>
15#include <linux/pci_regs.h> 14#include <linux/pci_regs.h>
16#include <linux/slab.h> 15#include <linux/slab.h>
@@ -107,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige *dev,
107 gige_write32(dev, SSB_GIGE_PCICFG + offset, value); 106 gige_write32(dev, SSB_GIGE_PCICFG + offset, value);
108} 107}
109 108
110static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn, 109static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus,
111 int reg, int size, u32 *val) 110 unsigned int devfn, int reg,
111 int size, u32 *val)
112{ 112{
113 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); 113 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
114 unsigned long flags; 114 unsigned long flags;
@@ -137,8 +137,9 @@ static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn,
137 return PCIBIOS_SUCCESSFUL; 137 return PCIBIOS_SUCCESSFUL;
138} 138}
139 139
140static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn, 140static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus,
141 int reg, int size, u32 val) 141 unsigned int devfn, int reg,
142 int size, u32 val)
142{ 143{
143 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops); 144 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
144 unsigned long flags; 145 unsigned long flags;
@@ -167,8 +168,8 @@ static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
167 return PCIBIOS_SUCCESSFUL; 168 return PCIBIOS_SUCCESSFUL;
168} 169}
169 170
170static int ssb_gige_probe(struct ssb_device *sdev, 171static int __devinit ssb_gige_probe(struct ssb_device *sdev,
171 const struct ssb_device_id *id) 172 const struct ssb_device_id *id)
172{ 173{
173 struct ssb_gige *dev; 174 struct ssb_gige *dev;
174 u32 base, tmslow, tmshigh; 175 u32 base, tmslow, tmshigh;
diff --git a/drivers/ssb/driver_gpio.c b/drivers/ssb/driver_gpio.c
deleted file mode 100644
index 97ac0a38e3d..00000000000
--- a/drivers/ssb/driver_gpio.c
+++ /dev/null
@@ -1,176 +0,0 @@
1/*
2 * Sonics Silicon Backplane
3 * GPIO driver
4 *
5 * Copyright 2011, Broadcom Corporation
6 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11#include <linux/gpio.h>
12#include <linux/export.h>
13#include <linux/ssb/ssb.h>
14
15#include "ssb_private.h"
16
17static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
18{
19 return container_of(chip, struct ssb_bus, gpio);
20}
21
22static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
23{
24 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
25
26 return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
27}
28
29static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio,
30 int value)
31{
32 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
33
34 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
35}
36
37static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
38 unsigned gpio)
39{
40 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
41
42 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
43 return 0;
44}
45
46static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
47 unsigned gpio, int value)
48{
49 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
50
51 ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
52 ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
53 return 0;
54}
55
56static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio)
57{
58 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
59
60 ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
61 /* clear pulldown */
62 ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
63 /* Set pullup */
64 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);
65
66 return 0;
67}
68
69static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio)
70{
71 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
72
73 /* clear pullup */
74 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
75}
76
77static int ssb_gpio_chipco_init(struct ssb_bus *bus)
78{
79 struct gpio_chip *chip = &bus->gpio;
80
81 chip->label = "ssb_chipco_gpio";
82 chip->owner = THIS_MODULE;
83 chip->request = ssb_gpio_chipco_request;
84 chip->free = ssb_gpio_chipco_free;
85 chip->get = ssb_gpio_chipco_get_value;
86 chip->set = ssb_gpio_chipco_set_value;
87 chip->direction_input = ssb_gpio_chipco_direction_input;
88 chip->direction_output = ssb_gpio_chipco_direction_output;
89 chip->ngpio = 16;
90 /* There is just one SoC in one device and its GPIO addresses should be
91 * deterministic to address them more easily. The other buses could get
92 * a random base number. */
93 if (bus->bustype == SSB_BUSTYPE_SSB)
94 chip->base = 0;
95 else
96 chip->base = -1;
97
98 return gpiochip_add(chip);
99}
100
101#ifdef CONFIG_SSB_DRIVER_EXTIF
102
103static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
104{
105 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
106
107 return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
108}
109
110static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio,
111 int value)
112{
113 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
114
115 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
116}
117
118static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
119 unsigned gpio)
120{
121 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
122
123 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
124 return 0;
125}
126
127static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
128 unsigned gpio, int value)
129{
130 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
131
132 ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
133 ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
134 return 0;
135}
136
137static int ssb_gpio_extif_init(struct ssb_bus *bus)
138{
139 struct gpio_chip *chip = &bus->gpio;
140
141 chip->label = "ssb_extif_gpio";
142 chip->owner = THIS_MODULE;
143 chip->get = ssb_gpio_extif_get_value;
144 chip->set = ssb_gpio_extif_set_value;
145 chip->direction_input = ssb_gpio_extif_direction_input;
146 chip->direction_output = ssb_gpio_extif_direction_output;
147 chip->ngpio = 5;
148 /* There is just one SoC in one device and its GPIO addresses should be
149 * deterministic to address them more easily. The other buses could get
150 * a random base number. */
151 if (bus->bustype == SSB_BUSTYPE_SSB)
152 chip->base = 0;
153 else
154 chip->base = -1;
155
156 return gpiochip_add(chip);
157}
158
159#else
160static int ssb_gpio_extif_init(struct ssb_bus *bus)
161{
162 return -ENOTSUPP;
163}
164#endif
165
166int ssb_gpio_init(struct ssb_bus *bus)
167{
168 if (ssb_chipco_available(&bus->chipco))
169 return ssb_gpio_chipco_init(bus);
170 else if (ssb_extif_available(&bus->extif))
171 return ssb_gpio_extif_init(bus);
172 else
173 SSB_WARN_ON(1);
174
175 return -1;
176}
diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c
index 5bd05b136d2..ced50156859 100644
--- a/drivers/ssb/driver_mipscore.c
+++ b/drivers/ssb/driver_mipscore.c
@@ -178,9 +178,9 @@ static void ssb_mips_serial_init(struct ssb_mipscore *mcore)
178{ 178{
179 struct ssb_bus *bus = mcore->dev->bus; 179 struct ssb_bus *bus = mcore->dev->bus;
180 180
181 if (ssb_extif_available(&bus->extif)) 181 if (bus->extif.dev)
182 mcore->nr_serial_ports = ssb_extif_serial_init(&bus->extif, mcore->serial_ports); 182 mcore->nr_serial_ports = ssb_extif_serial_init(&bus->extif, mcore->serial_ports);
183 else if (ssb_chipco_available(&bus->chipco)) 183 else if (bus->chipco.dev)
184 mcore->nr_serial_ports = ssb_chipco_serial_init(&bus->chipco, mcore->serial_ports); 184 mcore->nr_serial_ports = ssb_chipco_serial_init(&bus->chipco, mcore->serial_ports);
185 else 185 else
186 mcore->nr_serial_ports = 0; 186 mcore->nr_serial_ports = 0;
@@ -190,32 +190,16 @@ static void ssb_mips_flash_detect(struct ssb_mipscore *mcore)
190{ 190{
191 struct ssb_bus *bus = mcore->dev->bus; 191 struct ssb_bus *bus = mcore->dev->bus;
192 192
193 /* When there is no chipcommon on the bus there is 4MB flash */ 193 mcore->flash_buswidth = 2;
194 if (!ssb_chipco_available(&bus->chipco)) { 194 if (bus->chipco.dev) {
195 mcore->pflash.present = true; 195 mcore->flash_window = 0x1c000000;
196 mcore->pflash.buswidth = 2; 196 mcore->flash_window_size = 0x02000000;
197 mcore->pflash.window = SSB_FLASH1;
198 mcore->pflash.window_size = SSB_FLASH1_SZ;
199 return;
200 }
201
202 /* There is ChipCommon, so use it to read info about flash */
203 switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
204 case SSB_CHIPCO_FLASHT_STSER:
205 case SSB_CHIPCO_FLASHT_ATSER:
206 pr_err("Serial flash not supported\n");
207 break;
208 case SSB_CHIPCO_FLASHT_PARA:
209 pr_debug("Found parallel flash\n");
210 mcore->pflash.present = true;
211 mcore->pflash.window = SSB_FLASH2;
212 mcore->pflash.window_size = SSB_FLASH2_SZ;
213 if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG) 197 if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
214 & SSB_CHIPCO_CFG_DS16) == 0) 198 & SSB_CHIPCO_CFG_DS16) == 0)
215 mcore->pflash.buswidth = 1; 199 mcore->flash_buswidth = 1;
216 else 200 } else {
217 mcore->pflash.buswidth = 2; 201 mcore->flash_window = 0x1fc00000;
218 break; 202 mcore->flash_window_size = 0x00400000;
219 } 203 }
220} 204}
221 205
@@ -224,12 +208,9 @@ u32 ssb_cpu_clock(struct ssb_mipscore *mcore)
224 struct ssb_bus *bus = mcore->dev->bus; 208 struct ssb_bus *bus = mcore->dev->bus;
225 u32 pll_type, n, m, rate = 0; 209 u32 pll_type, n, m, rate = 0;
226 210
227 if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU) 211 if (bus->extif.dev) {
228 return ssb_pmu_get_cpu_clock(&bus->chipco);
229
230 if (ssb_extif_available(&bus->extif)) {
231 ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m); 212 ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m);
232 } else if (ssb_chipco_available(&bus->chipco)) { 213 } else if (bus->chipco.dev) {
233 ssb_chipco_get_clockcpu(&bus->chipco, &pll_type, &n, &m); 214 ssb_chipco_get_clockcpu(&bus->chipco, &pll_type, &n, &m);
234 } else 215 } else
235 return 0; 216 return 0;
@@ -265,9 +246,9 @@ void ssb_mipscore_init(struct ssb_mipscore *mcore)
265 hz = 100000000; 246 hz = 100000000;
266 ns = 1000000000 / hz; 247 ns = 1000000000 / hz;
267 248
268 if (ssb_extif_available(&bus->extif)) 249 if (bus->extif.dev)
269 ssb_extif_timing_init(&bus->extif, ns); 250 ssb_extif_timing_init(&bus->extif, ns);
270 else if (ssb_chipco_available(&bus->chipco)) 251 else if (bus->chipco.dev)
271 ssb_chipco_timing_init(&bus->chipco, ns); 252 ssb_chipco_timing_init(&bus->chipco, ns);
272 253
273 /* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */ 254 /* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c
index 59801d23d7e..32c535f5ce3 100644
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
@@ -10,7 +10,6 @@
10 10
11#include <linux/ssb/ssb.h> 11#include <linux/ssb/ssb.h>
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/export.h>
14#include <linux/delay.h> 13#include <linux/delay.h>
15#include <linux/ssb/ssb_embedded.h> 14#include <linux/ssb/ssb_embedded.h>
16 15
@@ -75,7 +74,7 @@ static u32 get_cfgspace_addr(struct ssb_pcicore *pc,
75 u32 tmp; 74 u32 tmp;
76 75
77 /* We do only have one cardbus device behind the bridge. */ 76 /* We do only have one cardbus device behind the bridge. */
78 if (pc->cardbusmode && (dev > 1)) 77 if (pc->cardbusmode && (dev >= 1))
79 goto out; 78 goto out;
80 79
81 if (bus == 0) { 80 if (bus == 0) {
@@ -315,7 +314,7 @@ int ssb_pcicore_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
315 return ssb_mips_irq(extpci_core->dev) + 2; 314 return ssb_mips_irq(extpci_core->dev) + 2;
316} 315}
317 316
318static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc) 317static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
319{ 318{
320 u32 val; 319 u32 val;
321 320
@@ -380,7 +379,7 @@ static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
380 register_pci_controller(&ssb_pcicore_controller); 379 register_pci_controller(&ssb_pcicore_controller);
381} 380}
382 381
383static int pcicore_is_in_hostmode(struct ssb_pcicore *pc) 382static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc)
384{ 383{
385 struct ssb_bus *bus = pc->dev->bus; 384 struct ssb_bus *bus = pc->dev->bus;
386 u16 chipid_top; 385 u16 chipid_top;
@@ -413,7 +412,7 @@ static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
413 * Workarounds. 412 * Workarounds.
414 **************************************************/ 413 **************************************************/
415 414
416static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc) 415static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
417{ 416{
418 u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0)); 417 u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0));
419 if (((tmp & 0xF000) >> 12) != pc->dev->core_index) { 418 if (((tmp & 0xF000) >> 12) != pc->dev->core_index) {
@@ -515,7 +514,7 @@ static void ssb_pcicore_pcie_setup_workarounds(struct ssb_pcicore *pc)
515 * Generic and Clientmode operation code. 514 * Generic and Clientmode operation code.
516 **************************************************/ 515 **************************************************/
517 516
518static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) 517static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
519{ 518{
520 struct ssb_device *pdev = pc->dev; 519 struct ssb_device *pdev = pc->dev;
521 struct ssb_bus *bus = pdev->bus; 520 struct ssb_bus *bus = pdev->bus;
@@ -534,7 +533,7 @@ static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
534 } 533 }
535} 534}
536 535
537void ssb_pcicore_init(struct ssb_pcicore *pc) 536void __devinit ssb_pcicore_init(struct ssb_pcicore *pc)
538{ 537{
539 struct ssb_device *dev = pc->dev; 538 struct ssb_device *dev = pc->dev;
540 539
diff --git a/drivers/ssb/embedded.c b/drivers/ssb/embedded.c
index bb18d76f9f2..eec3e267be4 100644
--- a/drivers/ssb/embedded.c
+++ b/drivers/ssb/embedded.c
@@ -4,13 +4,10 @@
4 * 4 *
5 * Copyright 2005-2008, Broadcom Corporation 5 * Copyright 2005-2008, Broadcom Corporation
6 * Copyright 2006-2008, Michael Buesch <m@bues.ch> 6 * Copyright 2006-2008, Michael Buesch <m@bues.ch>
7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
8 * 7 *
9 * Licensed under the GNU/GPL. See COPYING for details. 8 * Licensed under the GNU/GPL. See COPYING for details.
10 */ 9 */
11 10
12#include <linux/export.h>
13#include <linux/platform_device.h>
14#include <linux/ssb/ssb.h> 11#include <linux/ssb/ssb.h>
15#include <linux/ssb/ssb_embedded.h> 12#include <linux/ssb/ssb_embedded.h>
16#include <linux/ssb/ssb_driver_pci.h> 13#include <linux/ssb/ssb_driver_pci.h>
@@ -34,39 +31,6 @@ int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
34} 31}
35EXPORT_SYMBOL(ssb_watchdog_timer_set); 32EXPORT_SYMBOL(ssb_watchdog_timer_set);
36 33
37int ssb_watchdog_register(struct ssb_bus *bus)
38{
39 struct bcm47xx_wdt wdt = {};
40 struct platform_device *pdev;
41
42 if (ssb_chipco_available(&bus->chipco)) {
43 wdt.driver_data = &bus->chipco;
44 wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt;
45 wdt.timer_set_ms = ssb_chipco_watchdog_timer_set_ms;
46 wdt.max_timer_ms = bus->chipco.max_timer_ms;
47 } else if (ssb_extif_available(&bus->extif)) {
48 wdt.driver_data = &bus->extif;
49 wdt.timer_set = ssb_extif_watchdog_timer_set_wdt;
50 wdt.timer_set_ms = ssb_extif_watchdog_timer_set_ms;
51 wdt.max_timer_ms = SSB_EXTIF_WATCHDOG_MAX_TIMER_MS;
52 } else {
53 return -ENODEV;
54 }
55
56 pdev = platform_device_register_data(NULL, "bcm47xx-wdt",
57 bus->busnumber, &wdt,
58 sizeof(wdt));
59 if (IS_ERR(pdev)) {
60 ssb_dprintk(KERN_INFO PFX
61 "can not register watchdog device, err: %li\n",
62 PTR_ERR(pdev));
63 return PTR_ERR(pdev);
64 }
65
66 bus->watchdog = pdev;
67 return 0;
68}
69
70u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask) 34u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask)
71{ 35{
72 unsigned long flags; 36 unsigned long flags;
diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
index 772ad9b5c30..29c7d4f9d1a 100644
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
@@ -12,8 +12,6 @@
12 12
13#include <linux/delay.h> 13#include <linux/delay.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/ssb/ssb.h> 15#include <linux/ssb/ssb.h>
18#include <linux/ssb/ssb_regs.h> 16#include <linux/ssb/ssb_regs.h>
19#include <linux/ssb/ssb_driver_gige.h> 17#include <linux/ssb/ssb_driver_gige.h>
@@ -141,6 +139,19 @@ static void ssb_device_put(struct ssb_device *dev)
141 put_device(dev->dev); 139 put_device(dev->dev);
142} 140}
143 141
142static inline struct ssb_driver *ssb_driver_get(struct ssb_driver *drv)
143{
144 if (drv)
145 get_driver(&drv->drv);
146 return drv;
147}
148
149static inline void ssb_driver_put(struct ssb_driver *drv)
150{
151 if (drv)
152 put_driver(&drv->drv);
153}
154
144static int ssb_device_resume(struct device *dev) 155static int ssb_device_resume(struct device *dev)
145{ 156{
146 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev); 157 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
@@ -238,9 +249,11 @@ int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx)
238 ssb_device_put(sdev); 249 ssb_device_put(sdev);
239 continue; 250 continue;
240 } 251 }
241 sdrv = drv_to_ssb_drv(sdev->dev->driver); 252 sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver));
242 if (SSB_WARN_ON(!sdrv->remove)) 253 if (!sdrv || SSB_WARN_ON(!sdrv->remove)) {
254 ssb_device_put(sdev);
243 continue; 255 continue;
256 }
244 sdrv->remove(sdev); 257 sdrv->remove(sdev);
245 ctx->device_frozen[i] = 1; 258 ctx->device_frozen[i] = 1;
246 } 259 }
@@ -279,6 +292,7 @@ int ssb_devices_thaw(struct ssb_freeze_context *ctx)
279 dev_name(sdev->dev)); 292 dev_name(sdev->dev));
280 result = err; 293 result = err;
281 } 294 }
295 ssb_driver_put(sdrv);
282 ssb_device_put(sdev); 296 ssb_device_put(sdev);
283 } 297 }
284 298
@@ -434,11 +448,6 @@ static void ssb_devices_unregister(struct ssb_bus *bus)
434 if (sdev->dev) 448 if (sdev->dev)
435 device_unregister(sdev->dev); 449 device_unregister(sdev->dev);
436 } 450 }
437
438#ifdef CONFIG_SSB_EMBEDDED
439 if (bus->bustype == SSB_BUSTYPE_SSB)
440 platform_device_unregister(bus->watchdog);
441#endif
442} 451}
443 452
444void ssb_bus_unregister(struct ssb_bus *bus) 453void ssb_bus_unregister(struct ssb_bus *bus)
@@ -548,7 +557,7 @@ error:
548} 557}
549 558
550/* Needs ssb_buses_lock() */ 559/* Needs ssb_buses_lock() */
551static int ssb_attach_queued_buses(void) 560static int __devinit ssb_attach_queued_buses(void)
552{ 561{
553 struct ssb_bus *bus, *n; 562 struct ssb_bus *bus, *n;
554 int err = 0; 563 int err = 0;
@@ -567,8 +576,6 @@ static int ssb_attach_queued_buses(void)
567 if (err) 576 if (err)
568 goto error; 577 goto error;
569 ssb_pcicore_init(&bus->pcicore); 578 ssb_pcicore_init(&bus->pcicore);
570 if (bus->bustype == SSB_BUSTYPE_SSB)
571 ssb_watchdog_register(bus);
572 ssb_bus_may_powerdown(bus); 579 ssb_bus_may_powerdown(bus);
573 580
574 err = ssb_devices_register(bus); 581 err = ssb_devices_register(bus);
@@ -761,9 +768,9 @@ out:
761 return err; 768 return err;
762} 769}
763 770
764static int ssb_bus_register(struct ssb_bus *bus, 771static int __devinit ssb_bus_register(struct ssb_bus *bus,
765 ssb_invariants_func_t get_invariants, 772 ssb_invariants_func_t get_invariants,
766 unsigned long baseaddr) 773 unsigned long baseaddr)
767{ 774{
768 int err; 775 int err;
769 776
@@ -804,14 +811,7 @@ static int ssb_bus_register(struct ssb_bus *bus,
804 if (err) 811 if (err)
805 goto err_pcmcia_exit; 812 goto err_pcmcia_exit;
806 ssb_chipcommon_init(&bus->chipco); 813 ssb_chipcommon_init(&bus->chipco);
807 ssb_extif_init(&bus->extif);
808 ssb_mipscore_init(&bus->mipscore); 814 ssb_mipscore_init(&bus->mipscore);
809 err = ssb_gpio_init(bus);
810 if (err == -ENOTSUPP)
811 ssb_dprintk(KERN_DEBUG PFX "GPIO driver not activated\n");
812 else if (err)
813 ssb_dprintk(KERN_ERR PFX
814 "Error registering GPIO driver: %i\n", err);
815 err = ssb_fetch_invariants(bus, get_invariants); 815 err = ssb_fetch_invariants(bus, get_invariants);
816 if (err) { 816 if (err) {
817 ssb_bus_may_powerdown(bus); 817 ssb_bus_may_powerdown(bus);
@@ -851,7 +851,8 @@ err_disable_xtal:
851} 851}
852 852
853#ifdef CONFIG_SSB_PCIHOST 853#ifdef CONFIG_SSB_PCIHOST
854int ssb_bus_pcibus_register(struct ssb_bus *bus, struct pci_dev *host_pci) 854int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus,
855 struct pci_dev *host_pci)
855{ 856{
856 int err; 857 int err;
857 858
@@ -874,9 +875,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
874#endif /* CONFIG_SSB_PCIHOST */ 875#endif /* CONFIG_SSB_PCIHOST */
875 876
876#ifdef CONFIG_SSB_PCMCIAHOST 877#ifdef CONFIG_SSB_PCMCIAHOST
877int ssb_bus_pcmciabus_register(struct ssb_bus *bus, 878int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus,
878 struct pcmcia_device *pcmcia_dev, 879 struct pcmcia_device *pcmcia_dev,
879 unsigned long baseaddr) 880 unsigned long baseaddr)
880{ 881{
881 int err; 882 int err;
882 883
@@ -896,8 +897,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
896#endif /* CONFIG_SSB_PCMCIAHOST */ 897#endif /* CONFIG_SSB_PCMCIAHOST */
897 898
898#ifdef CONFIG_SSB_SDIOHOST 899#ifdef CONFIG_SSB_SDIOHOST
899int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func, 900int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus,
900 unsigned int quirks) 901 struct sdio_func *func,
902 unsigned int quirks)
901{ 903{
902 int err; 904 int err;
903 905
@@ -917,8 +919,9 @@ int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
917EXPORT_SYMBOL(ssb_bus_sdiobus_register); 919EXPORT_SYMBOL(ssb_bus_sdiobus_register);
918#endif /* CONFIG_SSB_PCMCIAHOST */ 920#endif /* CONFIG_SSB_PCMCIAHOST */
919 921
920int ssb_bus_ssbbus_register(struct ssb_bus *bus, unsigned long baseaddr, 922int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus,
921 ssb_invariants_func_t get_invariants) 923 unsigned long baseaddr,
924 ssb_invariants_func_t get_invariants)
922{ 925{
923 int err; 926 int err;
924 927
@@ -1090,9 +1093,6 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
1090 u32 plltype; 1093 u32 plltype;
1091 u32 clkctl_n, clkctl_m; 1094 u32 clkctl_n, clkctl_m;
1092 1095
1093 if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
1094 return ssb_pmu_get_controlclock(&bus->chipco);
1095
1096 if (ssb_extif_available(&bus->extif)) 1096 if (ssb_extif_available(&bus->extif))
1097 ssb_extif_get_clockcontrol(&bus->extif, &plltype, 1097 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1098 &clkctl_n, &clkctl_m); 1098 &clkctl_n, &clkctl_m);
@@ -1130,7 +1130,8 @@ static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1130 case SSB_IDLOW_SSBREV_27: /* same here */ 1130 case SSB_IDLOW_SSBREV_27: /* same here */
1131 return SSB_TMSLOW_REJECT; /* this is a guess */ 1131 return SSB_TMSLOW_REJECT; /* this is a guess */
1132 default: 1132 default:
1133 WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev); 1133 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1134 WARN_ON(1);
1134 } 1135 }
1135 return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23); 1136 return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
1136} 1137}
@@ -1259,34 +1260,16 @@ void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1259} 1260}
1260EXPORT_SYMBOL(ssb_device_disable); 1261EXPORT_SYMBOL(ssb_device_disable);
1261 1262
1262/* Some chipsets need routing known for PCIe and 64-bit DMA */
1263static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
1264{
1265 u16 chip_id = dev->bus->chip_id;
1266
1267 if (dev->id.coreid == SSB_DEV_80211) {
1268 return (chip_id == 0x4322 || chip_id == 43221 ||
1269 chip_id == 43231 || chip_id == 43222);
1270 }
1271
1272 return 0;
1273}
1274
1275u32 ssb_dma_translation(struct ssb_device *dev) 1263u32 ssb_dma_translation(struct ssb_device *dev)
1276{ 1264{
1277 switch (dev->bus->bustype) { 1265 switch (dev->bus->bustype) {
1278 case SSB_BUSTYPE_SSB: 1266 case SSB_BUSTYPE_SSB:
1279 return 0; 1267 return 0;
1280 case SSB_BUSTYPE_PCI: 1268 case SSB_BUSTYPE_PCI:
1281 if (pci_is_pcie(dev->bus->host_pci) && 1269 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64)
1282 ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
1283 return SSB_PCIE_DMA_H32; 1270 return SSB_PCIE_DMA_H32;
1284 } else { 1271 else
1285 if (ssb_dma_translation_special_bit(dev)) 1272 return SSB_PCI_DMA;
1286 return SSB_PCIE_DMA_H32;
1287 else
1288 return SSB_PCI_DMA;
1289 }
1290 default: 1273 default:
1291 __ssb_dma_not_implemented(dev); 1274 __ssb_dma_not_implemented(dev);
1292 } 1275 }
diff --git a/drivers/ssb/pci.c b/drivers/ssb/pci.c
index e9d94968f39..34c3bab90b9 100644
--- a/drivers/ssb/pci.c
+++ b/drivers/ssb/pci.c
@@ -178,18 +178,6 @@ err_pci:
178#define SPEX(_outvar, _offset, _mask, _shift) \ 178#define SPEX(_outvar, _offset, _mask, _shift) \
179 SPEX16(_outvar, _offset, _mask, _shift) 179 SPEX16(_outvar, _offset, _mask, _shift)
180 180
181#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
182 do { \
183 SPEX(_field[0], _offset + 0, _mask, _shift); \
184 SPEX(_field[1], _offset + 2, _mask, _shift); \
185 SPEX(_field[2], _offset + 4, _mask, _shift); \
186 SPEX(_field[3], _offset + 6, _mask, _shift); \
187 SPEX(_field[4], _offset + 8, _mask, _shift); \
188 SPEX(_field[5], _offset + 10, _mask, _shift); \
189 SPEX(_field[6], _offset + 12, _mask, _shift); \
190 SPEX(_field[7], _offset + 14, _mask, _shift); \
191 } while (0)
192
193 181
194static inline u8 ssb_crc8(u8 crc, u8 data) 182static inline u8 ssb_crc8(u8 crc, u8 data)
195{ 183{
@@ -343,6 +331,7 @@ static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
343{ 331{
344 int i; 332 int i;
345 u16 v; 333 u16 v;
334 s8 gain;
346 u16 loc[3]; 335 u16 loc[3];
347 336
348 if (out->revision == 3) /* rev 3 moved MAC */ 337 if (out->revision == 3) /* rev 3 moved MAC */
@@ -372,9 +361,8 @@ static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
372 SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14); 361 SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
373 SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15); 362 SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
374 SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0); 363 SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
375 if (out->revision == 1) 364 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
376 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE, 365 SSB_SPROM1_BINF_CCODE_SHIFT);
377 SSB_SPROM1_BINF_CCODE_SHIFT);
378 SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA, 366 SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
379 SSB_SPROM1_BINF_ANTA_SHIFT); 367 SSB_SPROM1_BINF_ANTA_SHIFT);
380 SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG, 368 SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
@@ -400,16 +388,22 @@ static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
400 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0); 388 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
401 if (out->revision >= 2) 389 if (out->revision >= 2)
402 SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0); 390 SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
403 SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
404 SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
405 391
406 /* Extract the antenna gain values. */ 392 /* Extract the antenna gain values. */
407 out->antenna_gain.a0 = r123_extract_antgain(out->revision, in, 393 gain = r123_extract_antgain(out->revision, in,
408 SSB_SPROM1_AGAIN_BG, 394 SSB_SPROM1_AGAIN_BG,
409 SSB_SPROM1_AGAIN_BG_SHIFT); 395 SSB_SPROM1_AGAIN_BG_SHIFT);
410 out->antenna_gain.a1 = r123_extract_antgain(out->revision, in, 396 out->antenna_gain.ghz24.a0 = gain;
411 SSB_SPROM1_AGAIN_A, 397 out->antenna_gain.ghz24.a1 = gain;
412 SSB_SPROM1_AGAIN_A_SHIFT); 398 out->antenna_gain.ghz24.a2 = gain;
399 out->antenna_gain.ghz24.a3 = gain;
400 gain = r123_extract_antgain(out->revision, in,
401 SSB_SPROM1_AGAIN_A,
402 SSB_SPROM1_AGAIN_A_SHIFT);
403 out->antenna_gain.ghz5.a0 = gain;
404 out->antenna_gain.ghz5.a1 = gain;
405 out->antenna_gain.ghz5.a2 = gain;
406 out->antenna_gain.ghz5.a3 = gain;
413} 407}
414 408
415/* Revs 4 5 and 8 have partially shared layout */ 409/* Revs 4 5 and 8 have partially shared layout */
@@ -470,17 +464,14 @@ static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
470 SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0); 464 SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
471 SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A, 465 SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
472 SSB_SPROM4_ETHPHY_ET1A_SHIFT); 466 SSB_SPROM4_ETHPHY_ET1A_SHIFT);
473 SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
474 if (out->revision == 4) { 467 if (out->revision == 4) {
475 SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8); 468 SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
476 SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
477 SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0); 469 SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
478 SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0); 470 SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
479 SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0); 471 SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
480 SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0); 472 SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
481 } else { 473 } else {
482 SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8); 474 SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0);
483 SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
484 SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0); 475 SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
485 SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0); 476 SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
486 SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0); 477 SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
@@ -513,14 +504,16 @@ static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
513 } 504 }
514 505
515 /* Extract the antenna gain values. */ 506 /* Extract the antenna gain values. */
516 SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01, 507 SPEX(antenna_gain.ghz24.a0, SSB_SPROM4_AGAIN01,
517 SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT); 508 SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
518 SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01, 509 SPEX(antenna_gain.ghz24.a1, SSB_SPROM4_AGAIN01,
519 SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT); 510 SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
520 SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23, 511 SPEX(antenna_gain.ghz24.a2, SSB_SPROM4_AGAIN23,
521 SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT); 512 SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
522 SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23, 513 SPEX(antenna_gain.ghz24.a3, SSB_SPROM4_AGAIN23,
523 SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT); 514 SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
515 memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
516 sizeof(out->antenna_gain.ghz5));
524 517
525 sprom_extract_r458(out, in); 518 sprom_extract_r458(out, in);
526 519
@@ -530,22 +523,14 @@ static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
530static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in) 523static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
531{ 524{
532 int i; 525 int i;
533 u16 v, o; 526 u16 v;
534 u16 pwr_info_offset[] = {
535 SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
536 SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
537 };
538 BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
539 ARRAY_SIZE(out->core_pwr_info));
540 527
541 /* extract the MAC address */ 528 /* extract the MAC address */
542 for (i = 0; i < 3; i++) { 529 for (i = 0; i < 3; i++) {
543 v = in[SPOFF(SSB_SPROM8_IL0MAC) + i]; 530 v = in[SPOFF(SSB_SPROM8_IL0MAC) + i];
544 *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v); 531 *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
545 } 532 }
546 SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0); 533 SPEX(country_code, SSB_SPROM8_CCODE, 0xFFFF, 0);
547 SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
548 SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
549 SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0); 534 SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
550 SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0); 535 SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
551 SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0); 536 SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
@@ -611,127 +596,17 @@ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
611 SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0); 596 SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
612 597
613 /* Extract the antenna gain values. */ 598 /* Extract the antenna gain values. */
614 SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01, 599 SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01,
615 SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT); 600 SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
616 SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01, 601 SPEX(antenna_gain.ghz24.a1, SSB_SPROM8_AGAIN01,
617 SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT); 602 SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
618 SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23, 603 SPEX(antenna_gain.ghz24.a2, SSB_SPROM8_AGAIN23,
619 SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); 604 SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
620 SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, 605 SPEX(antenna_gain.ghz24.a3, SSB_SPROM8_AGAIN23,
621 SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); 606 SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
607 memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
608 sizeof(out->antenna_gain.ghz5));
622 609
623 /* Extract cores power info info */
624 for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
625 o = pwr_info_offset[i];
626 SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
627 SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
628 SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
629 SSB_SPROM8_2G_MAXP, 0);
630
631 SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
632 SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
633 SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
634
635 SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
636 SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
637 SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
638 SSB_SPROM8_5G_MAXP, 0);
639 SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
640 SSB_SPROM8_5GH_MAXP, 0);
641 SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
642 SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
643
644 SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
645 SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
646 SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
647 SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
648 SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
649 SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
650 SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
651 SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
652 SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
653 }
654
655 /* Extract FEM info */
656 SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
657 SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
658 SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
659 SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
660 SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
661 SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
662 SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
663 SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
664 SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
665 SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
666
667 SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
668 SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
669 SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
670 SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
671 SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
672 SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
673 SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
674 SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
675 SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
676 SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
677
678 SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
679 SSB_SPROM8_LEDDC_ON_SHIFT);
680 SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
681 SSB_SPROM8_LEDDC_OFF_SHIFT);
682
683 SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
684 SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
685 SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
686 SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
687 SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
688 SSB_SPROM8_TXRXC_SWITCH_SHIFT);
689
690 SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
691
692 SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
693 SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
694 SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
695 SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
696
697 SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
698 SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
699 SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
700 SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
701 SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
702 SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
703 SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
704 SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
705 SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
706 SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
707 SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
708 SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
709 SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
710 SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
711 SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
712 SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
713 SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
714 SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
715 SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
716 SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
717
718 SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
719 SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
720 SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
721 SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
722
723 SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
724 SSB_SPROM8_THERMAL_TRESH_SHIFT);
725 SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
726 SSB_SPROM8_THERMAL_OFFSET_SHIFT);
727 SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
728 SSB_SPROM8_TEMPDELTA_PHYCAL,
729 SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
730 SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
731 SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
732 SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
733 SSB_SPROM8_TEMPDELTA_HYSTERESIS,
734 SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
735 sprom_extract_r458(out, in); 610 sprom_extract_r458(out, in);
736 611
737 /* TODO - get remaining rev 8 stuff needed */ 612 /* TODO - get remaining rev 8 stuff needed */
@@ -861,6 +736,7 @@ static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
861{ 736{
862 bi->vendor = bus->host_pci->subsystem_vendor; 737 bi->vendor = bus->host_pci->subsystem_vendor;
863 bi->type = bus->host_pci->subsystem_device; 738 bi->type = bus->host_pci->subsystem_device;
739 bi->rev = bus->host_pci->revision;
864} 740}
865 741
866int ssb_pci_get_invariants(struct ssb_bus *bus, 742int ssb_pci_get_invariants(struct ssb_bus *bus,
diff --git a/drivers/ssb/pcihost_wrapper.c b/drivers/ssb/pcihost_wrapper.c
index 32ed1fa4a82..116a8116984 100644
--- a/drivers/ssb/pcihost_wrapper.c
+++ b/drivers/ssb/pcihost_wrapper.c
@@ -12,7 +12,6 @@
12 */ 12 */
13 13
14#include <linux/pci.h> 14#include <linux/pci.h>
15#include <linux/export.h>
16#include <linux/slab.h> 15#include <linux/slab.h>
17#include <linux/ssb/ssb.h> 16#include <linux/ssb/ssb.h>
18 17
@@ -54,8 +53,8 @@ static int ssb_pcihost_resume(struct pci_dev *dev)
54# define ssb_pcihost_resume NULL 53# define ssb_pcihost_resume NULL
55#endif /* CONFIG_PM */ 54#endif /* CONFIG_PM */
56 55
57static int ssb_pcihost_probe(struct pci_dev *dev, 56static int __devinit ssb_pcihost_probe(struct pci_dev *dev,
58 const struct pci_device_id *id) 57 const struct pci_device_id *id)
59{ 58{
60 struct ssb_bus *ssb; 59 struct ssb_bus *ssb;
61 int err = -ENOMEM; 60 int err = -ENOMEM;
@@ -111,7 +110,7 @@ static void ssb_pcihost_remove(struct pci_dev *dev)
111 pci_set_drvdata(dev, NULL); 110 pci_set_drvdata(dev, NULL);
112} 111}
113 112
114int ssb_pcihost_register(struct pci_driver *driver) 113int __devinit ssb_pcihost_register(struct pci_driver *driver)
115{ 114{
116 driver->probe = ssb_pcihost_probe; 115 driver->probe = ssb_pcihost_probe;
117 driver->remove = ssb_pcihost_remove; 116 driver->remove = ssb_pcihost_remove;
diff --git a/drivers/ssb/pcmcia.c b/drivers/ssb/pcmcia.c
index fbafed5b729..c821c6b2a6a 100644
--- a/drivers/ssb/pcmcia.c
+++ b/drivers/ssb/pcmcia.c
@@ -676,10 +676,14 @@ static int ssb_pcmcia_do_get_invariants(struct pcmcia_device *p_dev,
676 case SSB_PCMCIA_CIS_ANTGAIN: 676 case SSB_PCMCIA_CIS_ANTGAIN:
677 GOTO_ERROR_ON(tuple->TupleDataLen != 2, 677 GOTO_ERROR_ON(tuple->TupleDataLen != 2,
678 "antg tpl size"); 678 "antg tpl size");
679 sprom->antenna_gain.a0 = tuple->TupleData[1]; 679 sprom->antenna_gain.ghz24.a0 = tuple->TupleData[1];
680 sprom->antenna_gain.a1 = tuple->TupleData[1]; 680 sprom->antenna_gain.ghz24.a1 = tuple->TupleData[1];
681 sprom->antenna_gain.a2 = tuple->TupleData[1]; 681 sprom->antenna_gain.ghz24.a2 = tuple->TupleData[1];
682 sprom->antenna_gain.a3 = tuple->TupleData[1]; 682 sprom->antenna_gain.ghz24.a3 = tuple->TupleData[1];
683 sprom->antenna_gain.ghz5.a0 = tuple->TupleData[1];
684 sprom->antenna_gain.ghz5.a1 = tuple->TupleData[1];
685 sprom->antenna_gain.ghz5.a2 = tuple->TupleData[1];
686 sprom->antenna_gain.ghz5.a3 = tuple->TupleData[1];
683 break; 687 break;
684 case SSB_PCMCIA_CIS_BFLAGS: 688 case SSB_PCMCIA_CIS_BFLAGS:
685 GOTO_ERROR_ON((tuple->TupleDataLen != 3) && 689 GOTO_ERROR_ON((tuple->TupleDataLen != 3) &&
diff --git a/drivers/ssb/scan.c b/drivers/ssb/scan.c
index ab4627cf111..3e844874631 100644
--- a/drivers/ssb/scan.c
+++ b/drivers/ssb/scan.c
@@ -90,8 +90,6 @@ const char *ssb_core_name(u16 coreid)
90 return "ARM 1176"; 90 return "ARM 1176";
91 case SSB_DEV_ARM_7TDMI: 91 case SSB_DEV_ARM_7TDMI:
92 return "ARM 7TDMI"; 92 return "ARM 7TDMI";
93 case SSB_DEV_ARM_CM3:
94 return "ARM Cortex M3";
95 } 93 }
96 return "UNKNOWN"; 94 return "UNKNOWN";
97} 95}
@@ -320,9 +318,6 @@ int ssb_bus_scan(struct ssb_bus *bus,
320 bus->chip_package = 0; 318 bus->chip_package = 0;
321 } 319 }
322 } 320 }
323 ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and "
324 "package 0x%02X\n", bus->chip_id, bus->chip_rev,
325 bus->chip_package);
326 if (!bus->nr_devices) 321 if (!bus->nr_devices)
327 bus->nr_devices = chipid_to_nrcores(bus->chip_id); 322 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
328 if (bus->nr_devices > ARRAY_SIZE(bus->devices)) { 323 if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
diff --git a/drivers/ssb/sdio.c b/drivers/ssb/sdio.c
index b2d36f7736c..63fd709038c 100644
--- a/drivers/ssb/sdio.c
+++ b/drivers/ssb/sdio.c
@@ -551,10 +551,14 @@ int ssb_sdio_get_invariants(struct ssb_bus *bus,
551 case SSB_SDIO_CIS_ANTGAIN: 551 case SSB_SDIO_CIS_ANTGAIN:
552 GOTO_ERROR_ON(tuple->size != 2, 552 GOTO_ERROR_ON(tuple->size != 2,
553 "antg tpl size"); 553 "antg tpl size");
554 sprom->antenna_gain.a0 = tuple->data[1]; 554 sprom->antenna_gain.ghz24.a0 = tuple->data[1];
555 sprom->antenna_gain.a1 = tuple->data[1]; 555 sprom->antenna_gain.ghz24.a1 = tuple->data[1];
556 sprom->antenna_gain.a2 = tuple->data[1]; 556 sprom->antenna_gain.ghz24.a2 = tuple->data[1];
557 sprom->antenna_gain.a3 = tuple->data[1]; 557 sprom->antenna_gain.ghz24.a3 = tuple->data[1];
558 sprom->antenna_gain.ghz5.a0 = tuple->data[1];
559 sprom->antenna_gain.ghz5.a1 = tuple->data[1];
560 sprom->antenna_gain.ghz5.a2 = tuple->data[1];
561 sprom->antenna_gain.ghz5.a3 = tuple->data[1];
558 break; 562 break;
559 case SSB_SDIO_CIS_BFLAGS: 563 case SSB_SDIO_CIS_BFLAGS:
560 GOTO_ERROR_ON((tuple->size != 3) && 564 GOTO_ERROR_ON((tuple->size != 3) &&
diff --git a/drivers/ssb/ssb_private.h b/drivers/ssb/ssb_private.h
index 6c10b66c796..77653014db0 100644
--- a/drivers/ssb/ssb_private.h
+++ b/drivers/ssb/ssb_private.h
@@ -3,7 +3,6 @@
3 3
4#include <linux/ssb/ssb.h> 4#include <linux/ssb/ssb.h>
5#include <linux/types.h> 5#include <linux/types.h>
6#include <linux/bcm47xx_wdt.h>
7 6
8 7
9#define PFX "ssb: " 8#define PFX "ssb: "
@@ -208,55 +207,4 @@ static inline void b43_pci_ssb_bridge_exit(void)
208} 207}
209#endif /* CONFIG_SSB_B43_PCI_BRIDGE */ 208#endif /* CONFIG_SSB_B43_PCI_BRIDGE */
210 209
211/* driver_chipcommon_pmu.c */
212extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc);
213extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc);
214extern u32 ssb_pmu_get_alp_clock(struct ssb_chipcommon *cc);
215
216extern u32 ssb_chipco_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt,
217 u32 ticks);
218extern u32 ssb_chipco_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
219
220#ifdef CONFIG_SSB_DRIVER_EXTIF
221extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
222extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
223#else
224static inline u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt,
225 u32 ticks)
226{
227 return 0;
228}
229static inline u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt,
230 u32 ms)
231{
232 return 0;
233}
234#endif
235
236#ifdef CONFIG_SSB_EMBEDDED
237extern int ssb_watchdog_register(struct ssb_bus *bus);
238#else /* CONFIG_SSB_EMBEDDED */
239static inline int ssb_watchdog_register(struct ssb_bus *bus)
240{
241 return 0;
242}
243#endif /* CONFIG_SSB_EMBEDDED */
244
245#ifdef CONFIG_SSB_DRIVER_EXTIF
246extern void ssb_extif_init(struct ssb_extif *extif);
247#else
248static inline void ssb_extif_init(struct ssb_extif *extif)
249{
250}
251#endif
252
253#ifdef CONFIG_SSB_DRIVER_GPIO
254extern int ssb_gpio_init(struct ssb_bus *bus);
255#else /* CONFIG_SSB_DRIVER_GPIO */
256static inline int ssb_gpio_init(struct ssb_bus *bus)
257{
258 return -ENOTSUPP;
259}
260#endif /* CONFIG_SSB_DRIVER_GPIO */
261
262#endif /* LINUX_SSB_PRIVATE_H_ */ 210#endif /* LINUX_SSB_PRIVATE_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-30 22:10:11 -0400