Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS updates from Ralf Baechle:
 "The MIPS bits for 3.8.  This also includes a bunch fixes that were
  sitting in the linux-mips.org git tree for a long time.  This pull
  request contains updates to several OCTEON drivers and the board
  support code for BCM47XX, BCM63XX, XLP, XLR, XLS, lantiq, Loongson1B,
  updates to the SSB bus support, MIPS kexec code and adds support for
  kdump.

  When pulling this, there are two expected merge conflicts in
  include/linux/bcma/bcma_driver_chipcommon.h which are trivial to
  resolve, just remove the conflict markers and keep both alternatives."

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (90 commits)
  MIPS: PMC-Sierra Yosemite: Remove support.
  VIDEO: Newport Fix console crashes
  MIPS: wrppmc: Fix build of PCI code.
  MIPS: IP22/IP28: Fix build of EISA code.
  MIPS: RB532: Fix build of prom code.
  MIPS: PowerTV: Fix build.
  MIPS: IP27: Correct fucked grammar in ops-bridge.c
  MIPS: Highmem: Fix build error if CONFIG_DEBUG_HIGHMEM is disabled
  MIPS: Fix potencial corruption
  MIPS: Fix for warning from FPU emulation code
  MIPS: Handle COP3 Unusable exception as COP1X for FP emulation
  MIPS: Fix poweroff failure when HOTPLUG_CPU configured.
  MIPS: MT: Fix build with CONFIG_UIDGID_STRICT_TYPE_CHECKS=y
  MIPS: Remove unused smvp.h
  MIPS/EDAC: Improve OCTEON EDAC support.
  MIPS: OCTEON: Add definitions for OCTEON memory contoller registers.
  MIPS: OCTEON: Add OCTEON family definitions to octeon-model.h
  ata: pata_octeon_cf: Use correct byte order for DMA in when built little-endian.
  MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.
  MIPS: Remove usage of CEVT_R4K_LIB config option.
  ...

1 files changed, 176 insertions, 0 deletions

diff --git a/drivers/ssb/driver_gpio.c b/drivers/ssb/driver_gpio.c
new file mode 100644
index 00000000000..97ac0a38e3d
--- /dev/null
+++ b/drivers/ssb/driver_gpio.c
@@ -0,0 +1,176 @@
+/*
+ * Sonics Silicon Backplane
+ * GPIO driver
+ *
+ * Copyright 2011, Broadcom Corporation
+ * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+#include <linux/gpio.h>
+#include <linux/export.h>
+#include <linux/ssb/ssb.h>
+
+#include "ssb_private.h"
+
+static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
+{
+        return container_of(chip, struct ssb_bus, gpio);
+}
+
+static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
+}
+
+static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio,
+                                      int value)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
+}
+
+static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
+                                           unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
+        return 0;
+}
+
+static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
+                                            unsigned gpio, int value)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
+        ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
+        return 0;
+}
+
+static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
+        /* clear pulldown */
+        ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
+        /* Set pullup */
+        ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);
+
+        return 0;
+}
+
+static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        /* clear pullup */
+        ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
+}
+
+static int ssb_gpio_chipco_init(struct ssb_bus *bus)
+{
+        struct gpio_chip *chip = &bus->gpio;
+
+        chip->label             = "ssb_chipco_gpio";
+        chip->owner             = THIS_MODULE;
+        chip->request           = ssb_gpio_chipco_request;
+        chip->free              = ssb_gpio_chipco_free;
+        chip->get               = ssb_gpio_chipco_get_value;
+        chip->set               = ssb_gpio_chipco_set_value;
+        chip->direction_input   = ssb_gpio_chipco_direction_input;
+        chip->direction_output  = ssb_gpio_chipco_direction_output;
+        chip->ngpio             = 16;
+        /* There is just one SoC in one device and its GPIO addresses should be
+         * deterministic to address them more easily. The other buses could get
+         * a random base number. */
+        if (bus->bustype == SSB_BUSTYPE_SSB)
+                chip->base              = 0;
+        else
+                chip->base              = -1;
+
+        return gpiochip_add(chip);
+}
+
+#ifdef CONFIG_SSB_DRIVER_EXTIF
+
+static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
+}
+
+static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio,
+                                     int value)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
+}
+
+static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
+                                          unsigned gpio)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
+        return 0;
+}
+
+static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
+                                           unsigned gpio, int value)
+{
+        struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+
+        ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
+        ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
+        return 0;
+}
+
+static int ssb_gpio_extif_init(struct ssb_bus *bus)
+{
+        struct gpio_chip *chip = &bus->gpio;
+
+        chip->label             = "ssb_extif_gpio";
+        chip->owner             = THIS_MODULE;
+        chip->get               = ssb_gpio_extif_get_value;
+        chip->set               = ssb_gpio_extif_set_value;
+        chip->direction_input   = ssb_gpio_extif_direction_input;
+        chip->direction_output  = ssb_gpio_extif_direction_output;
+        chip->ngpio             = 5;
+        /* There is just one SoC in one device and its GPIO addresses should be
+         * deterministic to address them more easily. The other buses could get
+         * a random base number. */
+        if (bus->bustype == SSB_BUSTYPE_SSB)
+                chip->base              = 0;
+        else
+                chip->base              = -1;
+
+        return gpiochip_add(chip);
+}
+
+#else
+static int ssb_gpio_extif_init(struct ssb_bus *bus)
+{
+        return -ENOTSUPP;
+}
+#endif
+
+int ssb_gpio_init(struct ssb_bus *bus)
+{
+        if (ssb_chipco_available(&bus->chipco))
+                return ssb_gpio_chipco_init(bus);
+        else if (ssb_extif_available(&bus->extif))
+                return ssb_gpio_extif_init(bus);
+        else
+                SSB_WARN_ON(1);
+
+        return -1;
+}