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authorAnton Vorontsov <avorontsov@ru.mvista.com>2009-06-18 19:49:08 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-19 19:46:05 -0400
commit575c5807f6842422e9fe2432fd48dfcc1d7aef41 (patch)
tree5b0f44de7188c7a82a6df635a919dc00b694baac /drivers/spi
parent34a661a1fe02840b6fc8de0a616464dd4899782f (diff)
spi_mpc8xxx: s/83xx/8xxx/g
Since we renamed the file, we might want to rename the file internals too. Though we don't bother with changing platform driver name and platform module alias. The stuff is legacy and hopefully we'll remove it soon. Suggested-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: David Brownell <david-b@pacbell.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/Kconfig2
-rw-r--r--drivers/spi/Makefile2
-rw-r--r--drivers/spi/spi_mpc8xxx.c400
3 files changed, 202 insertions, 202 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 3fade3c5cd7..2c733c27db2 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -139,7 +139,7 @@ config SPI_MPC52xx_PSC
139 This enables using the Freescale MPC52xx Programmable Serial 139 This enables using the Freescale MPC52xx Programmable Serial
140 Controller in master SPI mode. 140 Controller in master SPI mode.
141 141
142config SPI_MPC83xx 142config SPI_MPC8xxx
143 tristate "Freescale MPC8xxx SPI controller" 143 tristate "Freescale MPC8xxx SPI controller"
144 depends on FSL_SOC 144 depends on FSL_SOC
145 help 145 help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 0f747c400c8..3de408d294b 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
25obj-$(CONFIG_SPI_ORION) += orion_spi.o 25obj-$(CONFIG_SPI_ORION) += orion_spi.o
26obj-$(CONFIG_SPI_PL022) += amba-pl022.o 26obj-$(CONFIG_SPI_PL022) += amba-pl022.o
27obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o 27obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
28obj-$(CONFIG_SPI_MPC83xx) += spi_mpc8xxx.o 28obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o
29obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o 29obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
30obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o 30obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o
31obj-$(CONFIG_SPI_TXX9) += spi_txx9.o 31obj-$(CONFIG_SPI_TXX9) += spi_txx9.o
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index c5cb98f6545..0fd0ec4d3a7 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * MPC83xx SPI controller driver. 2 * MPC8xxx SPI controller driver.
3 * 3 *
4 * Maintainer: Kumar Gala 4 * Maintainer: Kumar Gala
5 * 5 *
@@ -37,7 +37,7 @@
37#include <asm/irq.h> 37#include <asm/irq.h>
38 38
39/* SPI Controller registers */ 39/* SPI Controller registers */
40struct mpc83xx_spi_reg { 40struct mpc8xxx_spi_reg {
41 u8 res1[0x20]; 41 u8 res1[0x20];
42 __be32 mode; 42 __be32 mode;
43 __be32 event; 43 __be32 event;
@@ -76,16 +76,16 @@ struct mpc83xx_spi_reg {
76#define SPIM_NF 0x00000100 /* Not full */ 76#define SPIM_NF 0x00000100 /* Not full */
77 77
78/* SPI Controller driver's private data. */ 78/* SPI Controller driver's private data. */
79struct mpc83xx_spi { 79struct mpc8xxx_spi {
80 struct mpc83xx_spi_reg __iomem *base; 80 struct mpc8xxx_spi_reg __iomem *base;
81 81
82 /* rx & tx bufs from the spi_transfer */ 82 /* rx & tx bufs from the spi_transfer */
83 const void *tx; 83 const void *tx;
84 void *rx; 84 void *rx;
85 85
86 /* functions to deal with different sized buffers */ 86 /* functions to deal with different sized buffers */
87 void (*get_rx) (u32 rx_data, struct mpc83xx_spi *); 87 void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
88 u32(*get_tx) (struct mpc83xx_spi *); 88 u32(*get_tx) (struct mpc8xxx_spi *);
89 89
90 unsigned int count; 90 unsigned int count;
91 unsigned int irq; 91 unsigned int irq;
@@ -107,44 +107,44 @@ struct mpc83xx_spi {
107 struct completion done; 107 struct completion done;
108}; 108};
109 109
110struct spi_mpc83xx_cs { 110struct spi_mpc8xxx_cs {
111 /* functions to deal with different sized buffers */ 111 /* functions to deal with different sized buffers */
112 void (*get_rx) (u32 rx_data, struct mpc83xx_spi *); 112 void (*get_rx) (u32 rx_data, struct mpc8xxx_spi *);
113 u32 (*get_tx) (struct mpc83xx_spi *); 113 u32 (*get_tx) (struct mpc8xxx_spi *);
114 u32 rx_shift; /* RX data reg shift when in qe mode */ 114 u32 rx_shift; /* RX data reg shift when in qe mode */
115 u32 tx_shift; /* TX data reg shift when in qe mode */ 115 u32 tx_shift; /* TX data reg shift when in qe mode */
116 u32 hw_mode; /* Holds HW mode register settings */ 116 u32 hw_mode; /* Holds HW mode register settings */
117}; 117};
118 118
119static inline void mpc83xx_spi_write_reg(__be32 __iomem *reg, u32 val) 119static inline void mpc8xxx_spi_write_reg(__be32 __iomem *reg, u32 val)
120{ 120{
121 out_be32(reg, val); 121 out_be32(reg, val);
122} 122}
123 123
124static inline u32 mpc83xx_spi_read_reg(__be32 __iomem *reg) 124static inline u32 mpc8xxx_spi_read_reg(__be32 __iomem *reg)
125{ 125{
126 return in_be32(reg); 126 return in_be32(reg);
127} 127}
128 128
129#define MPC83XX_SPI_RX_BUF(type) \ 129#define MPC83XX_SPI_RX_BUF(type) \
130static \ 130static \
131void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \ 131void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
132{ \ 132{ \
133 type *rx = mpc83xx_spi->rx; \ 133 type *rx = mpc8xxx_spi->rx; \
134 *rx++ = (type)(data >> mpc83xx_spi->rx_shift); \ 134 *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
135 mpc83xx_spi->rx = rx; \ 135 mpc8xxx_spi->rx = rx; \
136} 136}
137 137
138#define MPC83XX_SPI_TX_BUF(type) \ 138#define MPC83XX_SPI_TX_BUF(type) \
139static \ 139static \
140u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi) \ 140u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
141{ \ 141{ \
142 u32 data; \ 142 u32 data; \
143 const type *tx = mpc83xx_spi->tx; \ 143 const type *tx = mpc8xxx_spi->tx; \
144 if (!tx) \ 144 if (!tx) \
145 return 0; \ 145 return 0; \
146 data = *tx++ << mpc83xx_spi->tx_shift; \ 146 data = *tx++ << mpc8xxx_spi->tx_shift; \
147 mpc83xx_spi->tx = tx; \ 147 mpc8xxx_spi->tx = tx; \
148 return data; \ 148 return data; \
149} 149}
150 150
@@ -155,12 +155,12 @@ MPC83XX_SPI_TX_BUF(u8)
155MPC83XX_SPI_TX_BUF(u16) 155MPC83XX_SPI_TX_BUF(u16)
156MPC83XX_SPI_TX_BUF(u32) 156MPC83XX_SPI_TX_BUF(u32)
157 157
158static void mpc83xx_spi_chipselect(struct spi_device *spi, int value) 158static void mpc8xxx_spi_chipselect(struct spi_device *spi, int value)
159{ 159{
160 struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master); 160 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
161 struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data; 161 struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data;
162 bool pol = spi->mode & SPI_CS_HIGH; 162 bool pol = spi->mode & SPI_CS_HIGH;
163 struct spi_mpc83xx_cs *cs = spi->controller_state; 163 struct spi_mpc8xxx_cs *cs = spi->controller_state;
164 164
165 if (value == BITBANG_CS_INACTIVE) { 165 if (value == BITBANG_CS_INACTIVE) {
166 if (pdata->cs_control) 166 if (pdata->cs_control)
@@ -168,16 +168,16 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
168 } 168 }
169 169
170 if (value == BITBANG_CS_ACTIVE) { 170 if (value == BITBANG_CS_ACTIVE) {
171 u32 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); 171 u32 regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
172 172
173 mpc83xx_spi->rx_shift = cs->rx_shift; 173 mpc8xxx_spi->rx_shift = cs->rx_shift;
174 mpc83xx_spi->tx_shift = cs->tx_shift; 174 mpc8xxx_spi->tx_shift = cs->tx_shift;
175 mpc83xx_spi->get_rx = cs->get_rx; 175 mpc8xxx_spi->get_rx = cs->get_rx;
176 mpc83xx_spi->get_tx = cs->get_tx; 176 mpc8xxx_spi->get_tx = cs->get_tx;
177 177
178 if (cs->hw_mode != regval) { 178 if (cs->hw_mode != regval) {
179 unsigned long flags; 179 unsigned long flags;
180 __be32 __iomem *mode = &mpc83xx_spi->base->mode; 180 __be32 __iomem *mode = &mpc8xxx_spi->base->mode;
181 181
182 regval = cs->hw_mode; 182 regval = cs->hw_mode;
183 /* Turn off IRQs locally to minimize time that 183 /* Turn off IRQs locally to minimize time that
@@ -185,8 +185,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
185 */ 185 */
186 local_irq_save(flags); 186 local_irq_save(flags);
187 /* Turn off SPI unit prior changing mode */ 187 /* Turn off SPI unit prior changing mode */
188 mpc83xx_spi_write_reg(mode, regval & ~SPMODE_ENABLE); 188 mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
189 mpc83xx_spi_write_reg(mode, regval); 189 mpc8xxx_spi_write_reg(mode, regval);
190 local_irq_restore(flags); 190 local_irq_restore(flags);
191 } 191 }
192 if (pdata->cs_control) 192 if (pdata->cs_control)
@@ -195,15 +195,15 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
195} 195}
196 196
197static 197static
198int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) 198int mpc8xxx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
199{ 199{
200 struct mpc83xx_spi *mpc83xx_spi; 200 struct mpc8xxx_spi *mpc8xxx_spi;
201 u32 regval; 201 u32 regval;
202 u8 bits_per_word, pm; 202 u8 bits_per_word, pm;
203 u32 hz; 203 u32 hz;
204 struct spi_mpc83xx_cs *cs = spi->controller_state; 204 struct spi_mpc8xxx_cs *cs = spi->controller_state;
205 205
206 mpc83xx_spi = spi_master_get_devdata(spi->master); 206 mpc8xxx_spi = spi_master_get_devdata(spi->master);
207 207
208 if (t) { 208 if (t) {
209 bits_per_word = t->bits_per_word; 209 bits_per_word = t->bits_per_word;
@@ -228,26 +228,26 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
228 cs->rx_shift = 0; 228 cs->rx_shift = 0;
229 cs->tx_shift = 0; 229 cs->tx_shift = 0;
230 if (bits_per_word <= 8) { 230 if (bits_per_word <= 8) {
231 cs->get_rx = mpc83xx_spi_rx_buf_u8; 231 cs->get_rx = mpc8xxx_spi_rx_buf_u8;
232 cs->get_tx = mpc83xx_spi_tx_buf_u8; 232 cs->get_tx = mpc8xxx_spi_tx_buf_u8;
233 if (mpc83xx_spi->qe_mode) { 233 if (mpc8xxx_spi->qe_mode) {
234 cs->rx_shift = 16; 234 cs->rx_shift = 16;
235 cs->tx_shift = 24; 235 cs->tx_shift = 24;
236 } 236 }
237 } else if (bits_per_word <= 16) { 237 } else if (bits_per_word <= 16) {
238 cs->get_rx = mpc83xx_spi_rx_buf_u16; 238 cs->get_rx = mpc8xxx_spi_rx_buf_u16;
239 cs->get_tx = mpc83xx_spi_tx_buf_u16; 239 cs->get_tx = mpc8xxx_spi_tx_buf_u16;
240 if (mpc83xx_spi->qe_mode) { 240 if (mpc8xxx_spi->qe_mode) {
241 cs->rx_shift = 16; 241 cs->rx_shift = 16;
242 cs->tx_shift = 16; 242 cs->tx_shift = 16;
243 } 243 }
244 } else if (bits_per_word <= 32) { 244 } else if (bits_per_word <= 32) {
245 cs->get_rx = mpc83xx_spi_rx_buf_u32; 245 cs->get_rx = mpc8xxx_spi_rx_buf_u32;
246 cs->get_tx = mpc83xx_spi_tx_buf_u32; 246 cs->get_tx = mpc8xxx_spi_tx_buf_u32;
247 } else 247 } else
248 return -EINVAL; 248 return -EINVAL;
249 249
250 if (mpc83xx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) { 250 if (mpc8xxx_spi->qe_mode && spi->mode & SPI_LSB_FIRST) {
251 cs->tx_shift = 0; 251 cs->tx_shift = 0;
252 if (bits_per_word <= 8) 252 if (bits_per_word <= 8)
253 cs->rx_shift = 8; 253 cs->rx_shift = 8;
@@ -255,10 +255,10 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
255 cs->rx_shift = 0; 255 cs->rx_shift = 0;
256 } 256 }
257 257
258 mpc83xx_spi->rx_shift = cs->rx_shift; 258 mpc8xxx_spi->rx_shift = cs->rx_shift;
259 mpc83xx_spi->tx_shift = cs->tx_shift; 259 mpc8xxx_spi->tx_shift = cs->tx_shift;
260 mpc83xx_spi->get_rx = cs->get_rx; 260 mpc8xxx_spi->get_rx = cs->get_rx;
261 mpc83xx_spi->get_tx = cs->get_tx; 261 mpc8xxx_spi->get_tx = cs->get_tx;
262 262
263 if (bits_per_word == 32) 263 if (bits_per_word == 32)
264 bits_per_word = 0; 264 bits_per_word = 0;
@@ -271,25 +271,25 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
271 271
272 cs->hw_mode |= SPMODE_LEN(bits_per_word); 272 cs->hw_mode |= SPMODE_LEN(bits_per_word);
273 273
274 if ((mpc83xx_spi->spibrg / hz) > 64) { 274 if ((mpc8xxx_spi->spibrg / hz) > 64) {
275 cs->hw_mode |= SPMODE_DIV16; 275 cs->hw_mode |= SPMODE_DIV16;
276 pm = mpc83xx_spi->spibrg / (hz * 64); 276 pm = mpc8xxx_spi->spibrg / (hz * 64);
277 277
278 WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. " 278 WARN_ONCE(pm > 16, "%s: Requested speed is too low: %d Hz. "
279 "Will use %d Hz instead.\n", dev_name(&spi->dev), 279 "Will use %d Hz instead.\n", dev_name(&spi->dev),
280 hz, mpc83xx_spi->spibrg / 1024); 280 hz, mpc8xxx_spi->spibrg / 1024);
281 if (pm > 16) 281 if (pm > 16)
282 pm = 16; 282 pm = 16;
283 } else 283 } else
284 pm = mpc83xx_spi->spibrg / (hz * 4); 284 pm = mpc8xxx_spi->spibrg / (hz * 4);
285 if (pm) 285 if (pm)
286 pm--; 286 pm--;
287 287
288 cs->hw_mode |= SPMODE_PM(pm); 288 cs->hw_mode |= SPMODE_PM(pm);
289 regval = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); 289 regval = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
290 if (cs->hw_mode != regval) { 290 if (cs->hw_mode != regval) {
291 unsigned long flags; 291 unsigned long flags;
292 __be32 __iomem *mode = &mpc83xx_spi->base->mode; 292 __be32 __iomem *mode = &mpc8xxx_spi->base->mode;
293 293
294 regval = cs->hw_mode; 294 regval = cs->hw_mode;
295 /* Turn off IRQs locally to minimize time 295 /* Turn off IRQs locally to minimize time
@@ -297,22 +297,22 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
297 */ 297 */
298 local_irq_save(flags); 298 local_irq_save(flags);
299 /* Turn off SPI unit prior changing mode */ 299 /* Turn off SPI unit prior changing mode */
300 mpc83xx_spi_write_reg(mode, regval & ~SPMODE_ENABLE); 300 mpc8xxx_spi_write_reg(mode, regval & ~SPMODE_ENABLE);
301 mpc83xx_spi_write_reg(mode, regval); 301 mpc8xxx_spi_write_reg(mode, regval);
302 local_irq_restore(flags); 302 local_irq_restore(flags);
303 } 303 }
304 return 0; 304 return 0;
305} 305}
306 306
307static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t) 307static int mpc8xxx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
308{ 308{
309 struct mpc83xx_spi *mpc83xx_spi; 309 struct mpc8xxx_spi *mpc8xxx_spi;
310 u32 word, len, bits_per_word; 310 u32 word, len, bits_per_word;
311 311
312 mpc83xx_spi = spi_master_get_devdata(spi->master); 312 mpc8xxx_spi = spi_master_get_devdata(spi->master);
313 313
314 mpc83xx_spi->tx = t->tx_buf; 314 mpc8xxx_spi->tx = t->tx_buf;
315 mpc83xx_spi->rx = t->rx_buf; 315 mpc8xxx_spi->rx = t->rx_buf;
316 bits_per_word = spi->bits_per_word; 316 bits_per_word = spi->bits_per_word;
317 if (t->bits_per_word) 317 if (t->bits_per_word)
318 bits_per_word = t->bits_per_word; 318 bits_per_word = t->bits_per_word;
@@ -329,26 +329,26 @@ static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t)
329 return -EINVAL; 329 return -EINVAL;
330 len /= 2; 330 len /= 2;
331 } 331 }
332 mpc83xx_spi->count = len; 332 mpc8xxx_spi->count = len;
333 333
334 INIT_COMPLETION(mpc83xx_spi->done); 334 INIT_COMPLETION(mpc8xxx_spi->done);
335 335
336 /* enable rx ints */ 336 /* enable rx ints */
337 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, SPIM_NE); 337 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, SPIM_NE);
338 338
339 /* transmit word */ 339 /* transmit word */
340 word = mpc83xx_spi->get_tx(mpc83xx_spi); 340 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
341 mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word); 341 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
342 342
343 wait_for_completion(&mpc83xx_spi->done); 343 wait_for_completion(&mpc8xxx_spi->done);
344 344
345 /* disable rx ints */ 345 /* disable rx ints */
346 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0); 346 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
347 347
348 return mpc83xx_spi->count; 348 return mpc8xxx_spi->count;
349} 349}
350 350
351static void mpc83xx_spi_do_one_msg(struct spi_message *m) 351static void mpc8xxx_spi_do_one_msg(struct spi_message *m)
352{ 352{
353 struct spi_device *spi = m->spi; 353 struct spi_device *spi = m->spi;
354 struct spi_transfer *t; 354 struct spi_transfer *t;
@@ -364,18 +364,18 @@ static void mpc83xx_spi_do_one_msg(struct spi_message *m)
364 status = -EINVAL; 364 status = -EINVAL;
365 365
366 if (cs_change) 366 if (cs_change)
367 status = mpc83xx_spi_setup_transfer(spi, t); 367 status = mpc8xxx_spi_setup_transfer(spi, t);
368 if (status < 0) 368 if (status < 0)
369 break; 369 break;
370 } 370 }
371 371
372 if (cs_change) { 372 if (cs_change) {
373 mpc83xx_spi_chipselect(spi, BITBANG_CS_ACTIVE); 373 mpc8xxx_spi_chipselect(spi, BITBANG_CS_ACTIVE);
374 ndelay(nsecs); 374 ndelay(nsecs);
375 } 375 }
376 cs_change = t->cs_change; 376 cs_change = t->cs_change;
377 if (t->len) 377 if (t->len)
378 status = mpc83xx_spi_bufs(spi, t); 378 status = mpc8xxx_spi_bufs(spi, t);
379 if (status) { 379 if (status) {
380 status = -EMSGSIZE; 380 status = -EMSGSIZE;
381 break; 381 break;
@@ -387,7 +387,7 @@ static void mpc83xx_spi_do_one_msg(struct spi_message *m)
387 387
388 if (cs_change) { 388 if (cs_change) {
389 ndelay(nsecs); 389 ndelay(nsecs);
390 mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE); 390 mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
391 ndelay(nsecs); 391 ndelay(nsecs);
392 } 392 }
393 } 393 }
@@ -397,38 +397,38 @@ static void mpc83xx_spi_do_one_msg(struct spi_message *m)
397 397
398 if (status || !cs_change) { 398 if (status || !cs_change) {
399 ndelay(nsecs); 399 ndelay(nsecs);
400 mpc83xx_spi_chipselect(spi, BITBANG_CS_INACTIVE); 400 mpc8xxx_spi_chipselect(spi, BITBANG_CS_INACTIVE);
401 } 401 }
402 402
403 mpc83xx_spi_setup_transfer(spi, NULL); 403 mpc8xxx_spi_setup_transfer(spi, NULL);
404} 404}
405 405
406static void mpc83xx_spi_work(struct work_struct *work) 406static void mpc8xxx_spi_work(struct work_struct *work)
407{ 407{
408 struct mpc83xx_spi *mpc83xx_spi = container_of(work, struct mpc83xx_spi, 408 struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
409 work); 409 work);
410 410
411 spin_lock_irq(&mpc83xx_spi->lock); 411 spin_lock_irq(&mpc8xxx_spi->lock);
412 while (!list_empty(&mpc83xx_spi->queue)) { 412 while (!list_empty(&mpc8xxx_spi->queue)) {
413 struct spi_message *m = container_of(mpc83xx_spi->queue.next, 413 struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
414 struct spi_message, queue); 414 struct spi_message, queue);
415 415
416 list_del_init(&m->queue); 416 list_del_init(&m->queue);
417 spin_unlock_irq(&mpc83xx_spi->lock); 417 spin_unlock_irq(&mpc8xxx_spi->lock);
418 418
419 mpc83xx_spi_do_one_msg(m); 419 mpc8xxx_spi_do_one_msg(m);
420 420
421 spin_lock_irq(&mpc83xx_spi->lock); 421 spin_lock_irq(&mpc8xxx_spi->lock);
422 } 422 }
423 spin_unlock_irq(&mpc83xx_spi->lock); 423 spin_unlock_irq(&mpc8xxx_spi->lock);
424} 424}
425 425
426static int mpc83xx_spi_setup(struct spi_device *spi) 426static int mpc8xxx_spi_setup(struct spi_device *spi)
427{ 427{
428 struct mpc83xx_spi *mpc83xx_spi; 428 struct mpc8xxx_spi *mpc8xxx_spi;
429 int retval; 429 int retval;
430 u32 hw_mode; 430 u32 hw_mode;
431 struct spi_mpc83xx_cs *cs = spi->controller_state; 431 struct spi_mpc8xxx_cs *cs = spi->controller_state;
432 432
433 if (!spi->max_speed_hz) 433 if (!spi->max_speed_hz)
434 return -EINVAL; 434 return -EINVAL;
@@ -439,10 +439,10 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
439 return -ENOMEM; 439 return -ENOMEM;
440 spi->controller_state = cs; 440 spi->controller_state = cs;
441 } 441 }
442 mpc83xx_spi = spi_master_get_devdata(spi->master); 442 mpc8xxx_spi = spi_master_get_devdata(spi->master);
443 443
444 hw_mode = cs->hw_mode; /* Save orginal settings */ 444 hw_mode = cs->hw_mode; /* Save orginal settings */
445 cs->hw_mode = mpc83xx_spi_read_reg(&mpc83xx_spi->base->mode); 445 cs->hw_mode = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->mode);
446 /* mask out bits we are going to set */ 446 /* mask out bits we are going to set */
447 cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH 447 cs->hw_mode &= ~(SPMODE_CP_BEGIN_EDGECLK | SPMODE_CI_INACTIVEHIGH
448 | SPMODE_REV | SPMODE_LOOP); 448 | SPMODE_REV | SPMODE_LOOP);
@@ -456,7 +456,7 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
456 if (spi->mode & SPI_LOOP) 456 if (spi->mode & SPI_LOOP)
457 cs->hw_mode |= SPMODE_LOOP; 457 cs->hw_mode |= SPMODE_LOOP;
458 458
459 retval = mpc83xx_spi_setup_transfer(spi, NULL); 459 retval = mpc8xxx_spi_setup_transfer(spi, NULL);
460 if (retval < 0) { 460 if (retval < 0) {
461 cs->hw_mode = hw_mode; /* Restore settings */ 461 cs->hw_mode = hw_mode; /* Restore settings */
462 return retval; 462 return retval;
@@ -464,21 +464,21 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
464 return 0; 464 return 0;
465} 465}
466 466
467static irqreturn_t mpc83xx_spi_irq(s32 irq, void *context_data) 467static irqreturn_t mpc8xxx_spi_irq(s32 irq, void *context_data)
468{ 468{
469 struct mpc83xx_spi *mpc83xx_spi = context_data; 469 struct mpc8xxx_spi *mpc8xxx_spi = context_data;
470 u32 event; 470 u32 event;
471 irqreturn_t ret = IRQ_NONE; 471 irqreturn_t ret = IRQ_NONE;
472 472
473 /* Get interrupt events(tx/rx) */ 473 /* Get interrupt events(tx/rx) */
474 event = mpc83xx_spi_read_reg(&mpc83xx_spi->base->event); 474 event = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event);
475 475
476 /* We need handle RX first */ 476 /* We need handle RX first */
477 if (event & SPIE_NE) { 477 if (event & SPIE_NE) {
478 u32 rx_data = mpc83xx_spi_read_reg(&mpc83xx_spi->base->receive); 478 u32 rx_data = mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->receive);
479 479
480 if (mpc83xx_spi->rx) 480 if (mpc8xxx_spi->rx)
481 mpc83xx_spi->get_rx(rx_data, mpc83xx_spi); 481 mpc8xxx_spi->get_rx(rx_data, mpc8xxx_spi);
482 482
483 ret = IRQ_HANDLED; 483 ret = IRQ_HANDLED;
484 } 484 }
@@ -486,56 +486,56 @@ static irqreturn_t mpc83xx_spi_irq(s32 irq, void *context_data)
486 if ((event & SPIE_NF) == 0) 486 if ((event & SPIE_NF) == 0)
487 /* spin until TX is done */ 487 /* spin until TX is done */
488 while (((event = 488 while (((event =
489 mpc83xx_spi_read_reg(&mpc83xx_spi->base->event)) & 489 mpc8xxx_spi_read_reg(&mpc8xxx_spi->base->event)) &
490 SPIE_NF) == 0) 490 SPIE_NF) == 0)
491 cpu_relax(); 491 cpu_relax();
492 492
493 mpc83xx_spi->count -= 1; 493 mpc8xxx_spi->count -= 1;
494 if (mpc83xx_spi->count) { 494 if (mpc8xxx_spi->count) {
495 u32 word = mpc83xx_spi->get_tx(mpc83xx_spi); 495 u32 word = mpc8xxx_spi->get_tx(mpc8xxx_spi);
496 mpc83xx_spi_write_reg(&mpc83xx_spi->base->transmit, word); 496 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->transmit, word);
497 } else { 497 } else {
498 complete(&mpc83xx_spi->done); 498 complete(&mpc8xxx_spi->done);
499 } 499 }
500 500
501 /* Clear the events */ 501 /* Clear the events */
502 mpc83xx_spi_write_reg(&mpc83xx_spi->base->event, event); 502 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, event);
503 503
504 return ret; 504 return ret;
505} 505}
506static int mpc83xx_spi_transfer(struct spi_device *spi, 506static int mpc8xxx_spi_transfer(struct spi_device *spi,
507 struct spi_message *m) 507 struct spi_message *m)
508{ 508{
509 struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master); 509 struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
510 unsigned long flags; 510 unsigned long flags;
511 511
512 m->actual_length = 0; 512 m->actual_length = 0;
513 m->status = -EINPROGRESS; 513 m->status = -EINPROGRESS;
514 514
515 spin_lock_irqsave(&mpc83xx_spi->lock, flags); 515 spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
516 list_add_tail(&m->queue, &mpc83xx_spi->queue); 516 list_add_tail(&m->queue, &mpc8xxx_spi->queue);
517 queue_work(mpc83xx_spi->workqueue, &mpc83xx_spi->work); 517 queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
518 spin_unlock_irqrestore(&mpc83xx_spi->lock, flags); 518 spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
519 519
520 return 0; 520 return 0;
521} 521}
522 522
523 523
524static void mpc83xx_spi_cleanup(struct spi_device *spi) 524static void mpc8xxx_spi_cleanup(struct spi_device *spi)
525{ 525{
526 kfree(spi->controller_state); 526 kfree(spi->controller_state);
527} 527}
528 528
529static struct spi_master * __devinit 529static struct spi_master * __devinit
530mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq) 530mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
531{ 531{
532 struct fsl_spi_platform_data *pdata = dev->platform_data; 532 struct fsl_spi_platform_data *pdata = dev->platform_data;
533 struct spi_master *master; 533 struct spi_master *master;
534 struct mpc83xx_spi *mpc83xx_spi; 534 struct mpc8xxx_spi *mpc8xxx_spi;
535 u32 regval; 535 u32 regval;
536 int ret = 0; 536 int ret = 0;
537 537
538 master = spi_alloc_master(dev, sizeof(struct mpc83xx_spi)); 538 master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi));
539 if (master == NULL) { 539 if (master == NULL) {
540 ret = -ENOMEM; 540 ret = -ENOMEM;
541 goto err; 541 goto err;
@@ -547,36 +547,36 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
547 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH 547 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
548 | SPI_LSB_FIRST | SPI_LOOP; 548 | SPI_LSB_FIRST | SPI_LOOP;
549 549
550 master->setup = mpc83xx_spi_setup; 550 master->setup = mpc8xxx_spi_setup;
551 master->transfer = mpc83xx_spi_transfer; 551 master->transfer = mpc8xxx_spi_transfer;
552 master->cleanup = mpc83xx_spi_cleanup; 552 master->cleanup = mpc8xxx_spi_cleanup;
553 553
554 mpc83xx_spi = spi_master_get_devdata(master); 554 mpc8xxx_spi = spi_master_get_devdata(master);
555 mpc83xx_spi->qe_mode = pdata->qe_mode; 555 mpc8xxx_spi->qe_mode = pdata->qe_mode;
556 mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8; 556 mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
557 mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8; 557 mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
558 mpc83xx_spi->spibrg = pdata->sysclk; 558 mpc8xxx_spi->spibrg = pdata->sysclk;
559 559
560 mpc83xx_spi->rx_shift = 0; 560 mpc8xxx_spi->rx_shift = 0;
561 mpc83xx_spi->tx_shift = 0; 561 mpc8xxx_spi->tx_shift = 0;
562 if (mpc83xx_spi->qe_mode) { 562 if (mpc8xxx_spi->qe_mode) {
563 mpc83xx_spi->rx_shift = 16; 563 mpc8xxx_spi->rx_shift = 16;
564 mpc83xx_spi->tx_shift = 24; 564 mpc8xxx_spi->tx_shift = 24;
565 } 565 }
566 566
567 init_completion(&mpc83xx_spi->done); 567 init_completion(&mpc8xxx_spi->done);
568 568
569 mpc83xx_spi->base = ioremap(mem->start, mem->end - mem->start + 1); 569 mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
570 if (mpc83xx_spi->base == NULL) { 570 if (mpc8xxx_spi->base == NULL) {
571 ret = -ENOMEM; 571 ret = -ENOMEM;
572 goto put_master; 572 goto put_master;
573 } 573 }
574 574
575 mpc83xx_spi->irq = irq; 575 mpc8xxx_spi->irq = irq;
576 576
577 /* Register for SPI Interrupt */ 577 /* Register for SPI Interrupt */
578 ret = request_irq(mpc83xx_spi->irq, mpc83xx_spi_irq, 578 ret = request_irq(mpc8xxx_spi->irq, mpc8xxx_spi_irq,
579 0, "mpc83xx_spi", mpc83xx_spi); 579 0, "mpc8xxx_spi", mpc8xxx_spi);
580 580
581 if (ret != 0) 581 if (ret != 0)
582 goto unmap_io; 582 goto unmap_io;
@@ -585,25 +585,25 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
585 master->num_chipselect = pdata->max_chipselect; 585 master->num_chipselect = pdata->max_chipselect;
586 586
587 /* SPI controller initializations */ 587 /* SPI controller initializations */
588 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, 0); 588 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, 0);
589 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mask, 0); 589 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mask, 0);
590 mpc83xx_spi_write_reg(&mpc83xx_spi->base->command, 0); 590 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->command, 0);
591 mpc83xx_spi_write_reg(&mpc83xx_spi->base->event, 0xffffffff); 591 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->event, 0xffffffff);
592 592
593 /* Enable SPI interface */ 593 /* Enable SPI interface */
594 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE; 594 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE;
595 if (pdata->qe_mode) 595 if (pdata->qe_mode)
596 regval |= SPMODE_OP; 596 regval |= SPMODE_OP;
597 597
598 mpc83xx_spi_write_reg(&mpc83xx_spi->base->mode, regval); 598 mpc8xxx_spi_write_reg(&mpc8xxx_spi->base->mode, regval);
599 spin_lock_init(&mpc83xx_spi->lock); 599 spin_lock_init(&mpc8xxx_spi->lock);
600 init_completion(&mpc83xx_spi->done); 600 init_completion(&mpc8xxx_spi->done);
601 INIT_WORK(&mpc83xx_spi->work, mpc83xx_spi_work); 601 INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
602 INIT_LIST_HEAD(&mpc83xx_spi->queue); 602 INIT_LIST_HEAD(&mpc8xxx_spi->queue);
603 603
604 mpc83xx_spi->workqueue = create_singlethread_workqueue( 604 mpc8xxx_spi->workqueue = create_singlethread_workqueue(
605 dev_name(master->dev.parent)); 605 dev_name(master->dev.parent));
606 if (mpc83xx_spi->workqueue == NULL) { 606 if (mpc8xxx_spi->workqueue == NULL) {
607 ret = -EBUSY; 607 ret = -EBUSY;
608 goto free_irq; 608 goto free_irq;
609 } 609 }
@@ -613,57 +613,57 @@ mpc83xx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
613 goto unreg_master; 613 goto unreg_master;
614 614
615 printk(KERN_INFO 615 printk(KERN_INFO
616 "%s: MPC83xx SPI Controller driver at 0x%p (irq = %d)\n", 616 "%s: MPC8xxx SPI Controller driver at 0x%p (irq = %d)\n",
617 dev_name(dev), mpc83xx_spi->base, mpc83xx_spi->irq); 617 dev_name(dev), mpc8xxx_spi->base, mpc8xxx_spi->irq);
618 618
619 return master; 619 return master;
620 620
621unreg_master: 621unreg_master:
622 destroy_workqueue(mpc83xx_spi->workqueue); 622 destroy_workqueue(mpc8xxx_spi->workqueue);
623free_irq: 623free_irq:
624 free_irq(mpc83xx_spi->irq, mpc83xx_spi); 624 free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
625unmap_io: 625unmap_io:
626 iounmap(mpc83xx_spi->base); 626 iounmap(mpc8xxx_spi->base);
627put_master: 627put_master:
628 spi_master_put(master); 628 spi_master_put(master);
629err: 629err:
630 return ERR_PTR(ret); 630 return ERR_PTR(ret);
631} 631}
632 632
633static int __devexit mpc83xx_spi_remove(struct device *dev) 633static int __devexit mpc8xxx_spi_remove(struct device *dev)
634{ 634{
635 struct mpc83xx_spi *mpc83xx_spi; 635 struct mpc8xxx_spi *mpc8xxx_spi;
636 struct spi_master *master; 636 struct spi_master *master;
637 637
638 master = dev_get_drvdata(dev); 638 master = dev_get_drvdata(dev);
639 mpc83xx_spi = spi_master_get_devdata(master); 639 mpc8xxx_spi = spi_master_get_devdata(master);
640 640
641 flush_workqueue(mpc83xx_spi->workqueue); 641 flush_workqueue(mpc8xxx_spi->workqueue);
642 destroy_workqueue(mpc83xx_spi->workqueue); 642 destroy_workqueue(mpc8xxx_spi->workqueue);
643 spi_unregister_master(master); 643 spi_unregister_master(master);
644 644
645 free_irq(mpc83xx_spi->irq, mpc83xx_spi); 645 free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
646 iounmap(mpc83xx_spi->base); 646 iounmap(mpc8xxx_spi->base);
647 647
648 return 0; 648 return 0;
649} 649}
650 650
651struct mpc83xx_spi_probe_info { 651struct mpc8xxx_spi_probe_info {
652 struct fsl_spi_platform_data pdata; 652 struct fsl_spi_platform_data pdata;
653 int *gpios; 653 int *gpios;
654 bool *alow_flags; 654 bool *alow_flags;
655}; 655};
656 656
657static struct mpc83xx_spi_probe_info * 657static struct mpc8xxx_spi_probe_info *
658to_of_pinfo(struct fsl_spi_platform_data *pdata) 658to_of_pinfo(struct fsl_spi_platform_data *pdata)
659{ 659{
660 return container_of(pdata, struct mpc83xx_spi_probe_info, pdata); 660 return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
661} 661}
662 662
663static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on) 663static void mpc8xxx_spi_cs_control(struct spi_device *spi, bool on)
664{ 664{
665 struct device *dev = spi->dev.parent; 665 struct device *dev = spi->dev.parent;
666 struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data); 666 struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(dev->platform_data);
667 u16 cs = spi->chip_select; 667 u16 cs = spi->chip_select;
668 int gpio = pinfo->gpios[cs]; 668 int gpio = pinfo->gpios[cs];
669 bool alow = pinfo->alow_flags[cs]; 669 bool alow = pinfo->alow_flags[cs];
@@ -671,11 +671,11 @@ static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
671 gpio_set_value(gpio, on ^ alow); 671 gpio_set_value(gpio, on ^ alow);
672} 672}
673 673
674static int of_mpc83xx_spi_get_chipselects(struct device *dev) 674static int of_mpc8xxx_spi_get_chipselects(struct device *dev)
675{ 675{
676 struct device_node *np = dev_archdata_get_node(&dev->archdata); 676 struct device_node *np = dev_archdata_get_node(&dev->archdata);
677 struct fsl_spi_platform_data *pdata = dev->platform_data; 677 struct fsl_spi_platform_data *pdata = dev->platform_data;
678 struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(pdata); 678 struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
679 unsigned int ngpios; 679 unsigned int ngpios;
680 int i = 0; 680 int i = 0;
681 int ret; 681 int ret;
@@ -731,7 +731,7 @@ static int of_mpc83xx_spi_get_chipselects(struct device *dev)
731 } 731 }
732 732
733 pdata->max_chipselect = ngpios; 733 pdata->max_chipselect = ngpios;
734 pdata->cs_control = mpc83xx_spi_cs_control; 734 pdata->cs_control = mpc8xxx_spi_cs_control;
735 735
736 return 0; 736 return 0;
737 737
@@ -750,10 +750,10 @@ err_alloc_flags:
750 return ret; 750 return ret;
751} 751}
752 752
753static int of_mpc83xx_spi_free_chipselects(struct device *dev) 753static int of_mpc8xxx_spi_free_chipselects(struct device *dev)
754{ 754{
755 struct fsl_spi_platform_data *pdata = dev->platform_data; 755 struct fsl_spi_platform_data *pdata = dev->platform_data;
756 struct mpc83xx_spi_probe_info *pinfo = to_of_pinfo(pdata); 756 struct mpc8xxx_spi_probe_info *pinfo = to_of_pinfo(pdata);
757 int i; 757 int i;
758 758
759 if (!pinfo->gpios) 759 if (!pinfo->gpios)
@@ -769,12 +769,12 @@ static int of_mpc83xx_spi_free_chipselects(struct device *dev)
769 return 0; 769 return 0;
770} 770}
771 771
772static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev, 772static int __devinit of_mpc8xxx_spi_probe(struct of_device *ofdev,
773 const struct of_device_id *ofid) 773 const struct of_device_id *ofid)
774{ 774{
775 struct device *dev = &ofdev->dev; 775 struct device *dev = &ofdev->dev;
776 struct device_node *np = ofdev->node; 776 struct device_node *np = ofdev->node;
777 struct mpc83xx_spi_probe_info *pinfo; 777 struct mpc8xxx_spi_probe_info *pinfo;
778 struct fsl_spi_platform_data *pdata; 778 struct fsl_spi_platform_data *pdata;
779 struct spi_master *master; 779 struct spi_master *master;
780 struct resource mem; 780 struct resource mem;
@@ -806,7 +806,7 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
806 if (prop && !strcmp(prop, "cpu-qe")) 806 if (prop && !strcmp(prop, "cpu-qe"))
807 pdata->qe_mode = 1; 807 pdata->qe_mode = 1;
808 808
809 ret = of_mpc83xx_spi_get_chipselects(dev); 809 ret = of_mpc8xxx_spi_get_chipselects(dev);
810 if (ret) 810 if (ret)
811 goto err; 811 goto err;
812 812
@@ -820,7 +820,7 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
820 goto err; 820 goto err;
821 } 821 }
822 822
823 master = mpc83xx_spi_probe(dev, &mem, irq.start); 823 master = mpc8xxx_spi_probe(dev, &mem, irq.start);
824 if (IS_ERR(master)) { 824 if (IS_ERR(master)) {
825 ret = PTR_ERR(master); 825 ret = PTR_ERR(master);
826 goto err; 826 goto err;
@@ -831,34 +831,34 @@ static int __devinit of_mpc83xx_spi_probe(struct of_device *ofdev,
831 return 0; 831 return 0;
832 832
833err: 833err:
834 of_mpc83xx_spi_free_chipselects(dev); 834 of_mpc8xxx_spi_free_chipselects(dev);
835err_clk: 835err_clk:
836 kfree(pinfo); 836 kfree(pinfo);
837 return ret; 837 return ret;
838} 838}
839 839
840static int __devexit of_mpc83xx_spi_remove(struct of_device *ofdev) 840static int __devexit of_mpc8xxx_spi_remove(struct of_device *ofdev)
841{ 841{
842 int ret; 842 int ret;
843 843
844 ret = mpc83xx_spi_remove(&ofdev->dev); 844 ret = mpc8xxx_spi_remove(&ofdev->dev);
845 if (ret) 845 if (ret)
846 return ret; 846 return ret;
847 of_mpc83xx_spi_free_chipselects(&ofdev->dev); 847 of_mpc8xxx_spi_free_chipselects(&ofdev->dev);
848 return 0; 848 return 0;
849} 849}
850 850
851static const struct of_device_id of_mpc83xx_spi_match[] = { 851static const struct of_device_id of_mpc8xxx_spi_match[] = {
852 { .compatible = "fsl,spi" }, 852 { .compatible = "fsl,spi" },
853 {}, 853 {},
854}; 854};
855MODULE_DEVICE_TABLE(of, of_mpc83xx_spi_match); 855MODULE_DEVICE_TABLE(of, of_mpc8xxx_spi_match);
856 856
857static struct of_platform_driver of_mpc83xx_spi_driver = { 857static struct of_platform_driver of_mpc8xxx_spi_driver = {
858 .name = "mpc83xx_spi", 858 .name = "mpc8xxx_spi",
859 .match_table = of_mpc83xx_spi_match, 859 .match_table = of_mpc8xxx_spi_match,
860 .probe = of_mpc83xx_spi_probe, 860 .probe = of_mpc8xxx_spi_probe,
861 .remove = __devexit_p(of_mpc83xx_spi_remove), 861 .remove = __devexit_p(of_mpc8xxx_spi_remove),
862}; 862};
863 863
864#ifdef CONFIG_MPC832x_RDB 864#ifdef CONFIG_MPC832x_RDB
@@ -869,7 +869,7 @@ static struct of_platform_driver of_mpc83xx_spi_driver = {
869 * tree can work with OpenFirmware driver. But for now we support old trees 869 * tree can work with OpenFirmware driver. But for now we support old trees
870 * as well. 870 * as well.
871 */ 871 */
872static int __devinit plat_mpc83xx_spi_probe(struct platform_device *pdev) 872static int __devinit plat_mpc8xxx_spi_probe(struct platform_device *pdev)
873{ 873{
874 struct resource *mem; 874 struct resource *mem;
875 unsigned int irq; 875 unsigned int irq;
@@ -886,23 +886,23 @@ static int __devinit plat_mpc83xx_spi_probe(struct platform_device *pdev)
886 if (!irq) 886 if (!irq)
887 return -EINVAL; 887 return -EINVAL;
888 888
889 master = mpc83xx_spi_probe(&pdev->dev, mem, irq); 889 master = mpc8xxx_spi_probe(&pdev->dev, mem, irq);
890 if (IS_ERR(master)) 890 if (IS_ERR(master))
891 return PTR_ERR(master); 891 return PTR_ERR(master);
892 return 0; 892 return 0;
893} 893}
894 894
895static int __devexit plat_mpc83xx_spi_remove(struct platform_device *pdev) 895static int __devexit plat_mpc8xxx_spi_remove(struct platform_device *pdev)
896{ 896{
897 return mpc83xx_spi_remove(&pdev->dev); 897 return mpc8xxx_spi_remove(&pdev->dev);
898} 898}
899 899
900MODULE_ALIAS("platform:mpc83xx_spi"); 900MODULE_ALIAS("platform:mpc8xxx_spi");
901static struct platform_driver mpc83xx_spi_driver = { 901static struct platform_driver mpc8xxx_spi_driver = {
902 .probe = plat_mpc83xx_spi_probe, 902 .probe = plat_mpc8xxx_spi_probe,
903 .remove = __exit_p(plat_mpc83xx_spi_remove), 903 .remove = __exit_p(plat_mpc8xxx_spi_remove),
904 .driver = { 904 .driver = {
905 .name = "mpc83xx_spi", 905 .name = "mpc8xxx_spi",
906 .owner = THIS_MODULE, 906 .owner = THIS_MODULE,
907 }, 907 },
908}; 908};
@@ -911,35 +911,35 @@ static bool legacy_driver_failed;
911 911
912static void __init legacy_driver_register(void) 912static void __init legacy_driver_register(void)
913{ 913{
914 legacy_driver_failed = platform_driver_register(&mpc83xx_spi_driver); 914 legacy_driver_failed = platform_driver_register(&mpc8xxx_spi_driver);
915} 915}
916 916
917static void __exit legacy_driver_unregister(void) 917static void __exit legacy_driver_unregister(void)
918{ 918{
919 if (legacy_driver_failed) 919 if (legacy_driver_failed)
920 return; 920 return;
921 platform_driver_unregister(&mpc83xx_spi_driver); 921 platform_driver_unregister(&mpc8xxx_spi_driver);
922} 922}
923#else 923#else
924static void __init legacy_driver_register(void) {} 924static void __init legacy_driver_register(void) {}
925static void __exit legacy_driver_unregister(void) {} 925static void __exit legacy_driver_unregister(void) {}
926#endif /* CONFIG_MPC832x_RDB */ 926#endif /* CONFIG_MPC832x_RDB */
927 927
928static int __init mpc83xx_spi_init(void) 928static int __init mpc8xxx_spi_init(void)
929{ 929{
930 legacy_driver_register(); 930 legacy_driver_register();
931 return of_register_platform_driver(&of_mpc83xx_spi_driver); 931 return of_register_platform_driver(&of_mpc8xxx_spi_driver);
932} 932}
933 933
934static void __exit mpc83xx_spi_exit(void) 934static void __exit mpc8xxx_spi_exit(void)
935{ 935{
936 of_unregister_platform_driver(&of_mpc83xx_spi_driver); 936 of_unregister_platform_driver(&of_mpc8xxx_spi_driver);
937 legacy_driver_unregister(); 937 legacy_driver_unregister();
938} 938}
939 939
940module_init(mpc83xx_spi_init); 940module_init(mpc8xxx_spi_init);
941module_exit(mpc83xx_spi_exit); 941module_exit(mpc8xxx_spi_exit);
942 942
943MODULE_AUTHOR("Kumar Gala"); 943MODULE_AUTHOR("Kumar Gala");
944MODULE_DESCRIPTION("Simple MPC83xx SPI Driver"); 944MODULE_DESCRIPTION("Simple MPC8xxx SPI Driver");
945MODULE_LICENSE("GPL"); 945MODULE_LICENSE("GPL");