spi: davinci: configure the invariable bits in spipc0 only once

Configure the data-in, data-out and clock functionality pins
in SPIPC0 register only once during probe. No need to set these
bits for each transfer.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

1 files changed, 5 insertions, 3 deletions

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 45cc1a77a51..6f279c5d8f9 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -536,9 +536,6 @@ static int davinci_spi_bufs_prep(struct spi_device *spi,
          * optimize for both flags staying cleared.
          */
 
-        op_mode = SPIPC0_DIFUN_MASK
-                | SPIPC0_DOFUN_MASK
-                | SPIPC0_CLKFUN_MASK;
         if (!(spi->mode & SPI_NO_CS)) {
                 pdata = davinci_spi->pdata;
                 if (!pdata->chip_sel ||
@@ -886,6 +883,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
         resource_size_t dma_tx_chan = SPI_NO_RESOURCE;
         resource_size_t dma_eventq = SPI_NO_RESOURCE;
         int i = 0, ret = 0;
+        u32 spipc0;
 
         pdata = pdev->dev.platform_data;
         if (pdata == NULL) {
@@ -1028,6 +1026,10 @@ static int davinci_spi_probe(struct platform_device *pdev)
         udelay(100);
         iowrite32(1, davinci_spi->base + SPIGCR0);
 
+        /* Set up SPIPC0.  CS and ENA init is done in davinci_spi_bufs_prep */
+        spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK;
+        iowrite32(spipc0, davinci_spi->base + SPIPC0);
+
         /* initialize chip selects */
         if (pdata->chip_sel) {
                 for (i = 0; i < pdata->num_chipselect; i++) {