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authorRichard Röjfors <richard.rojfors.ext@mocean-labs.com>2009-06-22 13:43:03 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-22 14:32:25 -0400
commit2421c48bd74debb537de94c1bd15cbabab272aa1 (patch)
tree8e98a6011203769e3aa574f5b7e262a3ac54de32 /drivers/serial
parentbe10eb7589337e5defbe214dae038a53dd21add8 (diff)
timbuart: Fix for tx_empty
Hardware updated to support TX FIFO empty. Signed-off-by: Richard Röjfors <richard.rojfors.ext@mocean-labs.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/timbuart.c50
1 files changed, 25 insertions, 25 deletions
diff --git a/drivers/serial/timbuart.c b/drivers/serial/timbuart.c
index ac9e5d5f742..063a313b755 100644
--- a/drivers/serial/timbuart.c
+++ b/drivers/serial/timbuart.c
@@ -33,29 +33,29 @@ struct timbuart_port {
33 struct uart_port port; 33 struct uart_port port;
34 struct tasklet_struct tasklet; 34 struct tasklet_struct tasklet;
35 int usedma; 35 int usedma;
36 u8 last_ier; 36 u32 last_ier;
37 struct platform_device *dev; 37 struct platform_device *dev;
38}; 38};
39 39
40static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800, 40static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
41 921600, 1843200, 3250000}; 41 921600, 1843200, 3250000};
42 42
43static void timbuart_mctrl_check(struct uart_port *port, u8 isr, u8 *ier); 43static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
44 44
45static irqreturn_t timbuart_handleinterrupt(int irq, void *devid); 45static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
46 46
47static void timbuart_stop_rx(struct uart_port *port) 47static void timbuart_stop_rx(struct uart_port *port)
48{ 48{
49 /* spin lock held by upper layer, disable all RX interrupts */ 49 /* spin lock held by upper layer, disable all RX interrupts */
50 u8 ier = ioread8(port->membase + TIMBUART_IER) & ~RXFLAGS; 50 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
51 iowrite8(ier, port->membase + TIMBUART_IER); 51 iowrite32(ier, port->membase + TIMBUART_IER);
52} 52}
53 53
54static void timbuart_stop_tx(struct uart_port *port) 54static void timbuart_stop_tx(struct uart_port *port)
55{ 55{
56 /* spinlock held by upper layer, disable TX interrupt */ 56 /* spinlock held by upper layer, disable TX interrupt */
57 u8 ier = ioread8(port->membase + TIMBUART_IER) & ~TXBAE; 57 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
58 iowrite8(ier, port->membase + TIMBUART_IER); 58 iowrite32(ier, port->membase + TIMBUART_IER);
59} 59}
60 60
61static void timbuart_start_tx(struct uart_port *port) 61static void timbuart_start_tx(struct uart_port *port)
@@ -72,14 +72,14 @@ static void timbuart_flush_buffer(struct uart_port *port)
72 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | TIMBUART_CTRL_FLSHTX; 72 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) | TIMBUART_CTRL_FLSHTX;
73 73
74 iowrite8(ctl, port->membase + TIMBUART_CTRL); 74 iowrite8(ctl, port->membase + TIMBUART_CTRL);
75 iowrite8(TXBF, port->membase + TIMBUART_ISR); 75 iowrite32(TXBF, port->membase + TIMBUART_ISR);
76} 76}
77 77
78static void timbuart_rx_chars(struct uart_port *port) 78static void timbuart_rx_chars(struct uart_port *port)
79{ 79{
80 struct tty_struct *tty = port->info->port.tty; 80 struct tty_struct *tty = port->info->port.tty;
81 81
82 while (ioread8(port->membase + TIMBUART_ISR) & RXDP) { 82 while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
83 u8 ch = ioread8(port->membase + TIMBUART_RXFIFO); 83 u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
84 port->icount.rx++; 84 port->icount.rx++;
85 tty_insert_flip_char(tty, ch, TTY_NORMAL); 85 tty_insert_flip_char(tty, ch, TTY_NORMAL);
@@ -97,7 +97,7 @@ static void timbuart_tx_chars(struct uart_port *port)
97{ 97{
98 struct circ_buf *xmit = &port->info->xmit; 98 struct circ_buf *xmit = &port->info->xmit;
99 99
100 while (!(ioread8(port->membase + TIMBUART_ISR) & TXBF) && 100 while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
101 !uart_circ_empty(xmit)) { 101 !uart_circ_empty(xmit)) {
102 iowrite8(xmit->buf[xmit->tail], 102 iowrite8(xmit->buf[xmit->tail],
103 port->membase + TIMBUART_TXFIFO); 103 port->membase + TIMBUART_TXFIFO);
@@ -114,7 +114,7 @@ static void timbuart_tx_chars(struct uart_port *port)
114 ioread8(port->membase + TIMBUART_BAUDRATE)); 114 ioread8(port->membase + TIMBUART_BAUDRATE));
115} 115}
116 116
117static void timbuart_handle_tx_port(struct uart_port *port, u8 isr, u8 *ier) 117static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
118{ 118{
119 struct timbuart_port *uart = 119 struct timbuart_port *uart =
120 container_of(port, struct timbuart_port, port); 120 container_of(port, struct timbuart_port, port);
@@ -129,7 +129,7 @@ static void timbuart_handle_tx_port(struct uart_port *port, u8 isr, u8 *ier)
129 if (isr & TXFLAGS) { 129 if (isr & TXFLAGS) {
130 timbuart_tx_chars(port); 130 timbuart_tx_chars(port);
131 /* clear all TX interrupts */ 131 /* clear all TX interrupts */
132 iowrite8(TXFLAGS, port->membase + TIMBUART_ISR); 132 iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
133 133
134 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 134 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
135 uart_write_wakeup(port); 135 uart_write_wakeup(port);
@@ -148,7 +148,7 @@ static void timbuart_handle_tx_port(struct uart_port *port, u8 isr, u8 *ier)
148 dev_dbg(port->dev, "%s - leaving\n", __func__); 148 dev_dbg(port->dev, "%s - leaving\n", __func__);
149} 149}
150 150
151void timbuart_handle_rx_port(struct uart_port *port, u8 isr, u8 *ier) 151void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
152{ 152{
153 if (isr & RXFLAGS) { 153 if (isr & RXFLAGS) {
154 /* Some RX status is set */ 154 /* Some RX status is set */
@@ -161,7 +161,7 @@ void timbuart_handle_rx_port(struct uart_port *port, u8 isr, u8 *ier)
161 timbuart_rx_chars(port); 161 timbuart_rx_chars(port);
162 162
163 /* ack all RX interrupts */ 163 /* ack all RX interrupts */
164 iowrite8(RXFLAGS, port->membase + TIMBUART_ISR); 164 iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
165 } 165 }
166 166
167 /* always have the RX interrupts enabled */ 167 /* always have the RX interrupts enabled */
@@ -173,11 +173,11 @@ void timbuart_handle_rx_port(struct uart_port *port, u8 isr, u8 *ier)
173void timbuart_tasklet(unsigned long arg) 173void timbuart_tasklet(unsigned long arg)
174{ 174{
175 struct timbuart_port *uart = (struct timbuart_port *)arg; 175 struct timbuart_port *uart = (struct timbuart_port *)arg;
176 u8 isr, ier = 0; 176 u32 isr, ier = 0;
177 177
178 spin_lock(&uart->port.lock); 178 spin_lock(&uart->port.lock);
179 179
180 isr = ioread8(uart->port.membase + TIMBUART_ISR); 180 isr = ioread32(uart->port.membase + TIMBUART_ISR);
181 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr); 181 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
182 182
183 if (!uart->usedma) 183 if (!uart->usedma)
@@ -188,7 +188,7 @@ void timbuart_tasklet(unsigned long arg)
188 if (!uart->usedma) 188 if (!uart->usedma)
189 timbuart_handle_rx_port(&uart->port, isr, &ier); 189 timbuart_handle_rx_port(&uart->port, isr, &ier);
190 190
191 iowrite8(ier, uart->port.membase + TIMBUART_IER); 191 iowrite32(ier, uart->port.membase + TIMBUART_IER);
192 192
193 spin_unlock(&uart->port.lock); 193 spin_unlock(&uart->port.lock);
194 dev_dbg(uart->port.dev, "%s leaving\n", __func__); 194 dev_dbg(uart->port.dev, "%s leaving\n", __func__);
@@ -196,9 +196,9 @@ void timbuart_tasklet(unsigned long arg)
196 196
197static unsigned int timbuart_tx_empty(struct uart_port *port) 197static unsigned int timbuart_tx_empty(struct uart_port *port)
198{ 198{
199 u8 isr = ioread8(port->membase + TIMBUART_ISR); 199 u32 isr = ioread32(port->membase + TIMBUART_ISR);
200 200
201 return (isr & TXBAE) ? TIOCSER_TEMT : 0; 201 return (isr & TXBE) ? TIOCSER_TEMT : 0;
202} 202}
203 203
204static unsigned int timbuart_get_mctrl(struct uart_port *port) 204static unsigned int timbuart_get_mctrl(struct uart_port *port)
@@ -222,13 +222,13 @@ static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
222 iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL); 222 iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
223} 223}
224 224
225static void timbuart_mctrl_check(struct uart_port *port, u8 isr, u8 *ier) 225static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
226{ 226{
227 unsigned int cts; 227 unsigned int cts;
228 228
229 if (isr & CTS_DELTA) { 229 if (isr & CTS_DELTA) {
230 /* ack */ 230 /* ack */
231 iowrite8(CTS_DELTA, port->membase + TIMBUART_ISR); 231 iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
232 cts = timbuart_get_mctrl(port); 232 cts = timbuart_get_mctrl(port);
233 uart_handle_cts_change(port, cts & TIOCM_CTS); 233 uart_handle_cts_change(port, cts & TIOCM_CTS);
234 wake_up_interruptible(&port->info->delta_msr_wait); 234 wake_up_interruptible(&port->info->delta_msr_wait);
@@ -255,9 +255,9 @@ static int timbuart_startup(struct uart_port *port)
255 dev_dbg(port->dev, "%s\n", __func__); 255 dev_dbg(port->dev, "%s\n", __func__);
256 256
257 iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL); 257 iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
258 iowrite8(0xff, port->membase + TIMBUART_ISR); 258 iowrite32(0x1ff, port->membase + TIMBUART_ISR);
259 /* Enable all but TX interrupts */ 259 /* Enable all but TX interrupts */
260 iowrite8(RXBAF | RXBF | RXTT | CTS_DELTA, 260 iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
261 port->membase + TIMBUART_IER); 261 port->membase + TIMBUART_IER);
262 262
263 return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED, 263 return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
@@ -270,7 +270,7 @@ static void timbuart_shutdown(struct uart_port *port)
270 container_of(port, struct timbuart_port, port); 270 container_of(port, struct timbuart_port, port);
271 dev_dbg(port->dev, "%s\n", __func__); 271 dev_dbg(port->dev, "%s\n", __func__);
272 free_irq(port->irq, uart); 272 free_irq(port->irq, uart);
273 iowrite8(0, port->membase + TIMBUART_IER); 273 iowrite32(0, port->membase + TIMBUART_IER);
274} 274}
275 275
276static int get_bindex(int baud) 276static int get_bindex(int baud)
@@ -359,10 +359,10 @@ static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
359 struct timbuart_port *uart = (struct timbuart_port *)devid; 359 struct timbuart_port *uart = (struct timbuart_port *)devid;
360 360
361 if (ioread8(uart->port.membase + TIMBUART_IPR)) { 361 if (ioread8(uart->port.membase + TIMBUART_IPR)) {
362 uart->last_ier = ioread8(uart->port.membase + TIMBUART_IER); 362 uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
363 363
364 /* disable interrupts, the tasklet enables them again */ 364 /* disable interrupts, the tasklet enables them again */
365 iowrite8(0, uart->port.membase + TIMBUART_IER); 365 iowrite32(0, uart->port.membase + TIMBUART_IER);
366 366
367 /* fire off bottom half */ 367 /* fire off bottom half */
368 tasklet_schedule(&uart->tasklet); 368 tasklet_schedule(&uart->tasklet);