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authorVikas Chaudhary <vikas.chaudhary@qlogic.com>2012-08-22 07:55:00 -0400
committerJames Bottomley <JBottomley@Parallels.com>2012-09-24 04:11:05 -0400
commit7664a1fd76d2eb49b07443f5fc46c75f6a95c98b (patch)
tree5de92246dbf6a7f3c828c5441deb99a123254932 /drivers/scsi
parentf8086f4fd462195a5a824c851997bd12ffceae00 (diff)
[SCSI] qla4xxx: Update structure and variable names
Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com> Reviewed-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/qla4xxx/ql4_dbg.c2
-rw-r--r--drivers/scsi/qla4xxx/ql4_def.h2
-rw-r--r--drivers/scsi/qla4xxx/ql4_init.c6
-rw-r--r--drivers/scsi/qla4xxx/ql4_iocb.c4
-rw-r--r--drivers/scsi/qla4xxx/ql4_isr.c22
-rw-r--r--drivers/scsi/qla4xxx/ql4_mbx.c12
-rw-r--r--drivers/scsi/qla4xxx/ql4_nx.c80
-rw-r--r--drivers/scsi/qla4xxx/ql4_nx.h30
-rw-r--r--drivers/scsi/qla4xxx/ql4_os.c14
9 files changed, 86 insertions, 86 deletions
diff --git a/drivers/scsi/qla4xxx/ql4_dbg.c b/drivers/scsi/qla4xxx/ql4_dbg.c
index 8d58ae27482..ea6af8ca6b3 100644
--- a/drivers/scsi/qla4xxx/ql4_dbg.c
+++ b/drivers/scsi/qla4xxx/ql4_dbg.c
@@ -37,7 +37,7 @@ void qla4xxx_dump_registers(struct scsi_qla_host *ha)
37 if (is_qla8022(ha)) { 37 if (is_qla8022(ha)) {
38 for (i = 1; i < MBOX_REG_COUNT; i++) 38 for (i = 1; i < MBOX_REG_COUNT; i++)
39 printk(KERN_INFO "mailbox[%d] = 0x%08X\n", 39 printk(KERN_INFO "mailbox[%d] = 0x%08X\n",
40 i, readl(&ha->qla4_8xxx_reg->mailbox_in[i])); 40 i, readl(&ha->qla4_82xx_reg->mailbox_in[i]));
41 return; 41 return;
42 } 42 }
43 43
diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h
index c298ee9002f..1d6d1a9db0b 100644
--- a/drivers/scsi/qla4xxx/ql4_def.h
+++ b/drivers/scsi/qla4xxx/ql4_def.h
@@ -647,7 +647,7 @@ struct scsi_qla_host {
647 uint8_t acb_version; 647 uint8_t acb_version;
648 648
649 /* qla82xx specific fields */ 649 /* qla82xx specific fields */
650 struct device_reg_82xx __iomem *qla4_8xxx_reg; /* Base I/O address */ 650 struct device_reg_82xx __iomem *qla4_82xx_reg; /* Base I/O address */
651 unsigned long nx_pcibase; /* Base I/O address */ 651 unsigned long nx_pcibase; /* Base I/O address */
652 uint8_t *nx_db_rd_ptr; /* Doorbell read pointer */ 652 uint8_t *nx_db_rd_ptr; /* Doorbell read pointer */
653 unsigned long nx_db_wr_ptr; /* Door bell write pointer */ 653 unsigned long nx_db_wr_ptr; /* Door bell write pointer */
diff --git a/drivers/scsi/qla4xxx/ql4_init.c b/drivers/scsi/qla4xxx/ql4_init.c
index ddd9472066c..6bc983df9d9 100644
--- a/drivers/scsi/qla4xxx/ql4_init.c
+++ b/drivers/scsi/qla4xxx/ql4_init.c
@@ -102,11 +102,11 @@ int qla4xxx_init_rings(struct scsi_qla_host *ha)
102 102
103 if (is_qla8022(ha)) { 103 if (is_qla8022(ha)) {
104 writel(0, 104 writel(0,
105 (unsigned long __iomem *)&ha->qla4_8xxx_reg->req_q_out); 105 (unsigned long __iomem *)&ha->qla4_82xx_reg->req_q_out);
106 writel(0, 106 writel(0,
107 (unsigned long __iomem *)&ha->qla4_8xxx_reg->rsp_q_in); 107 (unsigned long __iomem *)&ha->qla4_82xx_reg->rsp_q_in);
108 writel(0, 108 writel(0,
109 (unsigned long __iomem *)&ha->qla4_8xxx_reg->rsp_q_out); 109 (unsigned long __iomem *)&ha->qla4_82xx_reg->rsp_q_out);
110 } else { 110 } else {
111 /* 111 /*
112 * Initialize DMA Shadow registers. The firmware is really 112 * Initialize DMA Shadow registers. The firmware is really
diff --git a/drivers/scsi/qla4xxx/ql4_iocb.c b/drivers/scsi/qla4xxx/ql4_iocb.c
index cc70ff9f5cf..1def68879f9 100644
--- a/drivers/scsi/qla4xxx/ql4_iocb.c
+++ b/drivers/scsi/qla4xxx/ql4_iocb.c
@@ -219,8 +219,8 @@ void qla4_82xx_queue_iocb(struct scsi_qla_host *ha)
219 **/ 219 **/
220void qla4_82xx_complete_iocb(struct scsi_qla_host *ha) 220void qla4_82xx_complete_iocb(struct scsi_qla_host *ha)
221{ 221{
222 writel(ha->response_out, &ha->qla4_8xxx_reg->rsp_q_out); 222 writel(ha->response_out, &ha->qla4_82xx_reg->rsp_q_out);
223 readl(&ha->qla4_8xxx_reg->rsp_q_out); 223 readl(&ha->qla4_82xx_reg->rsp_q_out);
224} 224}
225 225
226/** 226/**
diff --git a/drivers/scsi/qla4xxx/ql4_isr.c b/drivers/scsi/qla4xxx/ql4_isr.c
index 26546eb4f18..dda602cee43 100644
--- a/drivers/scsi/qla4xxx/ql4_isr.c
+++ b/drivers/scsi/qla4xxx/ql4_isr.c
@@ -607,7 +607,7 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha,
607 */ 607 */
608 for (i = 0; i < ha->mbox_status_count; i++) 608 for (i = 0; i < ha->mbox_status_count; i++)
609 ha->mbox_status[i] = is_qla8022(ha) 609 ha->mbox_status[i] = is_qla8022(ha)
610 ? readl(&ha->qla4_8xxx_reg->mailbox_out[i]) 610 ? readl(&ha->qla4_82xx_reg->mailbox_out[i])
611 : readl(&ha->reg->mailbox[i]); 611 : readl(&ha->reg->mailbox[i]);
612 612
613 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags); 613 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags);
@@ -618,7 +618,7 @@ static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha,
618 } else if (mbox_status >> 12 == MBOX_ASYNC_EVENT_STATUS) { 618 } else if (mbox_status >> 12 == MBOX_ASYNC_EVENT_STATUS) {
619 for (i = 0; i < MBOX_AEN_REG_COUNT; i++) 619 for (i = 0; i < MBOX_AEN_REG_COUNT; i++)
620 mbox_sts[i] = is_qla8022(ha) 620 mbox_sts[i] = is_qla8022(ha)
621 ? readl(&ha->qla4_8xxx_reg->mailbox_out[i]) 621 ? readl(&ha->qla4_82xx_reg->mailbox_out[i])
622 : readl(&ha->reg->mailbox[i]); 622 : readl(&ha->reg->mailbox[i]);
623 623
624 /* Immediately process the AENs that don't require much work. 624 /* Immediately process the AENs that don't require much work.
@@ -832,11 +832,11 @@ void qla4_82xx_interrupt_service_routine(struct scsi_qla_host *ha,
832 /* Process mailbox/asynch event interrupt.*/ 832 /* Process mailbox/asynch event interrupt.*/
833 if (intr_status & HSRX_RISC_MB_INT) 833 if (intr_status & HSRX_RISC_MB_INT)
834 qla4xxx_isr_decode_mailbox(ha, 834 qla4xxx_isr_decode_mailbox(ha,
835 readl(&ha->qla4_8xxx_reg->mailbox_out[0])); 835 readl(&ha->qla4_82xx_reg->mailbox_out[0]));
836 836
837 /* clear the interrupt */ 837 /* clear the interrupt */
838 writel(0, &ha->qla4_8xxx_reg->host_int); 838 writel(0, &ha->qla4_82xx_reg->host_int);
839 readl(&ha->qla4_8xxx_reg->host_int); 839 readl(&ha->qla4_82xx_reg->host_int);
840} 840}
841 841
842/** 842/**
@@ -879,7 +879,7 @@ static void qla4_82xx_spurious_interrupt(struct scsi_qla_host *ha,
879 879
880 DEBUG2(ql4_printk(KERN_INFO, ha, "Spurious Interrupt\n")); 880 DEBUG2(ql4_printk(KERN_INFO, ha, "Spurious Interrupt\n"));
881 if (is_qla8022(ha)) { 881 if (is_qla8022(ha)) {
882 writel(0, &ha->qla4_8xxx_reg->host_int); 882 writel(0, &ha->qla4_82xx_reg->host_int);
883 if (test_bit(AF_INTx_ENABLED, &ha->flags)) 883 if (test_bit(AF_INTx_ENABLED, &ha->flags))
884 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 884 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg,
885 0xfbff); 885 0xfbff);
@@ -1020,12 +1020,12 @@ irqreturn_t qla4_82xx_intr_handler(int irq, void *dev_id)
1020 1020
1021 spin_lock_irqsave(&ha->hardware_lock, flags); 1021 spin_lock_irqsave(&ha->hardware_lock, flags);
1022 while (1) { 1022 while (1) {
1023 if (!(readl(&ha->qla4_8xxx_reg->host_int) & 1023 if (!(readl(&ha->qla4_82xx_reg->host_int) &
1024 ISRX_82XX_RISC_INT)) { 1024 ISRX_82XX_RISC_INT)) {
1025 qla4_82xx_spurious_interrupt(ha, reqs_count); 1025 qla4_82xx_spurious_interrupt(ha, reqs_count);
1026 break; 1026 break;
1027 } 1027 }
1028 intr_status = readl(&ha->qla4_8xxx_reg->host_status); 1028 intr_status = readl(&ha->qla4_82xx_reg->host_status);
1029 if ((intr_status & 1029 if ((intr_status &
1030 (HSRX_RISC_MB_INT | HSRX_RISC_IOCB_INT)) == 0) { 1030 (HSRX_RISC_MB_INT | HSRX_RISC_IOCB_INT)) == 0) {
1031 qla4_82xx_spurious_interrupt(ha, reqs_count); 1031 qla4_82xx_spurious_interrupt(ha, reqs_count);
@@ -1086,13 +1086,13 @@ qla4_8xxx_default_intr_handler(int irq, void *dev_id)
1086 1086
1087 spin_lock_irqsave(&ha->hardware_lock, flags); 1087 spin_lock_irqsave(&ha->hardware_lock, flags);
1088 while (1) { 1088 while (1) {
1089 if (!(readl(&ha->qla4_8xxx_reg->host_int) & 1089 if (!(readl(&ha->qla4_82xx_reg->host_int) &
1090 ISRX_82XX_RISC_INT)) { 1090 ISRX_82XX_RISC_INT)) {
1091 qla4_82xx_spurious_interrupt(ha, reqs_count); 1091 qla4_82xx_spurious_interrupt(ha, reqs_count);
1092 break; 1092 break;
1093 } 1093 }
1094 1094
1095 intr_status = readl(&ha->qla4_8xxx_reg->host_status); 1095 intr_status = readl(&ha->qla4_82xx_reg->host_status);
1096 if ((intr_status & 1096 if ((intr_status &
1097 (HSRX_RISC_MB_INT | HSRX_RISC_IOCB_INT)) == 0) { 1097 (HSRX_RISC_MB_INT | HSRX_RISC_IOCB_INT)) == 0) {
1098 qla4_82xx_spurious_interrupt(ha, reqs_count); 1098 qla4_82xx_spurious_interrupt(ha, reqs_count);
@@ -1118,7 +1118,7 @@ qla4_8xxx_msix_rsp_q(int irq, void *dev_id)
1118 1118
1119 spin_lock_irqsave(&ha->hardware_lock, flags); 1119 spin_lock_irqsave(&ha->hardware_lock, flags);
1120 qla4xxx_process_response_queue(ha); 1120 qla4xxx_process_response_queue(ha);
1121 writel(0, &ha->qla4_8xxx_reg->host_int); 1121 writel(0, &ha->qla4_82xx_reg->host_int);
1122 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1122 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1123 1123
1124 ha->isr_count++; 1124 ha->isr_count++;
diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c
index 8f05a8866ad..e99b6716733 100644
--- a/drivers/scsi/qla4xxx/ql4_mbx.c
+++ b/drivers/scsi/qla4xxx/ql4_mbx.c
@@ -111,10 +111,10 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
111 printk("\n")); 111 printk("\n"));
112 112
113 for (i = 1; i < inCount; i++) 113 for (i = 1; i < inCount; i++)
114 writel(mbx_cmd[i], &ha->qla4_8xxx_reg->mailbox_in[i]); 114 writel(mbx_cmd[i], &ha->qla4_82xx_reg->mailbox_in[i]);
115 writel(mbx_cmd[0], &ha->qla4_8xxx_reg->mailbox_in[0]); 115 writel(mbx_cmd[0], &ha->qla4_82xx_reg->mailbox_in[0]);
116 readl(&ha->qla4_8xxx_reg->mailbox_in[0]); 116 readl(&ha->qla4_82xx_reg->mailbox_in[0]);
117 writel(HINT_MBX_INT_PENDING, &ha->qla4_8xxx_reg->hint); 117 writel(HINT_MBX_INT_PENDING, &ha->qla4_82xx_reg->hint);
118 } else { 118 } else {
119 /* Load all mailbox registers, except mailbox 0. */ 119 /* Load all mailbox registers, except mailbox 0. */
120 for (i = 1; i < inCount; i++) 120 for (i = 1; i < inCount; i++)
@@ -169,11 +169,11 @@ int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount,
169 spin_lock_irqsave(&ha->hardware_lock, flags); 169 spin_lock_irqsave(&ha->hardware_lock, flags);
170 if (is_qla8022(ha)) { 170 if (is_qla8022(ha)) {
171 intr_status = 171 intr_status =
172 readl(&ha->qla4_8xxx_reg->host_int); 172 readl(&ha->qla4_82xx_reg->host_int);
173 if (intr_status & ISRX_82XX_RISC_INT) { 173 if (intr_status & ISRX_82XX_RISC_INT) {
174 ha->mbox_status_count = outCount; 174 ha->mbox_status_count = outCount;
175 intr_status = 175 intr_status =
176 readl(&ha->qla4_8xxx_reg->host_status); 176 readl(&ha->qla4_82xx_reg->host_status);
177 ha->isp_ops->interrupt_service_routine( 177 ha->isp_ops->interrupt_service_routine(
178 ha, intr_status); 178 ha, intr_status);
179 if (test_bit(AF_INTERRUPTS_ON, 179 if (test_bit(AF_INTERRUPTS_ON,
diff --git a/drivers/scsi/qla4xxx/ql4_nx.c b/drivers/scsi/qla4xxx/ql4_nx.c
index 404555adaf7..fa34e20b7d8 100644
--- a/drivers/scsi/qla4xxx/ql4_nx.c
+++ b/drivers/scsi/qla4xxx/ql4_nx.c
@@ -27,7 +27,7 @@
27#define CRB_BLK(off) ((off >> 20) & 0x3f) 27#define CRB_BLK(off) ((off >> 20) & 0x3f)
28#define CRB_SUBBLK(off) ((off >> 16) & 0xf) 28#define CRB_SUBBLK(off) ((off >> 16) & 0xf)
29#define CRB_WINDOW_2M (0x130060) 29#define CRB_WINDOW_2M (0x130060)
30#define CRB_HI(off) ((qla4_8xxx_crb_hub_agt[CRB_BLK(off)] << 20) | \ 30#define CRB_HI(off) ((qla4_82xx_crb_hub_agt[CRB_BLK(off)] << 20) | \
31 ((off) & 0xf0000)) 31 ((off) & 0xf0000))
32#define QLA82XX_PCI_CAMQM_2M_END (0x04800800UL) 32#define QLA82XX_PCI_CAMQM_2M_END (0x04800800UL)
33#define QLA82XX_PCI_CAMQM_2M_BASE (0x000ff800UL) 33#define QLA82XX_PCI_CAMQM_2M_BASE (0x000ff800UL)
@@ -268,7 +268,7 @@ static struct crb_128M_2M_block_map crb_128M_2M_map[64] = {
268/* 268/*
269 * top 12 bits of crb internal address (hub, agent) 269 * top 12 bits of crb internal address (hub, agent)
270 */ 270 */
271static unsigned qla4_8xxx_crb_hub_agt[64] = { 271static unsigned qla4_82xx_crb_hub_agt[64] = {
272 0, 272 0,
273 QLA82XX_HW_CRB_HUB_AGT_ADR_PS, 273 QLA82XX_HW_CRB_HUB_AGT_ADR_PS,
274 QLA82XX_HW_CRB_HUB_AGT_ADR_MN, 274 QLA82XX_HW_CRB_HUB_AGT_ADR_MN,
@@ -584,7 +584,7 @@ qla4_82xx_pci_mem_bound_check(struct scsi_qla_host *ha,
584 return 1; 584 return 1;
585} 585}
586 586
587static int qla4_8xxx_pci_set_window_warning_count; 587static int qla4_82xx_pci_set_window_warning_count;
588 588
589static unsigned long 589static unsigned long
590qla4_82xx_pci_set_window(struct scsi_qla_host *ha, unsigned long long addr) 590qla4_82xx_pci_set_window(struct scsi_qla_host *ha, unsigned long long addr)
@@ -650,8 +650,8 @@ qla4_82xx_pci_set_window(struct scsi_qla_host *ha, unsigned long long addr)
650 * peg gdb frequently accesses memory that doesn't exist, 650 * peg gdb frequently accesses memory that doesn't exist,
651 * this limits the chit chat so debugging isn't slowed down. 651 * this limits the chit chat so debugging isn't slowed down.
652 */ 652 */
653 if ((qla4_8xxx_pci_set_window_warning_count++ < 8) || 653 if ((qla4_82xx_pci_set_window_warning_count++ < 8) ||
654 (qla4_8xxx_pci_set_window_warning_count%64 == 0)) { 654 (qla4_82xx_pci_set_window_warning_count%64 == 0)) {
655 printk("%s: Warning:%s Unknown address range!\n", 655 printk("%s: Warning:%s Unknown address range!\n",
656 __func__, DRIVER_NAME); 656 __func__, DRIVER_NAME);
657 } 657 }
@@ -860,7 +860,7 @@ qla4_82xx_decode_crb_addr(unsigned long addr)
860} 860}
861 861
862static long rom_max_timeout = 100; 862static long rom_max_timeout = 100;
863static long qla4_8xxx_rom_lock_timeout = 100; 863static long qla4_82xx_rom_lock_timeout = 100;
864 864
865static int 865static int
866qla4_82xx_rom_lock(struct scsi_qla_host *ha) 866qla4_82xx_rom_lock(struct scsi_qla_host *ha)
@@ -874,7 +874,7 @@ qla4_82xx_rom_lock(struct scsi_qla_host *ha)
874 done = qla4_82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK)); 874 done = qla4_82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK));
875 if (done == 1) 875 if (done == 1)
876 break; 876 break;
877 if (timeout >= qla4_8xxx_rom_lock_timeout) 877 if (timeout >= qla4_82xx_rom_lock_timeout)
878 return -1; 878 return -1;
879 879
880 timeout++; 880 timeout++;
@@ -1645,15 +1645,15 @@ static void qla4_82xx_rom_lock_recovery(struct scsi_qla_host *ha)
1645} 1645}
1646 1646
1647static void qla4_8xxx_minidump_process_rdcrb(struct scsi_qla_host *ha, 1647static void qla4_8xxx_minidump_process_rdcrb(struct scsi_qla_host *ha,
1648 struct qla82xx_minidump_entry_hdr *entry_hdr, 1648 struct qla8xxx_minidump_entry_hdr *entry_hdr,
1649 uint32_t **d_ptr) 1649 uint32_t **d_ptr)
1650{ 1650{
1651 uint32_t r_addr, r_stride, loop_cnt, i, r_value; 1651 uint32_t r_addr, r_stride, loop_cnt, i, r_value;
1652 struct qla82xx_minidump_entry_crb *crb_hdr; 1652 struct qla8xxx_minidump_entry_crb *crb_hdr;
1653 uint32_t *data_ptr = *d_ptr; 1653 uint32_t *data_ptr = *d_ptr;
1654 1654
1655 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); 1655 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));
1656 crb_hdr = (struct qla82xx_minidump_entry_crb *)entry_hdr; 1656 crb_hdr = (struct qla8xxx_minidump_entry_crb *)entry_hdr;
1657 r_addr = crb_hdr->addr; 1657 r_addr = crb_hdr->addr;
1658 r_stride = crb_hdr->crb_strd.addr_stride; 1658 r_stride = crb_hdr->crb_strd.addr_stride;
1659 loop_cnt = crb_hdr->op_count; 1659 loop_cnt = crb_hdr->op_count;
@@ -1668,19 +1668,19 @@ static void qla4_8xxx_minidump_process_rdcrb(struct scsi_qla_host *ha,
1668} 1668}
1669 1669
1670static int qla4_8xxx_minidump_process_l2tag(struct scsi_qla_host *ha, 1670static int qla4_8xxx_minidump_process_l2tag(struct scsi_qla_host *ha,
1671 struct qla82xx_minidump_entry_hdr *entry_hdr, 1671 struct qla8xxx_minidump_entry_hdr *entry_hdr,
1672 uint32_t **d_ptr) 1672 uint32_t **d_ptr)
1673{ 1673{
1674 uint32_t addr, r_addr, c_addr, t_r_addr; 1674 uint32_t addr, r_addr, c_addr, t_r_addr;
1675 uint32_t i, k, loop_count, t_value, r_cnt, r_value; 1675 uint32_t i, k, loop_count, t_value, r_cnt, r_value;
1676 unsigned long p_wait, w_time, p_mask; 1676 unsigned long p_wait, w_time, p_mask;
1677 uint32_t c_value_w, c_value_r; 1677 uint32_t c_value_w, c_value_r;
1678 struct qla82xx_minidump_entry_cache *cache_hdr; 1678 struct qla8xxx_minidump_entry_cache *cache_hdr;
1679 int rval = QLA_ERROR; 1679 int rval = QLA_ERROR;
1680 uint32_t *data_ptr = *d_ptr; 1680 uint32_t *data_ptr = *d_ptr;
1681 1681
1682 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); 1682 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));
1683 cache_hdr = (struct qla82xx_minidump_entry_cache *)entry_hdr; 1683 cache_hdr = (struct qla8xxx_minidump_entry_cache *)entry_hdr;
1684 1684
1685 loop_count = cache_hdr->op_count; 1685 loop_count = cache_hdr->op_count;
1686 r_addr = cache_hdr->read_addr; 1686 r_addr = cache_hdr->read_addr;
@@ -1727,9 +1727,9 @@ static int qla4_8xxx_minidump_process_l2tag(struct scsi_qla_host *ha,
1727} 1727}
1728 1728
1729static int qla4_8xxx_minidump_process_control(struct scsi_qla_host *ha, 1729static int qla4_8xxx_minidump_process_control(struct scsi_qla_host *ha,
1730 struct qla82xx_minidump_entry_hdr *entry_hdr) 1730 struct qla8xxx_minidump_entry_hdr *entry_hdr)
1731{ 1731{
1732 struct qla82xx_minidump_entry_crb *crb_entry; 1732 struct qla8xxx_minidump_entry_crb *crb_entry;
1733 uint32_t read_value, opcode, poll_time, addr, index, rval = QLA_SUCCESS; 1733 uint32_t read_value, opcode, poll_time, addr, index, rval = QLA_SUCCESS;
1734 uint32_t crb_addr; 1734 uint32_t crb_addr;
1735 unsigned long wtime; 1735 unsigned long wtime;
@@ -1739,7 +1739,7 @@ static int qla4_8xxx_minidump_process_control(struct scsi_qla_host *ha,
1739 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); 1739 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));
1740 tmplt_hdr = (struct qla4_8xxx_minidump_template_hdr *) 1740 tmplt_hdr = (struct qla4_8xxx_minidump_template_hdr *)
1741 ha->fw_dump_tmplt_hdr; 1741 ha->fw_dump_tmplt_hdr;
1742 crb_entry = (struct qla82xx_minidump_entry_crb *)entry_hdr; 1742 crb_entry = (struct qla8xxx_minidump_entry_crb *)entry_hdr;
1743 1743
1744 crb_addr = crb_entry->addr; 1744 crb_addr = crb_entry->addr;
1745 for (i = 0; i < crb_entry->op_count; i++) { 1745 for (i = 0; i < crb_entry->op_count; i++) {
@@ -1843,15 +1843,15 @@ static int qla4_8xxx_minidump_process_control(struct scsi_qla_host *ha,
1843} 1843}
1844 1844
1845static void qla4_8xxx_minidump_process_rdocm(struct scsi_qla_host *ha, 1845static void qla4_8xxx_minidump_process_rdocm(struct scsi_qla_host *ha,
1846 struct qla82xx_minidump_entry_hdr *entry_hdr, 1846 struct qla8xxx_minidump_entry_hdr *entry_hdr,
1847 uint32_t **d_ptr) 1847 uint32_t **d_ptr)
1848{ 1848{
1849 uint32_t r_addr, r_stride, loop_cnt, i, r_value; 1849 uint32_t r_addr, r_stride, loop_cnt, i, r_value;
1850 struct qla82xx_minidump_entry_rdocm *ocm_hdr; 1850 struct qla8xxx_minidump_entry_rdocm *ocm_hdr;
1851 uint32_t *data_ptr = *d_ptr; 1851 uint32_t *data_ptr = *d_ptr;
1852 1852
1853 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); 1853 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));
1854 ocm_hdr = (struct qla82xx_minidump_entry_rdocm *)entry_hdr; 1854 ocm_hdr = (struct qla8xxx_minidump_entry_rdocm *)entry_hdr;
1855 r_addr = ocm_hdr->read_addr; 1855 r_addr = ocm_hdr->read_addr;
1856 r_stride = ocm_hdr->read_addr_stride; 1856 r_stride = ocm_hdr->read_addr_stride;
1857 loop_cnt = ocm_hdr->op_count; 1857 loop_cnt = ocm_hdr->op_count;
@@ -1871,15 +1871,15 @@ static void qla4_8xxx_minidump_process_rdocm(struct scsi_qla_host *ha,
1871} 1871}
1872 1872
1873static void qla4_8xxx_minidump_process_rdmux(struct scsi_qla_host *ha, 1873static void qla4_8xxx_minidump_process_rdmux(struct scsi_qla_host *ha,
1874 struct qla82xx_minidump_entry_hdr *entry_hdr, 1874 struct qla8xxx_minidump_entry_hdr *entry_hdr,
1875 uint32_t **d_ptr) 1875 uint32_t **d_ptr)
1876{ 1876{
1877 uint32_t r_addr, s_stride, s_addr, s_value, loop_cnt, i, r_value; 1877 uint32_t r_addr, s_stride, s_addr, s_value, loop_cnt, i, r_value;
1878 struct qla82xx_minidump_entry_mux *mux_hdr; 1878 struct qla8xxx_minidump_entry_mux *mux_hdr;
1879 uint32_t *data_ptr = *d_ptr; 1879 uint32_t *data_ptr = *d_ptr;
1880 1880
1881 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); 1881 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));
1882 mux_hdr = (struct qla82xx_minidump_entry_mux *)entry_hdr; 1882 mux_hdr = (struct qla8xxx_minidump_entry_mux *)entry_hdr;
1883 r_addr = mux_hdr->read_addr; 1883 r_addr = mux_hdr->read_addr;
1884 s_addr = mux_hdr->select_addr; 1884 s_addr = mux_hdr->select_addr;
1885 s_stride = mux_hdr->select_value_stride; 1885 s_stride = mux_hdr->select_value_stride;
@@ -1897,16 +1897,16 @@ static void qla4_8xxx_minidump_process_rdmux(struct scsi_qla_host *ha,
1897} 1897}
1898 1898
1899static void qla4_8xxx_minidump_process_l1cache(struct scsi_qla_host *ha, 1899static void qla4_8xxx_minidump_process_l1cache(struct scsi_qla_host *ha,
1900 struct qla82xx_minidump_entry_hdr *entry_hdr, 1900 struct qla8xxx_minidump_entry_hdr *entry_hdr,
1901 uint32_t **d_ptr) 1901 uint32_t **d_ptr)
1902{ 1902{
1903 uint32_t addr, r_addr, c_addr, t_r_addr; 1903 uint32_t addr, r_addr, c_addr, t_r_addr;
1904 uint32_t i, k, loop_count, t_value, r_cnt, r_value; 1904 uint32_t i, k, loop_count, t_value, r_cnt, r_value;
1905 uint32_t c_value_w; 1905 uint32_t c_value_w;
1906 struct qla82xx_minidump_entry_cache *cache_hdr; 1906 struct qla8xxx_minidump_entry_cache *cache_hdr;
1907 uint32_t *data_ptr = *d_ptr; 1907 uint32_t *data_ptr = *d_ptr;
1908 1908
1909 cache_hdr = (struct qla82xx_minidump_entry_cache *)entry_hdr; 1909 cache_hdr = (struct qla8xxx_minidump_entry_cache *)entry_hdr;
1910 loop_count = cache_hdr->op_count; 1910 loop_count = cache_hdr->op_count;
1911 r_addr = cache_hdr->read_addr; 1911 r_addr = cache_hdr->read_addr;
1912 c_addr = cache_hdr->control_addr; 1912 c_addr = cache_hdr->control_addr;
@@ -1931,17 +1931,17 @@ static void qla4_8xxx_minidump_process_l1cache(struct scsi_qla_host *ha,
1931} 1931}
1932 1932
1933static void qla4_8xxx_minidump_process_queue(struct scsi_qla_host *ha, 1933static void qla4_8xxx_minidump_process_queue(struct scsi_qla_host *ha,
1934 struct qla82xx_minidump_entry_hdr *entry_hdr, 1934 struct qla8xxx_minidump_entry_hdr *entry_hdr,
1935 uint32_t **d_ptr) 1935 uint32_t **d_ptr)
1936{ 1936{
1937 uint32_t s_addr, r_addr; 1937 uint32_t s_addr, r_addr;
1938 uint32_t r_stride, r_value, r_cnt, qid = 0; 1938 uint32_t r_stride, r_value, r_cnt, qid = 0;
1939 uint32_t i, k, loop_cnt; 1939 uint32_t i, k, loop_cnt;
1940 struct qla82xx_minidump_entry_queue *q_hdr; 1940 struct qla8xxx_minidump_entry_queue *q_hdr;
1941 uint32_t *data_ptr = *d_ptr; 1941 uint32_t *data_ptr = *d_ptr;
1942 1942
1943 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); 1943 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));
1944 q_hdr = (struct qla82xx_minidump_entry_queue *)entry_hdr; 1944 q_hdr = (struct qla8xxx_minidump_entry_queue *)entry_hdr;
1945 s_addr = q_hdr->select_addr; 1945 s_addr = q_hdr->select_addr;
1946 r_cnt = q_hdr->rd_strd.read_addr_cnt; 1946 r_cnt = q_hdr->rd_strd.read_addr_cnt;
1947 r_stride = q_hdr->rd_strd.read_addr_stride; 1947 r_stride = q_hdr->rd_strd.read_addr_stride;
@@ -1964,16 +1964,16 @@ static void qla4_8xxx_minidump_process_queue(struct scsi_qla_host *ha,
1964#define MD_DIRECT_ROM_READ_BASE 0x42150000 1964#define MD_DIRECT_ROM_READ_BASE 0x42150000
1965 1965
1966static void qla4_82xx_minidump_process_rdrom(struct scsi_qla_host *ha, 1966static void qla4_82xx_minidump_process_rdrom(struct scsi_qla_host *ha,
1967 struct qla82xx_minidump_entry_hdr *entry_hdr, 1967 struct qla8xxx_minidump_entry_hdr *entry_hdr,
1968 uint32_t **d_ptr) 1968 uint32_t **d_ptr)
1969{ 1969{
1970 uint32_t r_addr, r_value; 1970 uint32_t r_addr, r_value;
1971 uint32_t i, loop_cnt; 1971 uint32_t i, loop_cnt;
1972 struct qla82xx_minidump_entry_rdrom *rom_hdr; 1972 struct qla8xxx_minidump_entry_rdrom *rom_hdr;
1973 uint32_t *data_ptr = *d_ptr; 1973 uint32_t *data_ptr = *d_ptr;
1974 1974
1975 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); 1975 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));
1976 rom_hdr = (struct qla82xx_minidump_entry_rdrom *)entry_hdr; 1976 rom_hdr = (struct qla8xxx_minidump_entry_rdrom *)entry_hdr;
1977 r_addr = rom_hdr->read_addr; 1977 r_addr = rom_hdr->read_addr;
1978 loop_cnt = rom_hdr->read_data_size/sizeof(uint32_t); 1978 loop_cnt = rom_hdr->read_data_size/sizeof(uint32_t);
1979 1979
@@ -1998,17 +1998,17 @@ static void qla4_82xx_minidump_process_rdrom(struct scsi_qla_host *ha,
1998#define MD_MIU_TEST_AGT_ADDR_HI 0x41000098 1998#define MD_MIU_TEST_AGT_ADDR_HI 0x41000098
1999 1999
2000static int qla4_8xxx_minidump_process_rdmem(struct scsi_qla_host *ha, 2000static int qla4_8xxx_minidump_process_rdmem(struct scsi_qla_host *ha,
2001 struct qla82xx_minidump_entry_hdr *entry_hdr, 2001 struct qla8xxx_minidump_entry_hdr *entry_hdr,
2002 uint32_t **d_ptr) 2002 uint32_t **d_ptr)
2003{ 2003{
2004 uint32_t r_addr, r_value, r_data; 2004 uint32_t r_addr, r_value, r_data;
2005 uint32_t i, j, loop_cnt; 2005 uint32_t i, j, loop_cnt;
2006 struct qla82xx_minidump_entry_rdmem *m_hdr; 2006 struct qla8xxx_minidump_entry_rdmem *m_hdr;
2007 unsigned long flags; 2007 unsigned long flags;
2008 uint32_t *data_ptr = *d_ptr; 2008 uint32_t *data_ptr = *d_ptr;
2009 2009
2010 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); 2010 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__));
2011 m_hdr = (struct qla82xx_minidump_entry_rdmem *)entry_hdr; 2011 m_hdr = (struct qla8xxx_minidump_entry_rdmem *)entry_hdr;
2012 r_addr = m_hdr->read_addr; 2012 r_addr = m_hdr->read_addr;
2013 loop_cnt = m_hdr->read_data_size/16; 2013 loop_cnt = m_hdr->read_data_size/16;
2014 2014
@@ -2078,7 +2078,7 @@ static int qla4_8xxx_minidump_process_rdmem(struct scsi_qla_host *ha,
2078} 2078}
2079 2079
2080static void ql4_8xxx_mark_entry_skipped(struct scsi_qla_host *ha, 2080static void ql4_8xxx_mark_entry_skipped(struct scsi_qla_host *ha,
2081 struct qla82xx_minidump_entry_hdr *entry_hdr, 2081 struct qla8xxx_minidump_entry_hdr *entry_hdr,
2082 int index) 2082 int index)
2083{ 2083{
2084 entry_hdr->d_ctrl.driver_flags |= QLA82XX_DBG_SKIPPED_FLAG; 2084 entry_hdr->d_ctrl.driver_flags |= QLA82XX_DBG_SKIPPED_FLAG;
@@ -2095,7 +2095,7 @@ static void ql4_8xxx_mark_entry_skipped(struct scsi_qla_host *ha,
2095static int qla4_8xxx_collect_md_data(struct scsi_qla_host *ha) 2095static int qla4_8xxx_collect_md_data(struct scsi_qla_host *ha)
2096{ 2096{
2097 int num_entry_hdr = 0; 2097 int num_entry_hdr = 0;
2098 struct qla82xx_minidump_entry_hdr *entry_hdr; 2098 struct qla8xxx_minidump_entry_hdr *entry_hdr;
2099 struct qla4_8xxx_minidump_template_hdr *tmplt_hdr; 2099 struct qla4_8xxx_minidump_template_hdr *tmplt_hdr;
2100 uint32_t *data_ptr; 2100 uint32_t *data_ptr;
2101 uint32_t data_collected = 0; 2101 uint32_t data_collected = 0;
@@ -2131,7 +2131,7 @@ static int qla4_8xxx_collect_md_data(struct scsi_qla_host *ha)
2131 timestamp = (u32)(jiffies_to_msecs(now) / 1000); 2131 timestamp = (u32)(jiffies_to_msecs(now) / 1000);
2132 tmplt_hdr->driver_timestamp = timestamp; 2132 tmplt_hdr->driver_timestamp = timestamp;
2133 2133
2134 entry_hdr = (struct qla82xx_minidump_entry_hdr *) 2134 entry_hdr = (struct qla8xxx_minidump_entry_hdr *)
2135 (((uint8_t *)ha->fw_dump_tmplt_hdr) + 2135 (((uint8_t *)ha->fw_dump_tmplt_hdr) +
2136 tmplt_hdr->first_entry_offset); 2136 tmplt_hdr->first_entry_offset);
2137 2137
@@ -2227,7 +2227,7 @@ static int qla4_8xxx_collect_md_data(struct scsi_qla_host *ha)
2227 ha->fw_dump_tmplt_size)); 2227 ha->fw_dump_tmplt_size));
2228skip_nxt_entry: 2228skip_nxt_entry:
2229 /* next entry in the template */ 2229 /* next entry in the template */
2230 entry_hdr = (struct qla82xx_minidump_entry_hdr *) 2230 entry_hdr = (struct qla8xxx_minidump_entry_hdr *)
2231 (((uint8_t *)entry_hdr) + 2231 (((uint8_t *)entry_hdr) +
2232 entry_hdr->entry_size); 2232 entry_hdr->entry_size);
2233 } 2233 }
@@ -2547,8 +2547,8 @@ int qla4_8xxx_load_risc(struct scsi_qla_host *ha)
2547 int retval; 2547 int retval;
2548 2548
2549 /* clear the interrupt */ 2549 /* clear the interrupt */
2550 writel(0, &ha->qla4_8xxx_reg->host_int); 2550 writel(0, &ha->qla4_82xx_reg->host_int);
2551 readl(&ha->qla4_8xxx_reg->host_int); 2551 readl(&ha->qla4_82xx_reg->host_int);
2552 2552
2553 retval = qla4_8xxx_device_state_handler(ha); 2553 retval = qla4_8xxx_device_state_handler(ha);
2554 2554
diff --git a/drivers/scsi/qla4xxx/ql4_nx.h b/drivers/scsi/qla4xxx/ql4_nx.h
index 30258479f10..e7a9cc4fe23 100644
--- a/drivers/scsi/qla4xxx/ql4_nx.h
+++ b/drivers/scsi/qla4xxx/ql4_nx.h
@@ -835,7 +835,7 @@ struct crb_addr_pair {
835/* Driver_code is for driver to write some info about the entry 835/* Driver_code is for driver to write some info about the entry
836 * currently not used. 836 * currently not used.
837 */ 837 */
838struct qla82xx_minidump_entry_hdr { 838struct qla8xxx_minidump_entry_hdr {
839 uint32_t entry_type; 839 uint32_t entry_type;
840 uint32_t entry_size; 840 uint32_t entry_size;
841 uint32_t entry_capture_size; 841 uint32_t entry_capture_size;
@@ -848,8 +848,8 @@ struct qla82xx_minidump_entry_hdr {
848}; 848};
849 849
850/* Read CRB entry header */ 850/* Read CRB entry header */
851struct qla82xx_minidump_entry_crb { 851struct qla8xxx_minidump_entry_crb {
852 struct qla82xx_minidump_entry_hdr h; 852 struct qla8xxx_minidump_entry_hdr h;
853 uint32_t addr; 853 uint32_t addr;
854 struct { 854 struct {
855 uint8_t addr_stride; 855 uint8_t addr_stride;
@@ -871,8 +871,8 @@ struct qla82xx_minidump_entry_crb {
871 uint32_t value_3; 871 uint32_t value_3;
872}; 872};
873 873
874struct qla82xx_minidump_entry_cache { 874struct qla8xxx_minidump_entry_cache {
875 struct qla82xx_minidump_entry_hdr h; 875 struct qla8xxx_minidump_entry_hdr h;
876 uint32_t tag_reg_addr; 876 uint32_t tag_reg_addr;
877 struct { 877 struct {
878 uint16_t tag_value_stride; 878 uint16_t tag_value_stride;
@@ -895,8 +895,8 @@ struct qla82xx_minidump_entry_cache {
895}; 895};
896 896
897/* Read OCM */ 897/* Read OCM */
898struct qla82xx_minidump_entry_rdocm { 898struct qla8xxx_minidump_entry_rdocm {
899 struct qla82xx_minidump_entry_hdr h; 899 struct qla8xxx_minidump_entry_hdr h;
900 uint32_t rsvd_0; 900 uint32_t rsvd_0;
901 uint32_t rsvd_1; 901 uint32_t rsvd_1;
902 uint32_t data_size; 902 uint32_t data_size;
@@ -908,24 +908,24 @@ struct qla82xx_minidump_entry_rdocm {
908}; 908};
909 909
910/* Read Memory */ 910/* Read Memory */
911struct qla82xx_minidump_entry_rdmem { 911struct qla8xxx_minidump_entry_rdmem {
912 struct qla82xx_minidump_entry_hdr h; 912 struct qla8xxx_minidump_entry_hdr h;
913 uint32_t rsvd[6]; 913 uint32_t rsvd[6];
914 uint32_t read_addr; 914 uint32_t read_addr;
915 uint32_t read_data_size; 915 uint32_t read_data_size;
916}; 916};
917 917
918/* Read ROM */ 918/* Read ROM */
919struct qla82xx_minidump_entry_rdrom { 919struct qla8xxx_minidump_entry_rdrom {
920 struct qla82xx_minidump_entry_hdr h; 920 struct qla8xxx_minidump_entry_hdr h;
921 uint32_t rsvd[6]; 921 uint32_t rsvd[6];
922 uint32_t read_addr; 922 uint32_t read_addr;
923 uint32_t read_data_size; 923 uint32_t read_data_size;
924}; 924};
925 925
926/* Mux entry */ 926/* Mux entry */
927struct qla82xx_minidump_entry_mux { 927struct qla8xxx_minidump_entry_mux {
928 struct qla82xx_minidump_entry_hdr h; 928 struct qla8xxx_minidump_entry_hdr h;
929 uint32_t select_addr; 929 uint32_t select_addr;
930 uint32_t rsvd_0; 930 uint32_t rsvd_0;
931 uint32_t data_size; 931 uint32_t data_size;
@@ -937,8 +937,8 @@ struct qla82xx_minidump_entry_mux {
937}; 937};
938 938
939/* Queue entry */ 939/* Queue entry */
940struct qla82xx_minidump_entry_queue { 940struct qla8xxx_minidump_entry_queue {
941 struct qla82xx_minidump_entry_hdr h; 941 struct qla8xxx_minidump_entry_hdr h;
942 uint32_t select_addr; 942 uint32_t select_addr;
943 struct { 943 struct {
944 uint16_t queue_id_stride; 944 uint16_t queue_id_stride;
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c
index b82c82dd4c5..a3a26e47b80 100644
--- a/drivers/scsi/qla4xxx/ql4_os.c
+++ b/drivers/scsi/qla4xxx/ql4_os.c
@@ -3492,8 +3492,8 @@ static void qla4xxx_free_adapter(struct scsi_qla_host *ha)
3492 &ha->reg->ctrl_status); 3492 &ha->reg->ctrl_status);
3493 readl(&ha->reg->ctrl_status); 3493 readl(&ha->reg->ctrl_status);
3494 } else if (is_qla8022(ha)) { 3494 } else if (is_qla8022(ha)) {
3495 writel(0, &ha->qla4_8xxx_reg->host_int); 3495 writel(0, &ha->qla4_82xx_reg->host_int);
3496 readl(&ha->qla4_8xxx_reg->host_int); 3496 readl(&ha->qla4_82xx_reg->host_int);
3497 } 3497 }
3498 3498
3499 /* Remove timer thread, if present */ 3499 /* Remove timer thread, if present */
@@ -3561,7 +3561,7 @@ int qla4_8xxx_iospace_config(struct scsi_qla_host *ha)
3561 /* Mapping of IO base pointer, door bell read and write pointer */ 3561 /* Mapping of IO base pointer, door bell read and write pointer */
3562 3562
3563 /* mapping of IO base pointer */ 3563 /* mapping of IO base pointer */
3564 ha->qla4_8xxx_reg = 3564 ha->qla4_82xx_reg =
3565 (struct device_reg_82xx __iomem *)((uint8_t *)ha->nx_pcibase + 3565 (struct device_reg_82xx __iomem *)((uint8_t *)ha->nx_pcibase +
3566 0xbc000 + (ha->pdev->devfn << 11)); 3566 0xbc000 + (ha->pdev->devfn << 11));
3567 3567
@@ -3660,7 +3660,7 @@ static struct isp_operations qla4xxx_isp_ops = {
3660 .get_sys_info = qla4xxx_get_sys_info, 3660 .get_sys_info = qla4xxx_get_sys_info,
3661}; 3661};
3662 3662
3663static struct isp_operations qla4_8xxx_isp_ops = { 3663static struct isp_operations qla4_82xx_isp_ops = {
3664 .iospace_config = qla4_8xxx_iospace_config, 3664 .iospace_config = qla4_8xxx_iospace_config,
3665 .pci_config = qla4_8xxx_pci_config, 3665 .pci_config = qla4_8xxx_pci_config,
3666 .disable_intrs = qla4_82xx_disable_intrs, 3666 .disable_intrs = qla4_82xx_disable_intrs,
@@ -3684,7 +3684,7 @@ uint16_t qla4xxx_rd_shdw_req_q_out(struct scsi_qla_host *ha)
3684 3684
3685uint16_t qla4_82xx_rd_shdw_req_q_out(struct scsi_qla_host *ha) 3685uint16_t qla4_82xx_rd_shdw_req_q_out(struct scsi_qla_host *ha)
3686{ 3686{
3687 return (uint16_t)le32_to_cpu(readl(&ha->qla4_8xxx_reg->req_q_out)); 3687 return (uint16_t)le32_to_cpu(readl(&ha->qla4_82xx_reg->req_q_out));
3688} 3688}
3689 3689
3690uint16_t qla4xxx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha) 3690uint16_t qla4xxx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha)
@@ -3694,7 +3694,7 @@ uint16_t qla4xxx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha)
3694 3694
3695uint16_t qla4_82xx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha) 3695uint16_t qla4_82xx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha)
3696{ 3696{
3697 return (uint16_t)le32_to_cpu(readl(&ha->qla4_8xxx_reg->rsp_q_in)); 3697 return (uint16_t)le32_to_cpu(readl(&ha->qla4_82xx_reg->rsp_q_in));
3698} 3698}
3699 3699
3700static ssize_t qla4xxx_show_boot_eth_info(void *data, int type, char *buf) 3700static ssize_t qla4xxx_show_boot_eth_info(void *data, int type, char *buf)
@@ -5074,7 +5074,7 @@ static int __devinit qla4xxx_probe_adapter(struct pci_dev *pdev,
5074 5074
5075 /* Setup Runtime configurable options */ 5075 /* Setup Runtime configurable options */
5076 if (is_qla8022(ha)) { 5076 if (is_qla8022(ha)) {
5077 ha->isp_ops = &qla4_8xxx_isp_ops; 5077 ha->isp_ops = &qla4_82xx_isp_ops;
5078 rwlock_init(&ha->hw_lock); 5078 rwlock_init(&ha->hw_lock);
5079 ha->qdr_sn_window = -1; 5079 ha->qdr_sn_window = -1;
5080 ha->ddr_mn_window = -1; 5080 ha->ddr_mn_window = -1;