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authorJeff Garzik <jgarzik@pobox.com>2005-08-29 15:59:42 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-08-29 15:59:42 -0400
commit70d374ea9907036e15574a5ce89219edd5baee10 (patch)
treeb858bb4a841eb91b1d91b41c33698d05fa7bfb37 /drivers/scsi
parentaa7e16d6b88b3b38db0d2ee49ed5e44e7b2045ec (diff)
parentbf4e70e54cf31dcca48d279c7f7e71328eebe749 (diff)
Merge /spare/repo/linux-2.6/
Diffstat (limited to 'drivers/scsi')
-rw-r--r--drivers/scsi/ahci.c12
-rw-r--r--drivers/scsi/ata_piix.c14
-rw-r--r--drivers/scsi/libata-core.c247
-rw-r--r--drivers/scsi/libata-scsi.c66
-rw-r--r--drivers/scsi/libata.h2
-rw-r--r--drivers/scsi/sata_nv.c24
-rw-r--r--drivers/scsi/sata_promise.c12
-rw-r--r--drivers/scsi/sata_qstor.c12
-rw-r--r--drivers/scsi/sata_sil.c36
-rw-r--r--drivers/scsi/sata_sis.c2
-rw-r--r--drivers/scsi/sata_svw.c10
-rw-r--r--drivers/scsi/sata_sx4.c146
-rw-r--r--drivers/scsi/sata_uli.c2
-rw-r--r--drivers/scsi/sata_via.c2
-rw-r--r--drivers/scsi/sata_vsc.c5
-rw-r--r--drivers/scsi/sg.c13
16 files changed, 448 insertions, 157 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index 7eaaf7a2744..179c95c878a 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -277,6 +277,8 @@ static struct pci_device_id ahci_pci_tbl[] = {
277 board_ahci }, /* ESB2 */ 277 board_ahci }, /* ESB2 */
278 { PCI_VENDOR_ID_INTEL, 0x2683, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 278 { PCI_VENDOR_ID_INTEL, 0x2683, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
279 board_ahci }, /* ESB2 */ 279 board_ahci }, /* ESB2 */
280 { PCI_VENDOR_ID_INTEL, 0x27c6, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
281 board_ahci }, /* ICH7-M DH */
280 { } /* terminate list */ 282 { } /* terminate list */
281}; 283};
282 284
@@ -592,12 +594,16 @@ static void ahci_intr_error(struct ata_port *ap, u32 irq_stat)
592 594
593static void ahci_eng_timeout(struct ata_port *ap) 595static void ahci_eng_timeout(struct ata_port *ap)
594{ 596{
595 void *mmio = ap->host_set->mmio_base; 597 struct ata_host_set *host_set = ap->host_set;
598 void *mmio = host_set->mmio_base;
596 void *port_mmio = ahci_port_base(mmio, ap->port_no); 599 void *port_mmio = ahci_port_base(mmio, ap->port_no);
597 struct ata_queued_cmd *qc; 600 struct ata_queued_cmd *qc;
601 unsigned long flags;
598 602
599 DPRINTK("ENTER\n"); 603 DPRINTK("ENTER\n");
600 604
605 spin_lock_irqsave(&host_set->lock, flags);
606
601 ahci_intr_error(ap, readl(port_mmio + PORT_IRQ_STAT)); 607 ahci_intr_error(ap, readl(port_mmio + PORT_IRQ_STAT));
602 608
603 qc = ata_qc_from_tag(ap, ap->active_tag); 609 qc = ata_qc_from_tag(ap, ap->active_tag);
@@ -615,6 +621,7 @@ static void ahci_eng_timeout(struct ata_port *ap)
615 ata_qc_complete(qc, ATA_ERR); 621 ata_qc_complete(qc, ATA_ERR);
616 } 622 }
617 623
624 spin_unlock_irqrestore(&host_set->lock, flags);
618} 625}
619 626
620static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc) 627static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
@@ -704,9 +711,6 @@ static int ahci_qc_issue(struct ata_queued_cmd *qc)
704 struct ata_port *ap = qc->ap; 711 struct ata_port *ap = qc->ap;
705 void *port_mmio = (void *) ap->ioaddr.cmd_addr; 712 void *port_mmio = (void *) ap->ioaddr.cmd_addr;
706 713
707 writel(1, port_mmio + PORT_SCR_ACT);
708 readl(port_mmio + PORT_SCR_ACT); /* flush */
709
710 writel(1, port_mmio + PORT_CMD_ISSUE); 714 writel(1, port_mmio + PORT_CMD_ISSUE);
711 readl(port_mmio + PORT_CMD_ISSUE); /* flush */ 715 readl(port_mmio + PORT_CMD_ISSUE); /* flush */
712 716
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c
index 6898b7f7438..fb28c126184 100644
--- a/drivers/scsi/ata_piix.c
+++ b/drivers/scsi/ata_piix.c
@@ -647,13 +647,13 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
647 port_info[1] = NULL; 647 port_info[1] = NULL;
648 648
649 if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { 649 if (port_info[0]->host_flags & PIIX_FLAG_AHCI) {
650 u8 tmp; 650 u8 tmp;
651 pci_read_config_byte(pdev, PIIX_SCC, &tmp); 651 pci_read_config_byte(pdev, PIIX_SCC, &tmp);
652 if (tmp == PIIX_AHCI_DEVICE) { 652 if (tmp == PIIX_AHCI_DEVICE) {
653 int rc = piix_disable_ahci(pdev); 653 int rc = piix_disable_ahci(pdev);
654 if (rc) 654 if (rc)
655 return rc; 655 return rc;
656 } 656 }
657 } 657 }
658 658
659 if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { 659 if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) {
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c
index 4154e5b6bad..dee4b12b034 100644
--- a/drivers/scsi/libata-core.c
+++ b/drivers/scsi/libata-core.c
@@ -1314,12 +1314,12 @@ static inline u8 ata_dev_knobble(struct ata_port *ap)
1314/** 1314/**
1315 * ata_dev_config - Run device specific handlers and check for 1315 * ata_dev_config - Run device specific handlers and check for
1316 * SATA->PATA bridges 1316 * SATA->PATA bridges
1317 * @ap: Bus 1317 * @ap: Bus
1318 * @i: Device 1318 * @i: Device
1319 * 1319 *
1320 * LOCKING: 1320 * LOCKING:
1321 */ 1321 */
1322 1322
1323void ata_dev_config(struct ata_port *ap, unsigned int i) 1323void ata_dev_config(struct ata_port *ap, unsigned int i)
1324{ 1324{
1325 /* limit bridge transfers to udma5, 200 sectors */ 1325 /* limit bridge transfers to udma5, 200 sectors */
@@ -2387,6 +2387,27 @@ static int ata_sg_setup(struct ata_queued_cmd *qc)
2387} 2387}
2388 2388
2389/** 2389/**
2390 * ata_poll_qc_complete - turn irq back on and finish qc
2391 * @qc: Command to complete
2392 * @drv_stat: ATA status register content
2393 *
2394 * LOCKING:
2395 * None. (grabs host lock)
2396 */
2397
2398void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2399{
2400 struct ata_port *ap = qc->ap;
2401 unsigned long flags;
2402
2403 spin_lock_irqsave(&ap->host_set->lock, flags);
2404 ap->flags &= ~ATA_FLAG_NOINTR;
2405 ata_irq_on(ap);
2406 ata_qc_complete(qc, drv_stat);
2407 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2408}
2409
2410/**
2390 * ata_pio_poll - 2411 * ata_pio_poll -
2391 * @ap: 2412 * @ap:
2392 * 2413 *
@@ -2448,11 +2469,10 @@ static void ata_pio_complete (struct ata_port *ap)
2448 u8 drv_stat; 2469 u8 drv_stat;
2449 2470
2450 /* 2471 /*
2451 * This is purely hueristic. This is a fast path. 2472 * This is purely heuristic. This is a fast path. Sometimes when
2452 * Sometimes when we enter, BSY will be cleared in 2473 * we enter, BSY will be cleared in a chk-status or two. If not,
2453 * a chk-status or two. If not, the drive is probably seeking 2474 * the drive is probably seeking or something. Snooze for a couple
2454 * or something. Snooze for a couple msecs, then 2475 * msecs, then chk-status again. If still busy, fall back to
2455 * chk-status again. If still busy, fall back to
2456 * PIO_ST_POLL state. 2476 * PIO_ST_POLL state.
2457 */ 2477 */
2458 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); 2478 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
@@ -2477,9 +2497,7 @@ static void ata_pio_complete (struct ata_port *ap)
2477 2497
2478 ap->pio_task_state = PIO_ST_IDLE; 2498 ap->pio_task_state = PIO_ST_IDLE;
2479 2499
2480 ata_irq_on(ap); 2500 ata_poll_qc_complete(qc, drv_stat);
2481
2482 ata_qc_complete(qc, drv_stat);
2483} 2501}
2484 2502
2485 2503
@@ -2504,6 +2522,20 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words)
2504#endif /* __BIG_ENDIAN */ 2522#endif /* __BIG_ENDIAN */
2505} 2523}
2506 2524
2525/**
2526 * ata_mmio_data_xfer - Transfer data by MMIO
2527 * @ap: port to read/write
2528 * @buf: data buffer
2529 * @buflen: buffer length
2530 * @do_write: read/write
2531 *
2532 * Transfer data from/to the device data register by MMIO.
2533 *
2534 * LOCKING:
2535 * Inherited from caller.
2536 *
2537 */
2538
2507static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, 2539static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2508 unsigned int buflen, int write_data) 2540 unsigned int buflen, int write_data)
2509{ 2541{
@@ -2512,6 +2544,7 @@ static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2512 u16 *buf16 = (u16 *) buf; 2544 u16 *buf16 = (u16 *) buf;
2513 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; 2545 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2514 2546
2547 /* Transfer multiple of 2 bytes */
2515 if (write_data) { 2548 if (write_data) {
2516 for (i = 0; i < words; i++) 2549 for (i = 0; i < words; i++)
2517 writew(le16_to_cpu(buf16[i]), mmio); 2550 writew(le16_to_cpu(buf16[i]), mmio);
@@ -2519,19 +2552,76 @@ static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2519 for (i = 0; i < words; i++) 2552 for (i = 0; i < words; i++)
2520 buf16[i] = cpu_to_le16(readw(mmio)); 2553 buf16[i] = cpu_to_le16(readw(mmio));
2521 } 2554 }
2555
2556 /* Transfer trailing 1 byte, if any. */
2557 if (unlikely(buflen & 0x01)) {
2558 u16 align_buf[1] = { 0 };
2559 unsigned char *trailing_buf = buf + buflen - 1;
2560
2561 if (write_data) {
2562 memcpy(align_buf, trailing_buf, 1);
2563 writew(le16_to_cpu(align_buf[0]), mmio);
2564 } else {
2565 align_buf[0] = cpu_to_le16(readw(mmio));
2566 memcpy(trailing_buf, align_buf, 1);
2567 }
2568 }
2522} 2569}
2523 2570
2571/**
2572 * ata_pio_data_xfer - Transfer data by PIO
2573 * @ap: port to read/write
2574 * @buf: data buffer
2575 * @buflen: buffer length
2576 * @do_write: read/write
2577 *
2578 * Transfer data from/to the device data register by PIO.
2579 *
2580 * LOCKING:
2581 * Inherited from caller.
2582 *
2583 */
2584
2524static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, 2585static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2525 unsigned int buflen, int write_data) 2586 unsigned int buflen, int write_data)
2526{ 2587{
2527 unsigned int dwords = buflen >> 1; 2588 unsigned int words = buflen >> 1;
2528 2589
2590 /* Transfer multiple of 2 bytes */
2529 if (write_data) 2591 if (write_data)
2530 outsw(ap->ioaddr.data_addr, buf, dwords); 2592 outsw(ap->ioaddr.data_addr, buf, words);
2531 else 2593 else
2532 insw(ap->ioaddr.data_addr, buf, dwords); 2594 insw(ap->ioaddr.data_addr, buf, words);
2595
2596 /* Transfer trailing 1 byte, if any. */
2597 if (unlikely(buflen & 0x01)) {
2598 u16 align_buf[1] = { 0 };
2599 unsigned char *trailing_buf = buf + buflen - 1;
2600
2601 if (write_data) {
2602 memcpy(align_buf, trailing_buf, 1);
2603 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2604 } else {
2605 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2606 memcpy(trailing_buf, align_buf, 1);
2607 }
2608 }
2533} 2609}
2534 2610
2611/**
2612 * ata_data_xfer - Transfer data from/to the data register.
2613 * @ap: port to read/write
2614 * @buf: data buffer
2615 * @buflen: buffer length
2616 * @do_write: read/write
2617 *
2618 * Transfer data from/to the device data register.
2619 *
2620 * LOCKING:
2621 * Inherited from caller.
2622 *
2623 */
2624
2535static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, 2625static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2536 unsigned int buflen, int do_write) 2626 unsigned int buflen, int do_write)
2537{ 2627{
@@ -2541,6 +2631,16 @@ static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2541 ata_pio_data_xfer(ap, buf, buflen, do_write); 2631 ata_pio_data_xfer(ap, buf, buflen, do_write);
2542} 2632}
2543 2633
2634/**
2635 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2636 * @qc: Command on going
2637 *
2638 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2639 *
2640 * LOCKING:
2641 * Inherited from caller.
2642 */
2643
2544static void ata_pio_sector(struct ata_queued_cmd *qc) 2644static void ata_pio_sector(struct ata_queued_cmd *qc)
2545{ 2645{
2546 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 2646 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
@@ -2579,6 +2679,18 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
2579 kunmap(page); 2679 kunmap(page);
2580} 2680}
2581 2681
2682/**
2683 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
2684 * @qc: Command on going
2685 * @bytes: number of bytes
2686 *
2687 * Transfer Transfer data from/to the ATAPI device.
2688 *
2689 * LOCKING:
2690 * Inherited from caller.
2691 *
2692 */
2693
2582static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) 2694static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2583{ 2695{
2584 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); 2696 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
@@ -2588,10 +2700,33 @@ static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
2588 unsigned char *buf; 2700 unsigned char *buf;
2589 unsigned int offset, count; 2701 unsigned int offset, count;
2590 2702
2591 if (qc->curbytes == qc->nbytes - bytes) 2703 if (qc->curbytes + bytes >= qc->nbytes)
2592 ap->pio_task_state = PIO_ST_LAST; 2704 ap->pio_task_state = PIO_ST_LAST;
2593 2705
2594next_sg: 2706next_sg:
2707 if (unlikely(qc->cursg >= qc->n_elem)) {
2708 /*
2709 * The end of qc->sg is reached and the device expects
2710 * more data to transfer. In order not to overrun qc->sg
2711 * and fulfill length specified in the byte count register,
2712 * - for read case, discard trailing data from the device
2713 * - for write case, padding zero data to the device
2714 */
2715 u16 pad_buf[1] = { 0 };
2716 unsigned int words = bytes >> 1;
2717 unsigned int i;
2718
2719 if (words) /* warning if bytes > 1 */
2720 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
2721 ap->id, bytes);
2722
2723 for (i = 0; i < words; i++)
2724 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
2725
2726 ap->pio_task_state = PIO_ST_LAST;
2727 return;
2728 }
2729
2595 sg = &qc->sg[qc->cursg]; 2730 sg = &qc->sg[qc->cursg];
2596 2731
2597 page = sg->page; 2732 page = sg->page;
@@ -2625,11 +2760,21 @@ next_sg:
2625 2760
2626 kunmap(page); 2761 kunmap(page);
2627 2762
2628 if (bytes) { 2763 if (bytes)
2629 goto next_sg; 2764 goto next_sg;
2630 }
2631} 2765}
2632 2766
2767/**
2768 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
2769 * @qc: Command on going
2770 *
2771 * Transfer Transfer data from/to the ATAPI device.
2772 *
2773 * LOCKING:
2774 * Inherited from caller.
2775 *
2776 */
2777
2633static void atapi_pio_bytes(struct ata_queued_cmd *qc) 2778static void atapi_pio_bytes(struct ata_queued_cmd *qc)
2634{ 2779{
2635 struct ata_port *ap = qc->ap; 2780 struct ata_port *ap = qc->ap;
@@ -2702,9 +2847,7 @@ static void ata_pio_block(struct ata_port *ap)
2702 if ((status & ATA_DRQ) == 0) { 2847 if ((status & ATA_DRQ) == 0) {
2703 ap->pio_task_state = PIO_ST_IDLE; 2848 ap->pio_task_state = PIO_ST_IDLE;
2704 2849
2705 ata_irq_on(ap); 2850 ata_poll_qc_complete(qc, status);
2706
2707 ata_qc_complete(qc, status);
2708 return; 2851 return;
2709 } 2852 }
2710 2853
@@ -2734,9 +2877,7 @@ static void ata_pio_error(struct ata_port *ap)
2734 2877
2735 ap->pio_task_state = PIO_ST_IDLE; 2878 ap->pio_task_state = PIO_ST_IDLE;
2736 2879
2737 ata_irq_on(ap); 2880 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
2738
2739 ata_qc_complete(qc, drv_stat | ATA_ERR);
2740} 2881}
2741 2882
2742static void ata_pio_task(void *_data) 2883static void ata_pio_task(void *_data)
@@ -2842,8 +2983,10 @@ static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev,
2842static void ata_qc_timeout(struct ata_queued_cmd *qc) 2983static void ata_qc_timeout(struct ata_queued_cmd *qc)
2843{ 2984{
2844 struct ata_port *ap = qc->ap; 2985 struct ata_port *ap = qc->ap;
2986 struct ata_host_set *host_set = ap->host_set;
2845 struct ata_device *dev = qc->dev; 2987 struct ata_device *dev = qc->dev;
2846 u8 host_stat = 0, drv_stat; 2988 u8 host_stat = 0, drv_stat;
2989 unsigned long flags;
2847 2990
2848 DPRINTK("ENTER\n"); 2991 DPRINTK("ENTER\n");
2849 2992
@@ -2854,7 +2997,9 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc)
2854 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) { 2997 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
2855 2998
2856 /* finish completing original command */ 2999 /* finish completing original command */
3000 spin_lock_irqsave(&host_set->lock, flags);
2857 __ata_qc_complete(qc); 3001 __ata_qc_complete(qc);
3002 spin_unlock_irqrestore(&host_set->lock, flags);
2858 3003
2859 atapi_request_sense(ap, dev, cmd); 3004 atapi_request_sense(ap, dev, cmd);
2860 3005
@@ -2865,6 +3010,8 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc)
2865 } 3010 }
2866 } 3011 }
2867 3012
3013 spin_lock_irqsave(&host_set->lock, flags);
3014
2868 /* hack alert! We cannot use the supplied completion 3015 /* hack alert! We cannot use the supplied completion
2869 * function from inside the ->eh_strategy_handler() thread. 3016 * function from inside the ->eh_strategy_handler() thread.
2870 * libata is the only user of ->eh_strategy_handler() in 3017 * libata is the only user of ->eh_strategy_handler() in
@@ -2880,7 +3027,7 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc)
2880 host_stat = ap->ops->bmdma_status(ap); 3027 host_stat = ap->ops->bmdma_status(ap);
2881 3028
2882 /* before we do anything else, clear DMA-Start bit */ 3029 /* before we do anything else, clear DMA-Start bit */
2883 ap->ops->bmdma_stop(ap); 3030 ap->ops->bmdma_stop(qc);
2884 3031
2885 /* fall through */ 3032 /* fall through */
2886 3033
@@ -2898,6 +3045,9 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc)
2898 ata_qc_complete(qc, drv_stat); 3045 ata_qc_complete(qc, drv_stat);
2899 break; 3046 break;
2900 } 3047 }
3048
3049 spin_unlock_irqrestore(&host_set->lock, flags);
3050
2901out: 3051out:
2902 DPRINTK("EXIT\n"); 3052 DPRINTK("EXIT\n");
2903} 3053}
@@ -3071,9 +3221,14 @@ void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3071 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 3221 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3072 ata_sg_clean(qc); 3222 ata_sg_clean(qc);
3073 3223
3224 /* atapi: mark qc as inactive to prevent the interrupt handler
3225 * from completing the command twice later, before the error handler
3226 * is called. (when rc != 0 and atapi request sense is needed)
3227 */
3228 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3229
3074 /* call completion callback */ 3230 /* call completion callback */
3075 rc = qc->complete_fn(qc, drv_stat); 3231 rc = qc->complete_fn(qc, drv_stat);
3076 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3077 3232
3078 /* if callback indicates not to complete command (non-zero), 3233 /* if callback indicates not to complete command (non-zero),
3079 * return immediately 3234 * return immediately
@@ -3203,11 +3358,13 @@ int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3203 break; 3358 break;
3204 3359
3205 case ATA_PROT_ATAPI_NODATA: 3360 case ATA_PROT_ATAPI_NODATA:
3361 ap->flags |= ATA_FLAG_NOINTR;
3206 ata_tf_to_host_nolock(ap, &qc->tf); 3362 ata_tf_to_host_nolock(ap, &qc->tf);
3207 queue_work(ata_wq, &ap->packet_task); 3363 queue_work(ata_wq, &ap->packet_task);
3208 break; 3364 break;
3209 3365
3210 case ATA_PROT_ATAPI_DMA: 3366 case ATA_PROT_ATAPI_DMA:
3367 ap->flags |= ATA_FLAG_NOINTR;
3211 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ 3368 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3212 ap->ops->bmdma_setup(qc); /* set up bmdma */ 3369 ap->ops->bmdma_setup(qc); /* set up bmdma */
3213 queue_work(ata_wq, &ap->packet_task); 3370 queue_work(ata_wq, &ap->packet_task);
@@ -3252,7 +3409,7 @@ static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3252} 3409}
3253 3410
3254/** 3411/**
3255 * ata_bmdma_start - Start a PCI IDE BMDMA transaction 3412 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3256 * @qc: Info associated with this ATA transaction. 3413 * @qc: Info associated with this ATA transaction.
3257 * 3414 *
3258 * LOCKING: 3415 * LOCKING:
@@ -3423,7 +3580,7 @@ u8 ata_bmdma_status(struct ata_port *ap)
3423 3580
3424/** 3581/**
3425 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer 3582 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3426 * @ap: Port associated with this ATA transaction. 3583 * @qc: Command we are ending DMA for
3427 * 3584 *
3428 * Clears the ATA_DMA_START flag in the dma control register 3585 * Clears the ATA_DMA_START flag in the dma control register
3429 * 3586 *
@@ -3433,8 +3590,9 @@ u8 ata_bmdma_status(struct ata_port *ap)
3433 * spin_lock_irqsave(host_set lock) 3590 * spin_lock_irqsave(host_set lock)
3434 */ 3591 */
3435 3592
3436void ata_bmdma_stop(struct ata_port *ap) 3593void ata_bmdma_stop(struct ata_queued_cmd *qc)
3437{ 3594{
3595 struct ata_port *ap = qc->ap;
3438 if (ap->flags & ATA_FLAG_MMIO) { 3596 if (ap->flags & ATA_FLAG_MMIO) {
3439 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; 3597 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3440 3598
@@ -3486,7 +3644,7 @@ inline unsigned int ata_host_intr (struct ata_port *ap,
3486 goto idle_irq; 3644 goto idle_irq;
3487 3645
3488 /* before we do anything else, clear DMA-Start bit */ 3646 /* before we do anything else, clear DMA-Start bit */
3489 ap->ops->bmdma_stop(ap); 3647 ap->ops->bmdma_stop(qc);
3490 3648
3491 /* fall through */ 3649 /* fall through */
3492 3650
@@ -3561,7 +3719,8 @@ irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
3561 struct ata_port *ap; 3719 struct ata_port *ap;
3562 3720
3563 ap = host_set->ports[i]; 3721 ap = host_set->ports[i];
3564 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { 3722 if (ap &&
3723 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
3565 struct ata_queued_cmd *qc; 3724 struct ata_queued_cmd *qc;
3566 3725
3567 qc = ata_qc_from_tag(ap, ap->active_tag); 3726 qc = ata_qc_from_tag(ap, ap->active_tag);
@@ -3613,19 +3772,27 @@ static void atapi_packet_task(void *_data)
3613 /* send SCSI cdb */ 3772 /* send SCSI cdb */
3614 DPRINTK("send cdb\n"); 3773 DPRINTK("send cdb\n");
3615 assert(ap->cdb_len >= 12); 3774 assert(ap->cdb_len >= 12);
3616 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3617 3775
3618 /* if we are DMA'ing, irq handler takes over from here */ 3776 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3619 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) 3777 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3620 ap->ops->bmdma_start(qc); /* initiate bmdma */ 3778 unsigned long flags;
3621 3779
3622 /* non-data commands are also handled via irq */ 3780 /* Once we're done issuing command and kicking bmdma,
3623 else if (qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { 3781 * irq handler takes over. To not lose irq, we need
3624 /* do nothing */ 3782 * to clear NOINTR flag before sending cdb, but
3625 } 3783 * interrupt handler shouldn't be invoked before we're
3784 * finished. Hence, the following locking.
3785 */
3786 spin_lock_irqsave(&ap->host_set->lock, flags);
3787 ap->flags &= ~ATA_FLAG_NOINTR;
3788 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3789 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3790 ap->ops->bmdma_start(qc); /* initiate bmdma */
3791 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3792 } else {
3793 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3626 3794
3627 /* PIO commands are handled by polling */ 3795 /* PIO commands are handled by polling */
3628 else {
3629 ap->pio_task_state = PIO_ST; 3796 ap->pio_task_state = PIO_ST;
3630 queue_work(ata_wq, &ap->pio_task); 3797 queue_work(ata_wq, &ap->pio_task);
3631 } 3798 }
@@ -3633,7 +3800,7 @@ static void atapi_packet_task(void *_data)
3633 return; 3800 return;
3634 3801
3635err_out: 3802err_out:
3636 ata_qc_complete(qc, ATA_ERR); 3803 ata_poll_qc_complete(qc, ATA_ERR);
3637} 3804}
3638 3805
3639 3806
diff --git a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c
index c6aeab1630e..346eb36b1e3 100644
--- a/drivers/scsi/libata-scsi.c
+++ b/drivers/scsi/libata-scsi.c
@@ -403,6 +403,60 @@ int ata_scsi_error(struct Scsi_Host *host)
403} 403}
404 404
405/** 405/**
406 * ata_scsi_start_stop_xlat - Translate SCSI START STOP UNIT command
407 * @qc: Storage for translated ATA taskfile
408 * @scsicmd: SCSI command to translate
409 *
410 * Sets up an ATA taskfile to issue STANDBY (to stop) or READ VERIFY
411 * (to start). Perhaps these commands should be preceded by
412 * CHECK POWER MODE to see what power mode the device is already in.
413 * [See SAT revision 5 at www.t10.org]
414 *
415 * LOCKING:
416 * spin_lock_irqsave(host_set lock)
417 *
418 * RETURNS:
419 * Zero on success, non-zero on error.
420 */
421
422static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc,
423 u8 *scsicmd)
424{
425 struct ata_taskfile *tf = &qc->tf;
426
427 tf->flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
428 tf->protocol = ATA_PROT_NODATA;
429 if (scsicmd[1] & 0x1) {
430 ; /* ignore IMMED bit, violates sat-r05 */
431 }
432 if (scsicmd[4] & 0x2)
433 return 1; /* LOEJ bit set not supported */
434 if (((scsicmd[4] >> 4) & 0xf) != 0)
435 return 1; /* power conditions not supported */
436 if (scsicmd[4] & 0x1) {
437 tf->nsect = 1; /* 1 sector, lba=0 */
438 tf->lbah = 0x0;
439 tf->lbam = 0x0;
440 tf->lbal = 0x0;
441 tf->device |= ATA_LBA;
442 tf->command = ATA_CMD_VERIFY; /* READ VERIFY */
443 } else {
444 tf->nsect = 0; /* time period value (0 implies now) */
445 tf->command = ATA_CMD_STANDBY;
446 /* Consider: ATA STANDBY IMMEDIATE command */
447 }
448 /*
449 * Standby and Idle condition timers could be implemented but that
450 * would require libata to implement the Power condition mode page
451 * and allow the user to change it. Changing mode pages requires
452 * MODE SELECT to be implemented.
453 */
454
455 return 0;
456}
457
458
459/**
406 * ata_scsi_flush_xlat - Translate SCSI SYNCHRONIZE CACHE command 460 * ata_scsi_flush_xlat - Translate SCSI SYNCHRONIZE CACHE command
407 * @qc: Storage for translated ATA taskfile 461 * @qc: Storage for translated ATA taskfile
408 * @scsicmd: SCSI command to translate (ignored) 462 * @scsicmd: SCSI command to translate (ignored)
@@ -587,11 +641,19 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, u8 *scsicmd)
587 tf->lbah = scsicmd[3]; 641 tf->lbah = scsicmd[3];
588 642
589 VPRINTK("ten-byte command\n"); 643 VPRINTK("ten-byte command\n");
644 if (qc->nsect == 0) /* we don't support length==0 cmds */
645 return 1;
590 return 0; 646 return 0;
591 } 647 }
592 648
593 if (scsicmd[0] == READ_6 || scsicmd[0] == WRITE_6) { 649 if (scsicmd[0] == READ_6 || scsicmd[0] == WRITE_6) {
594 qc->nsect = tf->nsect = scsicmd[4]; 650 qc->nsect = tf->nsect = scsicmd[4];
651 if (!qc->nsect) {
652 qc->nsect = 256;
653 if (lba48)
654 tf->hob_nsect = 1;
655 }
656
595 tf->lbal = scsicmd[3]; 657 tf->lbal = scsicmd[3];
596 tf->lbam = scsicmd[2]; 658 tf->lbam = scsicmd[2];
597 tf->lbah = scsicmd[1] & 0x1f; /* mask out reserved bits */ 659 tf->lbah = scsicmd[1] & 0x1f; /* mask out reserved bits */
@@ -631,6 +693,8 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, u8 *scsicmd)
631 tf->lbah = scsicmd[7]; 693 tf->lbah = scsicmd[7];
632 694
633 VPRINTK("sixteen-byte command\n"); 695 VPRINTK("sixteen-byte command\n");
696 if (qc->nsect == 0) /* we don't support length==0 cmds */
697 return 1;
634 return 0; 698 return 0;
635 } 699 }
636 700
@@ -1446,6 +1510,8 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd)
1446 case VERIFY: 1510 case VERIFY:
1447 case VERIFY_16: 1511 case VERIFY_16:
1448 return ata_scsi_verify_xlat; 1512 return ata_scsi_verify_xlat;
1513 case START_STOP:
1514 return ata_scsi_start_stop_xlat;
1449 } 1515 }
1450 1516
1451 return NULL; 1517 return NULL;
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h
index c51d658903d..809c634afbc 100644
--- a/drivers/scsi/libata.h
+++ b/drivers/scsi/libata.h
@@ -75,7 +75,7 @@ extern unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf,
75extern void ata_scsi_badcmd(struct scsi_cmnd *cmd, 75extern void ata_scsi_badcmd(struct scsi_cmnd *cmd,
76 void (*done)(struct scsi_cmnd *), 76 void (*done)(struct scsi_cmnd *),
77 u8 asc, u8 ascq); 77 u8 asc, u8 ascq);
78extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args, 78extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args,
79 unsigned int (*actor) (struct ata_scsi_args *args, 79 unsigned int (*actor) (struct ata_scsi_args *args,
80 u8 *rbuf, unsigned int buflen)); 80 u8 *rbuf, unsigned int buflen));
81 81
diff --git a/drivers/scsi/sata_nv.c b/drivers/scsi/sata_nv.c
index a61c1509aeb..03d9bc6e69d 100644
--- a/drivers/scsi/sata_nv.c
+++ b/drivers/scsi/sata_nv.c
@@ -30,6 +30,12 @@
30 * hotplug info, etc. 30 * hotplug info, etc.
31 * 31 *
32 * 32 *
33 * 0.08
34 * - Added support for MCP51 and MCP55.
35 *
36 * 0.07
37 * - Added support for RAID class code.
38 *
33 * 0.06 39 * 0.06
34 * - Added generic SATA support by using a pci_device_id that filters on 40 * - Added generic SATA support by using a pci_device_id that filters on
35 * the IDE storage class code. 41 * the IDE storage class code.
@@ -58,7 +64,7 @@
58#include <linux/libata.h> 64#include <linux/libata.h>
59 65
60#define DRV_NAME "sata_nv" 66#define DRV_NAME "sata_nv"
61#define DRV_VERSION "0.6" 67#define DRV_VERSION "0.8"
62 68
63#define NV_PORTS 2 69#define NV_PORTS 2
64#define NV_PIO_MASK 0x1f 70#define NV_PIO_MASK 0x1f
@@ -126,7 +132,9 @@ enum nv_host_type
126 GENERIC, 132 GENERIC,
127 NFORCE2, 133 NFORCE2,
128 NFORCE3, 134 NFORCE3,
129 CK804 135 CK804,
136 MCP51,
137 MCP55
130}; 138};
131 139
132static struct pci_device_id nv_pci_tbl[] = { 140static struct pci_device_id nv_pci_tbl[] = {
@@ -144,9 +152,18 @@ static struct pci_device_id nv_pci_tbl[] = {
144 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, 152 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
145 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, 153 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2,
146 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, 154 PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 },
155 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA,
156 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 },
157 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2,
158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 },
159 { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA,
160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP55 },
147 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, 161 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
148 PCI_ANY_ID, PCI_ANY_ID, 162 PCI_ANY_ID, PCI_ANY_ID,
149 PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, 163 PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
164 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
165 PCI_ANY_ID, PCI_ANY_ID,
166 PCI_CLASS_STORAGE_RAID<<8, 0xffff00, GENERIC },
150 { 0, } /* terminate list */ 167 { 0, } /* terminate list */
151}; 168};
152 169
@@ -284,7 +301,8 @@ static irqreturn_t nv_interrupt (int irq, void *dev_instance,
284 struct ata_port *ap; 301 struct ata_port *ap;
285 302
286 ap = host_set->ports[i]; 303 ap = host_set->ports[i];
287 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { 304 if (ap &&
305 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
288 struct ata_queued_cmd *qc; 306 struct ata_queued_cmd *qc;
289 307
290 qc = ata_qc_from_tag(ap, ap->active_tag); 308 qc = ata_qc_from_tag(ap, ap->active_tag);
diff --git a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c
index b27e2e20280..4d8201422a1 100644
--- a/drivers/scsi/sata_promise.c
+++ b/drivers/scsi/sata_promise.c
@@ -186,6 +186,10 @@ static struct pci_device_id pdc_ata_pci_tbl[] = {
186 board_20319 }, 186 board_20319 },
187 { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 187 { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
188 board_20319 }, 188 board_20319 },
189 { PCI_VENDOR_ID_PROMISE, 0x3519, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
190 board_20319 },
191 { PCI_VENDOR_ID_PROMISE, 0x3d17, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
192 board_20319 },
189 { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 193 { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
190 board_20319 }, 194 board_20319 },
191 195
@@ -326,11 +330,15 @@ static void pdc_qc_prep(struct ata_queued_cmd *qc)
326 330
327static void pdc_eng_timeout(struct ata_port *ap) 331static void pdc_eng_timeout(struct ata_port *ap)
328{ 332{
333 struct ata_host_set *host_set = ap->host_set;
329 u8 drv_stat; 334 u8 drv_stat;
330 struct ata_queued_cmd *qc; 335 struct ata_queued_cmd *qc;
336 unsigned long flags;
331 337
332 DPRINTK("ENTER\n"); 338 DPRINTK("ENTER\n");
333 339
340 spin_lock_irqsave(&host_set->lock, flags);
341
334 qc = ata_qc_from_tag(ap, ap->active_tag); 342 qc = ata_qc_from_tag(ap, ap->active_tag);
335 if (!qc) { 343 if (!qc) {
336 printk(KERN_ERR "ata%u: BUG: timeout without command\n", 344 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
@@ -364,6 +372,7 @@ static void pdc_eng_timeout(struct ata_port *ap)
364 } 372 }
365 373
366out: 374out:
375 spin_unlock_irqrestore(&host_set->lock, flags);
367 DPRINTK("EXIT\n"); 376 DPRINTK("EXIT\n");
368} 377}
369 378
@@ -446,7 +455,8 @@ static irqreturn_t pdc_interrupt (int irq, void *dev_instance, struct pt_regs *r
446 VPRINTK("port %u\n", i); 455 VPRINTK("port %u\n", i);
447 ap = host_set->ports[i]; 456 ap = host_set->ports[i];
448 tmp = mask & (1 << (i + 1)); 457 tmp = mask & (1 << (i + 1));
449 if (tmp && ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { 458 if (tmp && ap &&
459 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
450 struct ata_queued_cmd *qc; 460 struct ata_queued_cmd *qc;
451 461
452 qc = ata_qc_from_tag(ap, ap->active_tag); 462 qc = ata_qc_from_tag(ap, ap->active_tag);
diff --git a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c
index f6b716f4fab..9c99ab433bd 100644
--- a/drivers/scsi/sata_qstor.c
+++ b/drivers/scsi/sata_qstor.c
@@ -120,7 +120,7 @@ static void qs_phy_reset(struct ata_port *ap);
120static void qs_qc_prep(struct ata_queued_cmd *qc); 120static void qs_qc_prep(struct ata_queued_cmd *qc);
121static int qs_qc_issue(struct ata_queued_cmd *qc); 121static int qs_qc_issue(struct ata_queued_cmd *qc);
122static int qs_check_atapi_dma(struct ata_queued_cmd *qc); 122static int qs_check_atapi_dma(struct ata_queued_cmd *qc);
123static void qs_bmdma_stop(struct ata_port *ap); 123static void qs_bmdma_stop(struct ata_queued_cmd *qc);
124static u8 qs_bmdma_status(struct ata_port *ap); 124static u8 qs_bmdma_status(struct ata_port *ap);
125static void qs_irq_clear(struct ata_port *ap); 125static void qs_irq_clear(struct ata_port *ap);
126static void qs_eng_timeout(struct ata_port *ap); 126static void qs_eng_timeout(struct ata_port *ap);
@@ -201,7 +201,7 @@ static int qs_check_atapi_dma(struct ata_queued_cmd *qc)
201 return 1; /* ATAPI DMA not supported */ 201 return 1; /* ATAPI DMA not supported */
202} 202}
203 203
204static void qs_bmdma_stop(struct ata_port *ap) 204static void qs_bmdma_stop(struct ata_queued_cmd *qc)
205{ 205{
206 /* nothing */ 206 /* nothing */
207} 207}
@@ -389,7 +389,8 @@ static inline unsigned int qs_intr_pkt(struct ata_host_set *host_set)
389 DPRINTK("SFF=%08x%08x: sCHAN=%u sHST=%d sDST=%02x\n", 389 DPRINTK("SFF=%08x%08x: sCHAN=%u sHST=%d sDST=%02x\n",
390 sff1, sff0, port_no, sHST, sDST); 390 sff1, sff0, port_no, sHST, sDST);
391 handled = 1; 391 handled = 1;
392 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { 392 if (ap && !(ap->flags &
393 (ATA_FLAG_PORT_DISABLED|ATA_FLAG_NOINTR))) {
393 struct ata_queued_cmd *qc; 394 struct ata_queued_cmd *qc;
394 struct qs_port_priv *pp = ap->private_data; 395 struct qs_port_priv *pp = ap->private_data;
395 if (!pp || pp->state != qs_state_pkt) 396 if (!pp || pp->state != qs_state_pkt)
@@ -420,7 +421,8 @@ static inline unsigned int qs_intr_mmio(struct ata_host_set *host_set)
420 for (port_no = 0; port_no < host_set->n_ports; ++port_no) { 421 for (port_no = 0; port_no < host_set->n_ports; ++port_no) {
421 struct ata_port *ap; 422 struct ata_port *ap;
422 ap = host_set->ports[port_no]; 423 ap = host_set->ports[port_no];
423 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { 424 if (ap &&
425 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
424 struct ata_queued_cmd *qc; 426 struct ata_queued_cmd *qc;
425 struct qs_port_priv *pp = ap->private_data; 427 struct qs_port_priv *pp = ap->private_data;
426 if (!pp || pp->state != qs_state_mmio) 428 if (!pp || pp->state != qs_state_mmio)
@@ -434,7 +436,7 @@ static inline unsigned int qs_intr_mmio(struct ata_host_set *host_set)
434 continue; 436 continue;
435 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", 437 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
436 ap->id, qc->tf.protocol, status); 438 ap->id, qc->tf.protocol, status);
437 439
438 /* complete taskfile transaction */ 440 /* complete taskfile transaction */
439 pp->state = qs_state_idle; 441 pp->state = qs_state_idle;
440 ata_qc_complete(qc, status); 442 ata_qc_complete(qc, status);
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c
index 345e6f2d28a..71d49548f0a 100644
--- a/drivers/scsi/sata_sil.c
+++ b/drivers/scsi/sata_sil.c
@@ -27,6 +27,11 @@
27 * libata documentation is available via 'make {ps|pdf}docs', 27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.* 28 * as Documentation/DocBook/libata.*
29 * 29 *
30 * Documentation for SiI 3112:
31 * http://gkernel.sourceforge.net/specs/sii/3112A_SiI-DS-0095-B2.pdf.bz2
32 *
33 * Other errata and documentation available under NDA.
34 *
30 */ 35 */
31 36
32#include <linux/kernel.h> 37#include <linux/kernel.h>
@@ -44,8 +49,11 @@
44#define DRV_VERSION "0.9" 49#define DRV_VERSION "0.9"
45 50
46enum { 51enum {
52 SIL_FLAG_MOD15WRITE = (1 << 30),
53
47 sil_3112 = 0, 54 sil_3112 = 0,
48 sil_3114 = 1, 55 sil_3112_m15w = 1,
56 sil_3114 = 2,
49 57
50 SIL_FIFO_R0 = 0x40, 58 SIL_FIFO_R0 = 0x40,
51 SIL_FIFO_W0 = 0x41, 59 SIL_FIFO_W0 = 0x41,
@@ -79,13 +87,13 @@ static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
79static void sil_post_set_mode (struct ata_port *ap); 87static void sil_post_set_mode (struct ata_port *ap);
80 88
81static struct pci_device_id sil_pci_tbl[] = { 89static struct pci_device_id sil_pci_tbl[] = {
82 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 90 { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
83 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 91 { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
84 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 92 { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 },
85 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, 93 { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 },
86 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 94 { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
87 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 95 { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
88 { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, 96 { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w },
89 { } /* terminate list */ 97 { } /* terminate list */
90}; 98};
91 99
@@ -177,6 +185,16 @@ static struct ata_port_info sil_port_info[] = {
177 .mwdma_mask = 0x07, /* mwdma0-2 */ 185 .mwdma_mask = 0x07, /* mwdma0-2 */
178 .udma_mask = 0x3f, /* udma0-5 */ 186 .udma_mask = 0x3f, /* udma0-5 */
179 .port_ops = &sil_ops, 187 .port_ops = &sil_ops,
188 }, /* sil_3112_15w - keep it sync'd w/ sil_3112 */
189 {
190 .sht = &sil_sht,
191 .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
192 ATA_FLAG_SRST | ATA_FLAG_MMIO |
193 SIL_FLAG_MOD15WRITE,
194 .pio_mask = 0x1f, /* pio0-4 */
195 .mwdma_mask = 0x07, /* mwdma0-2 */
196 .udma_mask = 0x3f, /* udma0-5 */
197 .port_ops = &sil_ops,
180 }, /* sil_3114 */ 198 }, /* sil_3114 */
181 { 199 {
182 .sht = &sil_sht, 200 .sht = &sil_sht,
@@ -326,15 +344,15 @@ static void sil_dev_config(struct ata_port *ap, struct ata_device *dev)
326 while ((len > 0) && (s[len - 1] == ' ')) 344 while ((len > 0) && (s[len - 1] == ' '))
327 len--; 345 len--;
328 346
329 for (n = 0; sil_blacklist[n].product; n++) 347 for (n = 0; sil_blacklist[n].product; n++)
330 if (!memcmp(sil_blacklist[n].product, s, 348 if (!memcmp(sil_blacklist[n].product, s,
331 strlen(sil_blacklist[n].product))) { 349 strlen(sil_blacklist[n].product))) {
332 quirks = sil_blacklist[n].quirk; 350 quirks = sil_blacklist[n].quirk;
333 break; 351 break;
334 } 352 }
335 353
336 /* limit requests to 15 sectors */ 354 /* limit requests to 15 sectors */
337 if (quirks & SIL_QUIRK_MOD15WRITE) { 355 if ((ap->flags & SIL_FLAG_MOD15WRITE) && (quirks & SIL_QUIRK_MOD15WRITE)) {
338 printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n", 356 printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n",
339 ap->id, dev->devno); 357 ap->id, dev->devno);
340 ap->host->max_sectors = 15; 358 ap->host->max_sectors = 15;
diff --git a/drivers/scsi/sata_sis.c b/drivers/scsi/sata_sis.c
index 6db8b09db40..43af445b3ad 100644
--- a/drivers/scsi/sata_sis.c
+++ b/drivers/scsi/sata_sis.c
@@ -239,7 +239,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
239 pci_read_config_dword(pdev, SIS_GENCTL, &genctl); 239 pci_read_config_dword(pdev, SIS_GENCTL, &genctl);
240 if ((genctl & GENCTL_IOMAPPED_SCR) == 0) 240 if ((genctl & GENCTL_IOMAPPED_SCR) == 0)
241 probe_ent->host_flags |= SIS_FLAG_CFGSCR; 241 probe_ent->host_flags |= SIS_FLAG_CFGSCR;
242 242
243 /* if hardware thinks SCRs are in IO space, but there are 243 /* if hardware thinks SCRs are in IO space, but there are
244 * no IO resources assigned, change to PCI cfg space. 244 * no IO resources assigned, change to PCI cfg space.
245 */ 245 */
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c
index 3884a3cce75..19d3bb3b0fb 100644
--- a/drivers/scsi/sata_svw.c
+++ b/drivers/scsi/sata_svw.c
@@ -200,18 +200,18 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc)
200 /* start host DMA transaction */ 200 /* start host DMA transaction */
201 dmactl = readb(mmio + ATA_DMA_CMD); 201 dmactl = readb(mmio + ATA_DMA_CMD);
202 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); 202 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
203 /* There is a race condition in certain SATA controllers that can 203 /* There is a race condition in certain SATA controllers that can
204 be seen when the r/w command is given to the controller before the 204 be seen when the r/w command is given to the controller before the
205 host DMA is started. On a Read command, the controller would initiate 205 host DMA is started. On a Read command, the controller would initiate
206 the command to the drive even before it sees the DMA start. When there 206 the command to the drive even before it sees the DMA start. When there
207 are very fast drives connected to the controller, or when the data request 207 are very fast drives connected to the controller, or when the data request
208 hits in the drive cache, there is the possibility that the drive returns a part 208 hits in the drive cache, there is the possibility that the drive returns a part
209 or all of the requested data to the controller before the DMA start is issued. 209 or all of the requested data to the controller before the DMA start is issued.
210 In this case, the controller would become confused as to what to do with the data. 210 In this case, the controller would become confused as to what to do with the data.
211 In the worst case when all the data is returned back to the controller, the 211 In the worst case when all the data is returned back to the controller, the
212 controller could hang. In other cases it could return partial data returning 212 controller could hang. In other cases it could return partial data returning
213 in data corruption. This problem has been seen in PPC systems and can also appear 213 in data corruption. This problem has been seen in PPC systems and can also appear
214 on an system with very fast disks, where the SATA controller is sitting behind a 214 on an system with very fast disks, where the SATA controller is sitting behind a
215 number of bridges, and hence there is significant latency between the r/w command 215 number of bridges, and hence there is significant latency between the r/w command
216 and the start command. */ 216 and the start command. */
217 /* issue r/w command if the access is to ATA*/ 217 /* issue r/w command if the access is to ATA*/
@@ -219,7 +219,7 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc)
219 ap->ops->exec_command(ap, &qc->tf); 219 ap->ops->exec_command(ap, &qc->tf);
220} 220}
221 221
222 222
223static u8 k2_stat_check_status(struct ata_port *ap) 223static u8 k2_stat_check_status(struct ata_port *ap)
224{ 224{
225 return readl((void *) ap->ioaddr.status_addr); 225 return readl((void *) ap->ioaddr.status_addr);
diff --git a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c
index c7f6ec262a1..c72fcc46f0f 100644
--- a/drivers/scsi/sata_sx4.c
+++ b/drivers/scsi/sata_sx4.c
@@ -99,7 +99,7 @@ enum {
99 PDC_DIMM1_CONTROL_OFFSET = 0x84, 99 PDC_DIMM1_CONTROL_OFFSET = 0x84,
100 PDC_SDRAM_CONTROL_OFFSET = 0x88, 100 PDC_SDRAM_CONTROL_OFFSET = 0x88,
101 PDC_I2C_WRITE = 0x00000000, 101 PDC_I2C_WRITE = 0x00000000,
102 PDC_I2C_READ = 0x00000040, 102 PDC_I2C_READ = 0x00000040,
103 PDC_I2C_START = 0x00000080, 103 PDC_I2C_START = 0x00000080,
104 PDC_I2C_MASK_INT = 0x00000020, 104 PDC_I2C_MASK_INT = 0x00000020,
105 PDC_I2C_COMPLETE = 0x00010000, 105 PDC_I2C_COMPLETE = 0x00010000,
@@ -110,16 +110,16 @@ enum {
110 PDC_DIMM_SPD_COLUMN_NUM = 4, 110 PDC_DIMM_SPD_COLUMN_NUM = 4,
111 PDC_DIMM_SPD_MODULE_ROW = 5, 111 PDC_DIMM_SPD_MODULE_ROW = 5,
112 PDC_DIMM_SPD_TYPE = 11, 112 PDC_DIMM_SPD_TYPE = 11,
113 PDC_DIMM_SPD_FRESH_RATE = 12, 113 PDC_DIMM_SPD_FRESH_RATE = 12,
114 PDC_DIMM_SPD_BANK_NUM = 17, 114 PDC_DIMM_SPD_BANK_NUM = 17,
115 PDC_DIMM_SPD_CAS_LATENCY = 18, 115 PDC_DIMM_SPD_CAS_LATENCY = 18,
116 PDC_DIMM_SPD_ATTRIBUTE = 21, 116 PDC_DIMM_SPD_ATTRIBUTE = 21,
117 PDC_DIMM_SPD_ROW_PRE_CHARGE = 27, 117 PDC_DIMM_SPD_ROW_PRE_CHARGE = 27,
118 PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28, 118 PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28,
119 PDC_DIMM_SPD_RAS_CAS_DELAY = 29, 119 PDC_DIMM_SPD_RAS_CAS_DELAY = 29,
120 PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30, 120 PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30,
121 PDC_DIMM_SPD_SYSTEM_FREQ = 126, 121 PDC_DIMM_SPD_SYSTEM_FREQ = 126,
122 PDC_CTL_STATUS = 0x08, 122 PDC_CTL_STATUS = 0x08,
123 PDC_DIMM_WINDOW_CTLR = 0x0C, 123 PDC_DIMM_WINDOW_CTLR = 0x0C,
124 PDC_TIME_CONTROL = 0x3C, 124 PDC_TIME_CONTROL = 0x3C,
125 PDC_TIME_PERIOD = 0x40, 125 PDC_TIME_PERIOD = 0x40,
@@ -162,15 +162,15 @@ static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf);
162static void pdc20621_host_stop(struct ata_host_set *host_set); 162static void pdc20621_host_stop(struct ata_host_set *host_set);
163static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); 163static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe);
164static int pdc20621_detect_dimm(struct ata_probe_ent *pe); 164static int pdc20621_detect_dimm(struct ata_probe_ent *pe);
165static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, 165static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe,
166 u32 device, u32 subaddr, u32 *pdata); 166 u32 device, u32 subaddr, u32 *pdata);
167static int pdc20621_prog_dimm0(struct ata_probe_ent *pe); 167static int pdc20621_prog_dimm0(struct ata_probe_ent *pe);
168static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe); 168static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe);
169#ifdef ATA_VERBOSE_DEBUG 169#ifdef ATA_VERBOSE_DEBUG
170static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, 170static void pdc20621_get_from_dimm(struct ata_probe_ent *pe,
171 void *psource, u32 offset, u32 size); 171 void *psource, u32 offset, u32 size);
172#endif 172#endif
173static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, 173static void pdc20621_put_to_dimm(struct ata_probe_ent *pe,
174 void *psource, u32 offset, u32 size); 174 void *psource, u32 offset, u32 size);
175static void pdc20621_irq_clear(struct ata_port *ap); 175static void pdc20621_irq_clear(struct ata_port *ap);
176static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); 176static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc);
@@ -830,7 +830,8 @@ static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance, struct pt_re
830 ap = host_set->ports[port_no]; 830 ap = host_set->ports[port_no];
831 tmp = mask & (1 << i); 831 tmp = mask & (1 << i);
832 VPRINTK("seq %u, port_no %u, ap %p, tmp %x\n", i, port_no, ap, tmp); 832 VPRINTK("seq %u, port_no %u, ap %p, tmp %x\n", i, port_no, ap, tmp);
833 if (tmp && ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { 833 if (tmp && ap &&
834 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
834 struct ata_queued_cmd *qc; 835 struct ata_queued_cmd *qc;
835 836
836 qc = ata_qc_from_tag(ap, ap->active_tag); 837 qc = ata_qc_from_tag(ap, ap->active_tag);
@@ -852,10 +853,14 @@ static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance, struct pt_re
852static void pdc_eng_timeout(struct ata_port *ap) 853static void pdc_eng_timeout(struct ata_port *ap)
853{ 854{
854 u8 drv_stat; 855 u8 drv_stat;
856 struct ata_host_set *host_set = ap->host_set;
855 struct ata_queued_cmd *qc; 857 struct ata_queued_cmd *qc;
858 unsigned long flags;
856 859
857 DPRINTK("ENTER\n"); 860 DPRINTK("ENTER\n");
858 861
862 spin_lock_irqsave(&host_set->lock, flags);
863
859 qc = ata_qc_from_tag(ap, ap->active_tag); 864 qc = ata_qc_from_tag(ap, ap->active_tag);
860 if (!qc) { 865 if (!qc) {
861 printk(KERN_ERR "ata%u: BUG: timeout without command\n", 866 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
@@ -889,6 +894,7 @@ static void pdc_eng_timeout(struct ata_port *ap)
889 } 894 }
890 895
891out: 896out:
897 spin_unlock_irqrestore(&host_set->lock, flags);
892 DPRINTK("EXIT\n"); 898 DPRINTK("EXIT\n");
893} 899}
894 900
@@ -927,7 +933,7 @@ static void pdc_sata_setup_port(struct ata_ioports *port, unsigned long base)
927 933
928 934
929#ifdef ATA_VERBOSE_DEBUG 935#ifdef ATA_VERBOSE_DEBUG
930static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, 936static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource,
931 u32 offset, u32 size) 937 u32 offset, u32 size)
932{ 938{
933 u32 window_size; 939 u32 window_size;
@@ -941,9 +947,9 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource,
941 /* hard-code chip #0 */ 947 /* hard-code chip #0 */
942 mmio += PDC_CHIP0_OFS; 948 mmio += PDC_CHIP0_OFS;
943 949
944 page_mask = 0x00; 950 page_mask = 0x00;
945 window_size = 0x2000 * 4; /* 32K byte uchar size */ 951 window_size = 0x2000 * 4; /* 32K byte uchar size */
946 idx = (u16) (offset / window_size); 952 idx = (u16) (offset / window_size);
947 953
948 writel(0x01, mmio + PDC_GENERAL_CTLR); 954 writel(0x01, mmio + PDC_GENERAL_CTLR);
949 readl(mmio + PDC_GENERAL_CTLR); 955 readl(mmio + PDC_GENERAL_CTLR);
@@ -952,19 +958,19 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource,
952 958
953 offset -= (idx * window_size); 959 offset -= (idx * window_size);
954 idx++; 960 idx++;
955 dist = ((long) (window_size - (offset + size))) >= 0 ? size : 961 dist = ((long) (window_size - (offset + size))) >= 0 ? size :
956 (long) (window_size - offset); 962 (long) (window_size - offset);
957 memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), 963 memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4),
958 dist); 964 dist);
959 965
960 psource += dist; 966 psource += dist;
961 size -= dist; 967 size -= dist;
962 for (; (long) size >= (long) window_size ;) { 968 for (; (long) size >= (long) window_size ;) {
963 writel(0x01, mmio + PDC_GENERAL_CTLR); 969 writel(0x01, mmio + PDC_GENERAL_CTLR);
964 readl(mmio + PDC_GENERAL_CTLR); 970 readl(mmio + PDC_GENERAL_CTLR);
965 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); 971 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
966 readl(mmio + PDC_DIMM_WINDOW_CTLR); 972 readl(mmio + PDC_DIMM_WINDOW_CTLR);
967 memcpy_fromio((char *) psource, (char *) (dimm_mmio), 973 memcpy_fromio((char *) psource, (char *) (dimm_mmio),
968 window_size / 4); 974 window_size / 4);
969 psource += window_size; 975 psource += window_size;
970 size -= window_size; 976 size -= window_size;
@@ -976,14 +982,14 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource,
976 readl(mmio + PDC_GENERAL_CTLR); 982 readl(mmio + PDC_GENERAL_CTLR);
977 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); 983 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
978 readl(mmio + PDC_DIMM_WINDOW_CTLR); 984 readl(mmio + PDC_DIMM_WINDOW_CTLR);
979 memcpy_fromio((char *) psource, (char *) (dimm_mmio), 985 memcpy_fromio((char *) psource, (char *) (dimm_mmio),
980 size / 4); 986 size / 4);
981 } 987 }
982} 988}
983#endif 989#endif
984 990
985 991
986static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, 992static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
987 u32 offset, u32 size) 993 u32 offset, u32 size)
988{ 994{
989 u32 window_size; 995 u32 window_size;
@@ -994,16 +1000,16 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
994 struct pdc_host_priv *hpriv = pe->private_data; 1000 struct pdc_host_priv *hpriv = pe->private_data;
995 void *dimm_mmio = hpriv->dimm_mmio; 1001 void *dimm_mmio = hpriv->dimm_mmio;
996 1002
997 /* hard-code chip #0 */ 1003 /* hard-code chip #0 */
998 mmio += PDC_CHIP0_OFS; 1004 mmio += PDC_CHIP0_OFS;
999 1005
1000 page_mask = 0x00; 1006 page_mask = 0x00;
1001 window_size = 0x2000 * 4; /* 32K byte uchar size */ 1007 window_size = 0x2000 * 4; /* 32K byte uchar size */
1002 idx = (u16) (offset / window_size); 1008 idx = (u16) (offset / window_size);
1003 1009
1004 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); 1010 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
1005 readl(mmio + PDC_DIMM_WINDOW_CTLR); 1011 readl(mmio + PDC_DIMM_WINDOW_CTLR);
1006 offset -= (idx * window_size); 1012 offset -= (idx * window_size);
1007 idx++; 1013 idx++;
1008 dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : 1014 dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size :
1009 (long) (window_size - offset); 1015 (long) (window_size - offset);
@@ -1011,12 +1017,12 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
1011 writel(0x01, mmio + PDC_GENERAL_CTLR); 1017 writel(0x01, mmio + PDC_GENERAL_CTLR);
1012 readl(mmio + PDC_GENERAL_CTLR); 1018 readl(mmio + PDC_GENERAL_CTLR);
1013 1019
1014 psource += dist; 1020 psource += dist;
1015 size -= dist; 1021 size -= dist;
1016 for (; (long) size >= (long) window_size ;) { 1022 for (; (long) size >= (long) window_size ;) {
1017 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); 1023 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
1018 readl(mmio + PDC_DIMM_WINDOW_CTLR); 1024 readl(mmio + PDC_DIMM_WINDOW_CTLR);
1019 memcpy_toio((char *) (dimm_mmio), (char *) psource, 1025 memcpy_toio((char *) (dimm_mmio), (char *) psource,
1020 window_size / 4); 1026 window_size / 4);
1021 writel(0x01, mmio + PDC_GENERAL_CTLR); 1027 writel(0x01, mmio + PDC_GENERAL_CTLR);
1022 readl(mmio + PDC_GENERAL_CTLR); 1028 readl(mmio + PDC_GENERAL_CTLR);
@@ -1024,7 +1030,7 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
1024 size -= window_size; 1030 size -= window_size;
1025 idx ++; 1031 idx ++;
1026 } 1032 }
1027 1033
1028 if (size) { 1034 if (size) {
1029 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); 1035 writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR);
1030 readl(mmio + PDC_DIMM_WINDOW_CTLR); 1036 readl(mmio + PDC_DIMM_WINDOW_CTLR);
@@ -1035,12 +1041,12 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource,
1035} 1041}
1036 1042
1037 1043
1038static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, 1044static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device,
1039 u32 subaddr, u32 *pdata) 1045 u32 subaddr, u32 *pdata)
1040{ 1046{
1041 void *mmio = pe->mmio_base; 1047 void *mmio = pe->mmio_base;
1042 u32 i2creg = 0; 1048 u32 i2creg = 0;
1043 u32 status; 1049 u32 status;
1044 u32 count =0; 1050 u32 count =0;
1045 1051
1046 /* hard-code chip #0 */ 1052 /* hard-code chip #0 */
@@ -1054,7 +1060,7 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device,
1054 readl(mmio + PDC_I2C_ADDR_DATA_OFFSET); 1060 readl(mmio + PDC_I2C_ADDR_DATA_OFFSET);
1055 1061
1056 /* Write Control to perform read operation, mask int */ 1062 /* Write Control to perform read operation, mask int */
1057 writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, 1063 writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT,
1058 mmio + PDC_I2C_CONTROL_OFFSET); 1064 mmio + PDC_I2C_CONTROL_OFFSET);
1059 1065
1060 for (count = 0; count <= 1000; count ++) { 1066 for (count = 0; count <= 1000; count ++) {
@@ -1067,26 +1073,26 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device,
1067 } 1073 }
1068 1074
1069 *pdata = (status >> 8) & 0x000000ff; 1075 *pdata = (status >> 8) & 0x000000ff;
1070 return 1; 1076 return 1;
1071} 1077}
1072 1078
1073 1079
1074static int pdc20621_detect_dimm(struct ata_probe_ent *pe) 1080static int pdc20621_detect_dimm(struct ata_probe_ent *pe)
1075{ 1081{
1076 u32 data=0 ; 1082 u32 data=0 ;
1077 if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 1083 if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,
1078 PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { 1084 PDC_DIMM_SPD_SYSTEM_FREQ, &data)) {
1079 if (data == 100) 1085 if (data == 100)
1080 return 100; 1086 return 100;
1081 } else 1087 } else
1082 return 0; 1088 return 0;
1083 1089
1084 if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { 1090 if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) {
1085 if(data <= 0x75) 1091 if(data <= 0x75)
1086 return 133; 1092 return 133;
1087 } else 1093 } else
1088 return 0; 1094 return 0;
1089 1095
1090 return 0; 1096 return 0;
1091} 1097}
1092 1098
@@ -1096,15 +1102,15 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe)
1096 u32 spd0[50]; 1102 u32 spd0[50];
1097 u32 data = 0; 1103 u32 data = 0;
1098 int size, i; 1104 int size, i;
1099 u8 bdimmsize; 1105 u8 bdimmsize;
1100 void *mmio = pe->mmio_base; 1106 void *mmio = pe->mmio_base;
1101 static const struct { 1107 static const struct {
1102 unsigned int reg; 1108 unsigned int reg;
1103 unsigned int ofs; 1109 unsigned int ofs;
1104 } pdc_i2c_read_data [] = { 1110 } pdc_i2c_read_data [] = {
1105 { PDC_DIMM_SPD_TYPE, 11 }, 1111 { PDC_DIMM_SPD_TYPE, 11 },
1106 { PDC_DIMM_SPD_FRESH_RATE, 12 }, 1112 { PDC_DIMM_SPD_FRESH_RATE, 12 },
1107 { PDC_DIMM_SPD_COLUMN_NUM, 4 }, 1113 { PDC_DIMM_SPD_COLUMN_NUM, 4 },
1108 { PDC_DIMM_SPD_ATTRIBUTE, 21 }, 1114 { PDC_DIMM_SPD_ATTRIBUTE, 21 },
1109 { PDC_DIMM_SPD_ROW_NUM, 3 }, 1115 { PDC_DIMM_SPD_ROW_NUM, 3 },
1110 { PDC_DIMM_SPD_BANK_NUM, 17 }, 1116 { PDC_DIMM_SPD_BANK_NUM, 17 },
@@ -1113,7 +1119,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe)
1113 { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 }, 1119 { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 },
1114 { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 }, 1120 { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 },
1115 { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 }, 1121 { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 },
1116 { PDC_DIMM_SPD_CAS_LATENCY, 18 }, 1122 { PDC_DIMM_SPD_CAS_LATENCY, 18 },
1117 }; 1123 };
1118 1124
1119 /* hard-code chip #0 */ 1125 /* hard-code chip #0 */
@@ -1121,17 +1127,17 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe)
1121 1127
1122 for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) 1128 for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++)
1123 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 1129 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,
1124 pdc_i2c_read_data[i].reg, 1130 pdc_i2c_read_data[i].reg,
1125 &spd0[pdc_i2c_read_data[i].ofs]); 1131 &spd0[pdc_i2c_read_data[i].ofs]);
1126 1132
1127 data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); 1133 data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4);
1128 data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | 1134 data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) |
1129 ((((spd0[27] + 9) / 10) - 1) << 8) ; 1135 ((((spd0[27] + 9) / 10) - 1) << 8) ;
1130 data |= (((((spd0[29] > spd0[28]) 1136 data |= (((((spd0[29] > spd0[28])
1131 ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; 1137 ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10;
1132 data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; 1138 data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12;
1133 1139
1134 if (spd0[18] & 0x08) 1140 if (spd0[18] & 0x08)
1135 data |= ((0x03) << 14); 1141 data |= ((0x03) << 14);
1136 else if (spd0[18] & 0x04) 1142 else if (spd0[18] & 0x04)
1137 data |= ((0x02) << 14); 1143 data |= ((0x02) << 14);
@@ -1140,7 +1146,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe)
1140 else 1146 else
1141 data |= (0 << 14); 1147 data |= (0 << 14);
1142 1148
1143 /* 1149 /*
1144 Calculate the size of bDIMMSize (power of 2) and 1150 Calculate the size of bDIMMSize (power of 2) and
1145 merge the DIMM size by program start/end address. 1151 merge the DIMM size by program start/end address.
1146 */ 1152 */
@@ -1150,9 +1156,9 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe)
1150 data |= (((size / 16) - 1) << 16); 1156 data |= (((size / 16) - 1) << 16);
1151 data |= (0 << 23); 1157 data |= (0 << 23);
1152 data |= 8; 1158 data |= 8;
1153 writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); 1159 writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET);
1154 readl(mmio + PDC_DIMM0_CONTROL_OFFSET); 1160 readl(mmio + PDC_DIMM0_CONTROL_OFFSET);
1155 return size; 1161 return size;
1156} 1162}
1157 1163
1158 1164
@@ -1172,12 +1178,12 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe)
1172 Refresh Enable (bit 17) 1178 Refresh Enable (bit 17)
1173 */ 1179 */
1174 1180
1175 data = 0x022259F1; 1181 data = 0x022259F1;
1176 writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); 1182 writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET);
1177 readl(mmio + PDC_SDRAM_CONTROL_OFFSET); 1183 readl(mmio + PDC_SDRAM_CONTROL_OFFSET);
1178 1184
1179 /* Turn on for ECC */ 1185 /* Turn on for ECC */
1180 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 1186 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,
1181 PDC_DIMM_SPD_TYPE, &spd0); 1187 PDC_DIMM_SPD_TYPE, &spd0);
1182 if (spd0 == 0x02) { 1188 if (spd0 == 0x02) {
1183 data |= (0x01 << 16); 1189 data |= (0x01 << 16);
@@ -1191,22 +1197,22 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe)
1191 data |= (1<<19); 1197 data |= (1<<19);
1192 writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); 1198 writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET);
1193 1199
1194 error = 1; 1200 error = 1;
1195 for (i = 1; i <= 10; i++) { /* polling ~5 secs */ 1201 for (i = 1; i <= 10; i++) { /* polling ~5 secs */
1196 data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET); 1202 data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET);
1197 if (!(data & (1<<19))) { 1203 if (!(data & (1<<19))) {
1198 error = 0; 1204 error = 0;
1199 break; 1205 break;
1200 } 1206 }
1201 msleep(i*100); 1207 msleep(i*100);
1202 } 1208 }
1203 return error; 1209 return error;
1204} 1210}
1205 1211
1206 1212
1207static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) 1213static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1208{ 1214{
1209 int speed, size, length; 1215 int speed, size, length;
1210 u32 addr,spd0,pci_status; 1216 u32 addr,spd0,pci_status;
1211 u32 tmp=0; 1217 u32 tmp=0;
1212 u32 time_period=0; 1218 u32 time_period=0;
@@ -1233,7 +1239,7 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1233 /* Wait 3 seconds */ 1239 /* Wait 3 seconds */
1234 msleep(3000); 1240 msleep(3000);
1235 1241
1236 /* 1242 /*
1237 When timer is enabled, counter is decreased every internal 1243 When timer is enabled, counter is decreased every internal
1238 clock cycle. 1244 clock cycle.
1239 */ 1245 */
@@ -1241,24 +1247,24 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1241 tcount = readl(mmio + PDC_TIME_COUNTER); 1247 tcount = readl(mmio + PDC_TIME_COUNTER);
1242 VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); 1248 VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount);
1243 1249
1244 /* 1250 /*
1245 If SX4 is on PCI-X bus, after 3 seconds, the timer counter 1251 If SX4 is on PCI-X bus, after 3 seconds, the timer counter
1246 register should be >= (0xffffffff - 3x10^8). 1252 register should be >= (0xffffffff - 3x10^8).
1247 */ 1253 */
1248 if(tcount >= PCI_X_TCOUNT) { 1254 if(tcount >= PCI_X_TCOUNT) {
1249 ticks = (time_period - tcount); 1255 ticks = (time_period - tcount);
1250 VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); 1256 VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks);
1251 1257
1252 clock = (ticks / 300000); 1258 clock = (ticks / 300000);
1253 VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); 1259 VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock);
1254 1260
1255 clock = (clock * 33); 1261 clock = (clock * 33);
1256 VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); 1262 VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock);
1257 1263
1258 /* PLL F Param (bit 22:16) */ 1264 /* PLL F Param (bit 22:16) */
1259 fparam = (1400000 / clock) - 2; 1265 fparam = (1400000 / clock) - 2;
1260 VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); 1266 VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam);
1261 1267
1262 /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ 1268 /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */
1263 pci_status = (0x8a001824 | (fparam << 16)); 1269 pci_status = (0x8a001824 | (fparam << 16));
1264 } else 1270 } else
@@ -1269,21 +1275,21 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1269 writel(pci_status, mmio + PDC_CTL_STATUS); 1275 writel(pci_status, mmio + PDC_CTL_STATUS);
1270 readl(mmio + PDC_CTL_STATUS); 1276 readl(mmio + PDC_CTL_STATUS);
1271 1277
1272 /* 1278 /*
1273 Read SPD of DIMM by I2C interface, 1279 Read SPD of DIMM by I2C interface,
1274 and program the DIMM Module Controller. 1280 and program the DIMM Module Controller.
1275 */ 1281 */
1276 if (!(speed = pdc20621_detect_dimm(pe))) { 1282 if (!(speed = pdc20621_detect_dimm(pe))) {
1277 printk(KERN_ERR "Detect Local DIMM Fail\n"); 1283 printk(KERN_ERR "Detect Local DIMM Fail\n");
1278 return 1; /* DIMM error */ 1284 return 1; /* DIMM error */
1279 } 1285 }
1280 VPRINTK("Local DIMM Speed = %d\n", speed); 1286 VPRINTK("Local DIMM Speed = %d\n", speed);
1281 1287
1282 /* Programming DIMM0 Module Control Register (index_CID0:80h) */ 1288 /* Programming DIMM0 Module Control Register (index_CID0:80h) */
1283 size = pdc20621_prog_dimm0(pe); 1289 size = pdc20621_prog_dimm0(pe);
1284 VPRINTK("Local DIMM Size = %dMB\n",size); 1290 VPRINTK("Local DIMM Size = %dMB\n",size);
1285 1291
1286 /* Programming DIMM Module Global Control Register (index_CID0:88h) */ 1292 /* Programming DIMM Module Global Control Register (index_CID0:88h) */
1287 if (pdc20621_prog_dimm_global(pe)) { 1293 if (pdc20621_prog_dimm_global(pe)) {
1288 printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); 1294 printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n");
1289 return 1; 1295 return 1;
@@ -1302,30 +1308,30 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe)
1302 1308
1303 pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40); 1309 pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40);
1304 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); 1310 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40);
1305 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 1311 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
1306 test_parttern2[1], &(test_parttern2[2])); 1312 test_parttern2[1], &(test_parttern2[2]));
1307 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, 1313 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040,
1308 40); 1314 40);
1309 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 1315 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
1310 test_parttern2[1], &(test_parttern2[2])); 1316 test_parttern2[1], &(test_parttern2[2]));
1311 1317
1312 pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40); 1318 pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40);
1313 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); 1319 pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40);
1314 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], 1320 printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0],
1315 test_parttern2[1], &(test_parttern2[2])); 1321 test_parttern2[1], &(test_parttern2[2]));
1316 } 1322 }
1317#endif 1323#endif
1318 1324
1319 /* ECC initiliazation. */ 1325 /* ECC initiliazation. */
1320 1326
1321 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 1327 pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS,
1322 PDC_DIMM_SPD_TYPE, &spd0); 1328 PDC_DIMM_SPD_TYPE, &spd0);
1323 if (spd0 == 0x02) { 1329 if (spd0 == 0x02) {
1324 VPRINTK("Start ECC initialization\n"); 1330 VPRINTK("Start ECC initialization\n");
1325 addr = 0; 1331 addr = 0;
1326 length = size * 1024 * 1024; 1332 length = size * 1024 * 1024;
1327 while (addr < length) { 1333 while (addr < length) {
1328 pdc20621_put_to_dimm(pe, (void *) &tmp, addr, 1334 pdc20621_put_to_dimm(pe, (void *) &tmp, addr,
1329 sizeof(u32)); 1335 sizeof(u32));
1330 addr += sizeof(u32); 1336 addr += sizeof(u32);
1331 } 1337 }
diff --git a/drivers/scsi/sata_uli.c b/drivers/scsi/sata_uli.c
index fa1021980b2..1566886815f 100644
--- a/drivers/scsi/sata_uli.c
+++ b/drivers/scsi/sata_uli.c
@@ -219,7 +219,7 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
219 rc = -ENOMEM; 219 rc = -ENOMEM;
220 goto err_out_regions; 220 goto err_out_regions;
221 } 221 }
222 222
223 switch (board_idx) { 223 switch (board_idx) {
224 case uli_5287: 224 case uli_5287:
225 probe_ent->port[0].scr_addr = ULI5287_BASE; 225 probe_ent->port[0].scr_addr = ULI5287_BASE;
diff --git a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c
index 6653ffe956f..128b996b07b 100644
--- a/drivers/scsi/sata_via.c
+++ b/drivers/scsi/sata_via.c
@@ -351,7 +351,7 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
351 probe_ent = vt6420_init_probe_ent(pdev); 351 probe_ent = vt6420_init_probe_ent(pdev);
352 else 352 else
353 probe_ent = vt6421_init_probe_ent(pdev); 353 probe_ent = vt6421_init_probe_ent(pdev);
354 354
355 if (!probe_ent) { 355 if (!probe_ent) {
356 printk(KERN_ERR DRV_NAME "(%s): out of memory\n", 356 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
357 pci_name(pdev)); 357 pci_name(pdev));
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c
index 8bddb8228d5..3985f344da4 100644
--- a/drivers/scsi/sata_vsc.c
+++ b/drivers/scsi/sata_vsc.c
@@ -193,7 +193,8 @@ static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance,
193 struct ata_port *ap; 193 struct ata_port *ap;
194 194
195 ap = host_set->ports[i]; 195 ap = host_set->ports[i];
196 if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { 196 if (ap && !(ap->flags &
197 (ATA_FLAG_PORT_DISABLED|ATA_FLAG_NOINTR))) {
197 struct ata_queued_cmd *qc; 198 struct ata_queued_cmd *qc;
198 199
199 qc = ata_qc_from_tag(ap, ap->active_tag); 200 qc = ata_qc_from_tag(ap, ap->active_tag);
@@ -362,7 +363,7 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d
362 363
363 pci_set_master(pdev); 364 pci_set_master(pdev);
364 365
365 /* 366 /*
366 * Config offset 0x98 is "Extended Control and Status Register 0" 367 * Config offset 0x98 is "Extended Control and Status Register 0"
367 * Default value is (1 << 28). All bits except bit 28 are reserved in 368 * Default value is (1 << 28). All bits except bit 28 are reserved in
368 * DPA mode. If bit 28 is set, LED 0 reflects all ports' activity. 369 * DPA mode. If bit 28 is set, LED 0 reflects all ports' activity.
diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index 51292f269ce..e822ca0e97c 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -2971,23 +2971,22 @@ static void * dev_seq_start(struct seq_file *s, loff_t *pos)
2971{ 2971{
2972 struct sg_proc_deviter * it = kmalloc(sizeof(*it), GFP_KERNEL); 2972 struct sg_proc_deviter * it = kmalloc(sizeof(*it), GFP_KERNEL);
2973 2973
2974 s->private = it;
2974 if (! it) 2975 if (! it)
2975 return NULL; 2976 return NULL;
2977
2976 if (NULL == sg_dev_arr) 2978 if (NULL == sg_dev_arr)
2977 goto err1; 2979 return NULL;
2978 it->index = *pos; 2980 it->index = *pos;
2979 it->max = sg_last_dev(); 2981 it->max = sg_last_dev();
2980 if (it->index >= it->max) 2982 if (it->index >= it->max)
2981 goto err1; 2983 return NULL;
2982 return it; 2984 return it;
2983err1:
2984 kfree(it);
2985 return NULL;
2986} 2985}
2987 2986
2988static void * dev_seq_next(struct seq_file *s, void *v, loff_t *pos) 2987static void * dev_seq_next(struct seq_file *s, void *v, loff_t *pos)
2989{ 2988{
2990 struct sg_proc_deviter * it = (struct sg_proc_deviter *) v; 2989 struct sg_proc_deviter * it = s->private;
2991 2990
2992 *pos = ++it->index; 2991 *pos = ++it->index;
2993 return (it->index < it->max) ? it : NULL; 2992 return (it->index < it->max) ? it : NULL;
@@ -2995,7 +2994,7 @@ static void * dev_seq_next(struct seq_file *s, void *v, loff_t *pos)
2995 2994
2996static void dev_seq_stop(struct seq_file *s, void *v) 2995static void dev_seq_stop(struct seq_file *s, void *v)
2997{ 2996{
2998 kfree (v); 2997 kfree(s->private);
2999} 2998}
3000 2999
3001static int sg_proc_open_dev(struct inode *inode, struct file *file) 3000static int sg_proc_open_dev(struct inode *inode, struct file *file)