diff options
author | Krishna Gudipati <kgudipat@brocade.com> | 2011-06-13 18:50:35 -0400 |
---|---|---|
committer | James Bottomley <JBottomley@Parallels.com> | 2011-06-29 16:31:31 -0400 |
commit | 111892082ed7a3214bc7a7ec6b8b20e8f847501a (patch) | |
tree | fb4950f69aaf7c2bf07ce8987884bb52aa497ffa /drivers/scsi/bfa/bfa_hw_cb.c | |
parent | 43ffdf4dfb827babcdca5345a76031598a985dc8 (diff) |
[SCSI] bfa: Brocade-1860 Fabric Adapter Hardware Enablement
- Added support for Brocade-1860 Fabric Adapter.
- Made changes to support single firmware image per asic type.
- Combined bfi_cbreg.h and bfi_ctreg.h defines into bfi_reg.h with
only minimal defines used by host.
- Added changes to setup CPE/RME Queue register offsets based on
firmware response.
- Removed queue register offset initializations and added register offsets
to BFI config response message.
- Added Brocade-1860 asic specific interrupt status definitions and
mailbox interfaces.
Signed-off-by: Krishna Gudipati <kgudipat@brocade.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
Diffstat (limited to 'drivers/scsi/bfa/bfa_hw_cb.c')
-rw-r--r-- | drivers/scsi/bfa/bfa_hw_cb.c | 34 |
1 files changed, 8 insertions, 26 deletions
diff --git a/drivers/scsi/bfa/bfa_hw_cb.c b/drivers/scsi/bfa/bfa_hw_cb.c index 977e681ec80..4ef3cf2e7d9 100644 --- a/drivers/scsi/bfa/bfa_hw_cb.c +++ b/drivers/scsi/bfa/bfa_hw_cb.c | |||
@@ -17,14 +17,14 @@ | |||
17 | 17 | ||
18 | #include "bfad_drv.h" | 18 | #include "bfad_drv.h" |
19 | #include "bfa_modules.h" | 19 | #include "bfa_modules.h" |
20 | #include "bfi_cbreg.h" | 20 | #include "bfi_reg.h" |
21 | 21 | ||
22 | void | 22 | void |
23 | bfa_hwcb_reginit(struct bfa_s *bfa) | 23 | bfa_hwcb_reginit(struct bfa_s *bfa) |
24 | { | 24 | { |
25 | struct bfa_iocfc_regs_s *bfa_regs = &bfa->iocfc.bfa_regs; | 25 | struct bfa_iocfc_regs_s *bfa_regs = &bfa->iocfc.bfa_regs; |
26 | void __iomem *kva = bfa_ioc_bar0(&bfa->ioc); | 26 | void __iomem *kva = bfa_ioc_bar0(&bfa->ioc); |
27 | int i, q, fn = bfa_ioc_pcifn(&bfa->ioc); | 27 | int fn = bfa_ioc_pcifn(&bfa->ioc); |
28 | 28 | ||
29 | if (fn == 0) { | 29 | if (fn == 0) { |
30 | bfa_regs->intr_status = (kva + HOSTFN0_INT_STATUS); | 30 | bfa_regs->intr_status = (kva + HOSTFN0_INT_STATUS); |
@@ -33,24 +33,6 @@ bfa_hwcb_reginit(struct bfa_s *bfa) | |||
33 | bfa_regs->intr_status = (kva + HOSTFN1_INT_STATUS); | 33 | bfa_regs->intr_status = (kva + HOSTFN1_INT_STATUS); |
34 | bfa_regs->intr_mask = (kva + HOSTFN1_INT_MSK); | 34 | bfa_regs->intr_mask = (kva + HOSTFN1_INT_MSK); |
35 | } | 35 | } |
36 | |||
37 | for (i = 0; i < BFI_IOC_MAX_CQS; i++) { | ||
38 | /* | ||
39 | * CPE registers | ||
40 | */ | ||
41 | q = CPE_Q_NUM(fn, i); | ||
42 | bfa_regs->cpe_q_pi[i] = (kva + CPE_Q_PI(q)); | ||
43 | bfa_regs->cpe_q_ci[i] = (kva + CPE_Q_CI(q)); | ||
44 | bfa_regs->cpe_q_depth[i] = (kva + CPE_Q_DEPTH(q)); | ||
45 | |||
46 | /* | ||
47 | * RME registers | ||
48 | */ | ||
49 | q = CPE_Q_NUM(fn, i); | ||
50 | bfa_regs->rme_q_pi[i] = (kva + RME_Q_PI(q)); | ||
51 | bfa_regs->rme_q_ci[i] = (kva + RME_Q_CI(q)); | ||
52 | bfa_regs->rme_q_depth[i] = (kva + RME_Q_DEPTH(q)); | ||
53 | } | ||
54 | } | 36 | } |
55 | 37 | ||
56 | void | 38 | void |
@@ -115,18 +97,18 @@ bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs) | |||
115 | 97 | ||
116 | bfa->msix.nvecs = nvecs; | 98 | bfa->msix.nvecs = nvecs; |
117 | if (nvecs == 1) { | 99 | if (nvecs == 1) { |
118 | for (i = 0; i < BFA_MSIX_CB_MAX; i++) | 100 | for (i = 0; i < BFI_MSIX_CB_MAX; i++) |
119 | bfa->msix.handler[i] = bfa_msix_all; | 101 | bfa->msix.handler[i] = bfa_msix_all; |
120 | return; | 102 | return; |
121 | } | 103 | } |
122 | 104 | ||
123 | for (i = BFA_MSIX_CPE_Q0; i <= BFA_MSIX_CPE_Q7; i++) | 105 | for (i = BFI_MSIX_CPE_QMIN_CB; i <= BFI_MSIX_CPE_QMAX_CB; i++) |
124 | bfa->msix.handler[i] = bfa_msix_reqq; | 106 | bfa->msix.handler[i] = bfa_msix_reqq; |
125 | 107 | ||
126 | for (i = BFA_MSIX_RME_Q0; i <= BFA_MSIX_RME_Q7; i++) | 108 | for (i = BFI_MSIX_RME_QMIN_CB; i <= BFI_MSIX_RME_QMAX_CB; i++) |
127 | bfa->msix.handler[i] = bfa_msix_rspq; | 109 | bfa->msix.handler[i] = bfa_msix_rspq; |
128 | 110 | ||
129 | for (; i < BFA_MSIX_CB_MAX; i++) | 111 | for (; i < BFI_MSIX_CB_MAX; i++) |
130 | bfa->msix.handler[i] = bfa_msix_lpu_err; | 112 | bfa->msix.handler[i] = bfa_msix_lpu_err; |
131 | } | 113 | } |
132 | 114 | ||
@@ -156,6 +138,6 @@ bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix) | |||
156 | void | 138 | void |
157 | bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start, u32 *end) | 139 | bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start, u32 *end) |
158 | { | 140 | { |
159 | *start = BFA_MSIX_RME_Q0; | 141 | *start = BFI_MSIX_RME_QMIN_CB; |
160 | *end = BFA_MSIX_RME_Q7; | 142 | *end = BFI_MSIX_RME_QMAX_CB; |
161 | } | 143 | } |