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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /drivers/scsi/aacraid/aacraid.h
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'drivers/scsi/aacraid/aacraid.h')
-rw-r--r--drivers/scsi/aacraid/aacraid.h104
1 files changed, 21 insertions, 83 deletions
diff --git a/drivers/scsi/aacraid/aacraid.h b/drivers/scsi/aacraid/aacraid.h
index 742f5d7eb0f..ffb587817ef 100644
--- a/drivers/scsi/aacraid/aacraid.h
+++ b/drivers/scsi/aacraid/aacraid.h
@@ -12,7 +12,7 @@
12 *----------------------------------------------------------------------------*/ 12 *----------------------------------------------------------------------------*/
13 13
14#ifndef AAC_DRIVER_BUILD 14#ifndef AAC_DRIVER_BUILD
15# define AAC_DRIVER_BUILD 29801 15# define AAC_DRIVER_BUILD 28000
16# define AAC_DRIVER_BRANCH "-ms" 16# define AAC_DRIVER_BRANCH "-ms"
17#endif 17#endif
18#define MAXIMUM_NUM_CONTAINERS 32 18#define MAXIMUM_NUM_CONTAINERS 32
@@ -100,13 +100,6 @@ struct user_sgentryraw {
100 u32 flags; /* reserved for F/W use */ 100 u32 flags; /* reserved for F/W use */
101}; 101};
102 102
103struct sge_ieee1212 {
104 u32 addrLow;
105 u32 addrHigh;
106 u32 length;
107 u32 flags;
108};
109
110/* 103/*
111 * SGMAP 104 * SGMAP
112 * 105 *
@@ -277,8 +270,6 @@ enum aac_queue_types {
277 */ 270 */
278 271
279#define FIB_MAGIC 0x0001 272#define FIB_MAGIC 0x0001
280#define FIB_MAGIC2 0x0004
281#define FIB_MAGIC2_64 0x0005
282 273
283/* 274/*
284 * Define the priority levels the FSA communication routines support. 275 * Define the priority levels the FSA communication routines support.
@@ -305,20 +296,22 @@ struct aac_fibhdr {
305 __le32 XferState; /* Current transfer state for this CCB */ 296 __le32 XferState; /* Current transfer state for this CCB */
306 __le16 Command; /* Routing information for the destination */ 297 __le16 Command; /* Routing information for the destination */
307 u8 StructType; /* Type FIB */ 298 u8 StructType; /* Type FIB */
308 u8 Unused; /* Unused */ 299 u8 Flags; /* Flags for FIB */
309 __le16 Size; /* Size of this FIB in bytes */ 300 __le16 Size; /* Size of this FIB in bytes */
310 __le16 SenderSize; /* Size of the FIB in the sender 301 __le16 SenderSize; /* Size of the FIB in the sender
311 (for response sizing) */ 302 (for response sizing) */
312 __le32 SenderFibAddress; /* Host defined data in the FIB */ 303 __le32 SenderFibAddress; /* Host defined data in the FIB */
304 __le32 ReceiverFibAddress;/* Logical address of this FIB for
305 the adapter */
306 u32 SenderData; /* Place holder for the sender to store data */
313 union { 307 union {
314 __le32 ReceiverFibAddress;/* Logical address of this FIB for 308 struct {
315 the adapter (old) */ 309 __le32 _ReceiverTimeStart; /* Timestamp for
316 __le32 SenderFibAddressHigh;/* upper 32bit of phys. FIB address */ 310 receipt of fib */
317 __le32 TimeStamp; /* otherwise timestamp for FW internal use */ 311 __le32 _ReceiverTimeDone; /* Timestamp for
318 } u; 312 completion of fib */
319 u32 Handle; /* FIB handle used for MSGU commnunication */ 313 } _s;
320 u32 Previous; /* FW internal use */ 314 } _u;
321 u32 Next; /* FW internal use */
322}; 315};
323 316
324struct hw_fib { 317struct hw_fib {
@@ -368,7 +361,6 @@ struct hw_fib {
368#define ContainerCommand 500 361#define ContainerCommand 500
369#define ContainerCommand64 501 362#define ContainerCommand64 501
370#define ContainerRawIo 502 363#define ContainerRawIo 502
371#define ContainerRawIo2 503
372/* 364/*
373 * Scsi Port commands (scsi passthrough) 365 * Scsi Port commands (scsi passthrough)
374 */ 366 */
@@ -425,7 +417,6 @@ enum fib_xfer_state {
425#define ADAPTER_INIT_STRUCT_REVISION 3 417#define ADAPTER_INIT_STRUCT_REVISION 3
426#define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science 418#define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science
427#define ADAPTER_INIT_STRUCT_REVISION_6 6 /* PMC src */ 419#define ADAPTER_INIT_STRUCT_REVISION_6 6 /* PMC src */
428#define ADAPTER_INIT_STRUCT_REVISION_7 7 /* Denali */
429 420
430struct aac_init 421struct aac_init
431{ 422{
@@ -450,9 +441,7 @@ struct aac_init
450#define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001 441#define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001
451#define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010 442#define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010
452#define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020 443#define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020
453#define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED 0x00000040 444#define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED 0x00000041
454#define INITFLAGS_FAST_JBOD_SUPPORTED 0x00000080
455#define INITFLAGS_NEW_COMM_TYPE2_SUPPORTED 0x00000100
456 __le32 MaxIoCommands; /* max outstanding commands */ 445 __le32 MaxIoCommands; /* max outstanding commands */
457 __le32 MaxIoSize; /* largest I/O command */ 446 __le32 MaxIoSize; /* largest I/O command */
458 __le32 MaxFibSize; /* largest FIB to adapter */ 447 __le32 MaxFibSize; /* largest FIB to adapter */
@@ -767,16 +756,8 @@ struct src_mu_registers {
767 756
768struct src_registers { 757struct src_registers {
769 struct src_mu_registers MUnit; /* 00h - c7h */ 758 struct src_mu_registers MUnit; /* 00h - c7h */
770 union { 759 __le32 reserved1[130790]; /* c8h - 7fc5fh */
771 struct { 760 struct src_inbound IndexRegs; /* 7fc60h */
772 __le32 reserved1[130790]; /* c8h - 7fc5fh */
773 struct src_inbound IndexRegs; /* 7fc60h */
774 } tupelo;
775 struct {
776 __le32 reserved1[974]; /* c8h - fffh */
777 struct src_inbound IndexRegs; /* 1000h */
778 } denali;
779 } u;
780}; 761};
781 762
782#define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR)) 763#define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR))
@@ -1018,10 +999,6 @@ struct aac_bus_info_response {
1018#define AAC_OPT_NEW_COMM cpu_to_le32(1<<17) 999#define AAC_OPT_NEW_COMM cpu_to_le32(1<<17)
1019#define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18) 1000#define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18)
1020#define AAC_OPT_NEW_COMM_TYPE1 cpu_to_le32(1<<28) 1001#define AAC_OPT_NEW_COMM_TYPE1 cpu_to_le32(1<<28)
1021#define AAC_OPT_NEW_COMM_TYPE2 cpu_to_le32(1<<29)
1022#define AAC_OPT_NEW_COMM_TYPE3 cpu_to_le32(1<<30)
1023#define AAC_OPT_NEW_COMM_TYPE4 cpu_to_le32(1<<31)
1024
1025 1002
1026struct aac_dev 1003struct aac_dev
1027{ 1004{
@@ -1063,11 +1040,10 @@ struct aac_dev
1063 struct adapter_ops a_ops; 1040 struct adapter_ops a_ops;
1064 unsigned long fsrev; /* Main driver's revision number */ 1041 unsigned long fsrev; /* Main driver's revision number */
1065 1042
1066 resource_size_t base_start; /* main IO base */ 1043 unsigned long dbg_base; /* address of UART
1067 resource_size_t dbg_base; /* address of UART
1068 * debug buffer */ 1044 * debug buffer */
1069 1045
1070 resource_size_t base_size, dbg_size; /* Size of 1046 unsigned base_size, dbg_size; /* Size of
1071 * mapped in region */ 1047 * mapped in region */
1072 1048
1073 struct aac_init *init; /* Holds initialization info to communicate with adapter */ 1049 struct aac_init *init; /* Holds initialization info to communicate with adapter */
@@ -1100,8 +1076,6 @@ struct aac_dev
1100# define AAC_MIN_FOOTPRINT_SIZE 8192 1076# define AAC_MIN_FOOTPRINT_SIZE 8192
1101# define AAC_MIN_SRC_BAR0_SIZE 0x400000 1077# define AAC_MIN_SRC_BAR0_SIZE 0x400000
1102# define AAC_MIN_SRC_BAR1_SIZE 0x800 1078# define AAC_MIN_SRC_BAR1_SIZE 0x800
1103# define AAC_MIN_SRCV_BAR0_SIZE 0x100000
1104# define AAC_MIN_SRCV_BAR1_SIZE 0x400
1105#endif 1079#endif
1106 union 1080 union
1107 { 1081 {
@@ -1135,7 +1109,6 @@ struct aac_dev
1135# define AAC_COMM_PRODUCER 0 1109# define AAC_COMM_PRODUCER 0
1136# define AAC_COMM_MESSAGE 1 1110# define AAC_COMM_MESSAGE 1
1137# define AAC_COMM_MESSAGE_TYPE1 3 1111# define AAC_COMM_MESSAGE_TYPE1 3
1138# define AAC_COMM_MESSAGE_TYPE2 4
1139 u8 raw_io_interface; 1112 u8 raw_io_interface;
1140 u8 raw_io_64; 1113 u8 raw_io_64;
1141 u8 printf_enabled; 1114 u8 printf_enabled;
@@ -1143,10 +1116,7 @@ struct aac_dev
1143 u8 msi; 1116 u8 msi;
1144 int management_fib_count; 1117 int management_fib_count;
1145 spinlock_t manage_lock; 1118 spinlock_t manage_lock;
1146 spinlock_t sync_lock; 1119
1147 int sync_mode;
1148 struct fib *sync_fib;
1149 struct list_head sync_fib_list;
1150}; 1120};
1151 1121
1152#define aac_adapter_interrupt(dev) \ 1122#define aac_adapter_interrupt(dev) \
@@ -1193,8 +1163,6 @@ struct aac_dev
1193 1163
1194#define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001) 1164#define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
1195#define FIB_CONTEXT_FLAG (0x00000002) 1165#define FIB_CONTEXT_FLAG (0x00000002)
1196#define FIB_CONTEXT_FLAG_WAIT (0x00000004)
1197#define FIB_CONTEXT_FLAG_FASTRESP (0x00000008)
1198 1166
1199/* 1167/*
1200 * Define the command values 1168 * Define the command values
@@ -1301,22 +1269,6 @@ struct aac_dev
1301#define CMDATA_SYNCH 4 1269#define CMDATA_SYNCH 4
1302#define CMUNSTABLE 5 1270#define CMUNSTABLE 5
1303 1271
1304#define RIO_TYPE_WRITE 0x0000
1305#define RIO_TYPE_READ 0x0001
1306#define RIO_SUREWRITE 0x0008
1307
1308#define RIO2_IO_TYPE 0x0003
1309#define RIO2_IO_TYPE_WRITE 0x0000
1310#define RIO2_IO_TYPE_READ 0x0001
1311#define RIO2_IO_TYPE_VERIFY 0x0002
1312#define RIO2_IO_ERROR 0x0004
1313#define RIO2_IO_SUREWRITE 0x0008
1314#define RIO2_SGL_CONFORMANT 0x0010
1315#define RIO2_SG_FORMAT 0xF000
1316#define RIO2_SG_FORMAT_ARC 0x0000
1317#define RIO2_SG_FORMAT_SRL 0x1000
1318#define RIO2_SG_FORMAT_IEEE1212 0x2000
1319
1320struct aac_read 1272struct aac_read
1321{ 1273{
1322 __le32 command; 1274 __le32 command;
@@ -1361,6 +1313,9 @@ struct aac_write64
1361 __le32 block; 1313 __le32 block;
1362 __le16 pad; 1314 __le16 pad;
1363 __le16 flags; 1315 __le16 flags;
1316#define IO_TYPE_WRITE 0x00000000
1317#define IO_TYPE_READ 0x00000001
1318#define IO_SUREWRITE 0x00000008
1364 struct sgmap64 sg; // Must be last in struct because it is variable 1319 struct sgmap64 sg; // Must be last in struct because it is variable
1365}; 1320};
1366struct aac_write_reply 1321struct aac_write_reply
@@ -1381,22 +1336,6 @@ struct aac_raw_io
1381 struct sgmapraw sg; 1336 struct sgmapraw sg;
1382}; 1337};
1383 1338
1384struct aac_raw_io2 {
1385 __le32 blockLow;
1386 __le32 blockHigh;
1387 __le32 byteCount;
1388 __le16 cid;
1389 __le16 flags; /* RIO2 flags */
1390 __le32 sgeFirstSize; /* size of first sge el. */
1391 __le32 sgeNominalSize; /* size of 2nd sge el. (if conformant) */
1392 u8 sgeCnt; /* only 8 bits required */
1393 u8 bpTotal; /* reserved for F/W use */
1394 u8 bpComplete; /* reserved for F/W use */
1395 u8 sgeFirstIndex; /* reserved for F/W use */
1396 u8 unused[4];
1397 struct sge_ieee1212 sge[1];
1398};
1399
1400#define CT_FLUSH_CACHE 129 1339#define CT_FLUSH_CACHE 129
1401struct aac_synchronize { 1340struct aac_synchronize {
1402 __le32 command; /* VM_ContainerConfig */ 1341 __le32 command; /* VM_ContainerConfig */
@@ -2031,7 +1970,6 @@ int aac_rkt_init(struct aac_dev *dev);
2031int aac_nark_init(struct aac_dev *dev); 1970int aac_nark_init(struct aac_dev *dev);
2032int aac_sa_init(struct aac_dev *dev); 1971int aac_sa_init(struct aac_dev *dev);
2033int aac_src_init(struct aac_dev *dev); 1972int aac_src_init(struct aac_dev *dev);
2034int aac_srcv_init(struct aac_dev *dev);
2035int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify); 1973int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
2036unsigned int aac_response_normal(struct aac_queue * q); 1974unsigned int aac_response_normal(struct aac_queue * q);
2037unsigned int aac_command_normal(struct aac_queue * q); 1975unsigned int aac_command_normal(struct aac_queue * q);