diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-04-30 16:08:59 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-06-03 08:25:04 -0400 |
commit | a540f682860b3ce11fbfd36118bf64d5d4152bc1 (patch) | |
tree | e3c00632ad3b72bc7ebc6d8e272811b80a9392de /drivers/regulator/wm8350-regulator.c | |
parent | b4ec87aedbdae602dbc232915ff5a8c1fad89b36 (diff) |
regulator: wm8350: Convert to core regmap-based enable operations
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/regulator/wm8350-regulator.c')
-rw-r--r-- | drivers/regulator/wm8350-regulator.c | 121 |
1 files changed, 29 insertions, 92 deletions
diff --git a/drivers/regulator/wm8350-regulator.c b/drivers/regulator/wm8350-regulator.c index 5ccab371b40..12ecaec770a 100644 --- a/drivers/regulator/wm8350-regulator.c +++ b/drivers/regulator/wm8350-regulator.c | |||
@@ -905,63 +905,6 @@ int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode, | |||
905 | } | 905 | } |
906 | EXPORT_SYMBOL_GPL(wm8350_dcdc25_set_mode); | 906 | EXPORT_SYMBOL_GPL(wm8350_dcdc25_set_mode); |
907 | 907 | ||
908 | static int wm8350_dcdc_enable(struct regulator_dev *rdev) | ||
909 | { | ||
910 | struct wm8350 *wm8350 = rdev_get_drvdata(rdev); | ||
911 | int dcdc = rdev_get_id(rdev); | ||
912 | u16 shift; | ||
913 | |||
914 | if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6) | ||
915 | return -EINVAL; | ||
916 | |||
917 | shift = dcdc - WM8350_DCDC_1; | ||
918 | wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, 1 << shift); | ||
919 | return 0; | ||
920 | } | ||
921 | |||
922 | static int wm8350_dcdc_disable(struct regulator_dev *rdev) | ||
923 | { | ||
924 | struct wm8350 *wm8350 = rdev_get_drvdata(rdev); | ||
925 | int dcdc = rdev_get_id(rdev); | ||
926 | u16 shift; | ||
927 | |||
928 | if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6) | ||
929 | return -EINVAL; | ||
930 | |||
931 | shift = dcdc - WM8350_DCDC_1; | ||
932 | wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, 1 << shift); | ||
933 | |||
934 | return 0; | ||
935 | } | ||
936 | |||
937 | static int wm8350_ldo_enable(struct regulator_dev *rdev) | ||
938 | { | ||
939 | struct wm8350 *wm8350 = rdev_get_drvdata(rdev); | ||
940 | int ldo = rdev_get_id(rdev); | ||
941 | u16 shift; | ||
942 | |||
943 | if (ldo < WM8350_LDO_1 || ldo > WM8350_LDO_4) | ||
944 | return -EINVAL; | ||
945 | |||
946 | shift = (ldo - WM8350_LDO_1) + 8; | ||
947 | wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, 1 << shift); | ||
948 | return 0; | ||
949 | } | ||
950 | |||
951 | static int wm8350_ldo_disable(struct regulator_dev *rdev) | ||
952 | { | ||
953 | struct wm8350 *wm8350 = rdev_get_drvdata(rdev); | ||
954 | int ldo = rdev_get_id(rdev); | ||
955 | u16 shift; | ||
956 | |||
957 | if (ldo < WM8350_LDO_1 || ldo > WM8350_LDO_4) | ||
958 | return -EINVAL; | ||
959 | |||
960 | shift = (ldo - WM8350_LDO_1) + 8; | ||
961 | wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED, 1 << shift); | ||
962 | return 0; | ||
963 | } | ||
964 | |||
965 | static int force_continuous_enable(struct wm8350 *wm8350, int dcdc, int enable) | 908 | static int force_continuous_enable(struct wm8350 *wm8350, int dcdc, int enable) |
966 | { | 909 | { |
967 | int reg = 0, ret; | 910 | int reg = 0, ret; |
@@ -1143,42 +1086,16 @@ static unsigned int wm8350_dcdc_get_optimum_mode(struct regulator_dev *rdev, | |||
1143 | return mode; | 1086 | return mode; |
1144 | } | 1087 | } |
1145 | 1088 | ||
1146 | static int wm8350_dcdc_is_enabled(struct regulator_dev *rdev) | ||
1147 | { | ||
1148 | struct wm8350 *wm8350 = rdev_get_drvdata(rdev); | ||
1149 | int dcdc = rdev_get_id(rdev), shift; | ||
1150 | |||
1151 | if (dcdc < WM8350_DCDC_1 || dcdc > WM8350_DCDC_6) | ||
1152 | return -EINVAL; | ||
1153 | |||
1154 | shift = dcdc - WM8350_DCDC_1; | ||
1155 | return wm8350_reg_read(wm8350, WM8350_DCDC_LDO_REQUESTED) | ||
1156 | & (1 << shift); | ||
1157 | } | ||
1158 | |||
1159 | static int wm8350_ldo_is_enabled(struct regulator_dev *rdev) | ||
1160 | { | ||
1161 | struct wm8350 *wm8350 = rdev_get_drvdata(rdev); | ||
1162 | int ldo = rdev_get_id(rdev), shift; | ||
1163 | |||
1164 | if (ldo < WM8350_LDO_1 || ldo > WM8350_LDO_4) | ||
1165 | return -EINVAL; | ||
1166 | |||
1167 | shift = (ldo - WM8350_LDO_1) + 8; | ||
1168 | return wm8350_reg_read(wm8350, WM8350_DCDC_LDO_REQUESTED) | ||
1169 | & (1 << shift); | ||
1170 | } | ||
1171 | |||
1172 | static struct regulator_ops wm8350_dcdc_ops = { | 1089 | static struct regulator_ops wm8350_dcdc_ops = { |
1173 | .set_voltage = wm8350_dcdc_set_voltage, | 1090 | .set_voltage = wm8350_dcdc_set_voltage, |
1174 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | 1091 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
1175 | .list_voltage = wm8350_dcdc_list_voltage, | 1092 | .list_voltage = wm8350_dcdc_list_voltage, |
1176 | .enable = wm8350_dcdc_enable, | 1093 | .enable = regulator_enable_regmap, |
1177 | .disable = wm8350_dcdc_disable, | 1094 | .disable = regulator_disable_regmap, |
1095 | .is_enabled = regulator_is_enabled_regmap, | ||
1178 | .get_mode = wm8350_dcdc_get_mode, | 1096 | .get_mode = wm8350_dcdc_get_mode, |
1179 | .set_mode = wm8350_dcdc_set_mode, | 1097 | .set_mode = wm8350_dcdc_set_mode, |
1180 | .get_optimum_mode = wm8350_dcdc_get_optimum_mode, | 1098 | .get_optimum_mode = wm8350_dcdc_get_optimum_mode, |
1181 | .is_enabled = wm8350_dcdc_is_enabled, | ||
1182 | .set_suspend_voltage = wm8350_dcdc_set_suspend_voltage, | 1099 | .set_suspend_voltage = wm8350_dcdc_set_suspend_voltage, |
1183 | .set_suspend_enable = wm8350_dcdc_set_suspend_enable, | 1100 | .set_suspend_enable = wm8350_dcdc_set_suspend_enable, |
1184 | .set_suspend_disable = wm8350_dcdc_set_suspend_disable, | 1101 | .set_suspend_disable = wm8350_dcdc_set_suspend_disable, |
@@ -1186,9 +1103,9 @@ static struct regulator_ops wm8350_dcdc_ops = { | |||
1186 | }; | 1103 | }; |
1187 | 1104 | ||
1188 | static struct regulator_ops wm8350_dcdc2_5_ops = { | 1105 | static struct regulator_ops wm8350_dcdc2_5_ops = { |
1189 | .enable = wm8350_dcdc_enable, | 1106 | .enable = regulator_enable_regmap, |
1190 | .disable = wm8350_dcdc_disable, | 1107 | .disable = regulator_disable_regmap, |
1191 | .is_enabled = wm8350_dcdc_is_enabled, | 1108 | .is_enabled = regulator_is_enabled_regmap, |
1192 | .set_suspend_enable = wm8350_dcdc25_set_suspend_enable, | 1109 | .set_suspend_enable = wm8350_dcdc25_set_suspend_enable, |
1193 | .set_suspend_disable = wm8350_dcdc25_set_suspend_disable, | 1110 | .set_suspend_disable = wm8350_dcdc25_set_suspend_disable, |
1194 | }; | 1111 | }; |
@@ -1197,9 +1114,9 @@ static struct regulator_ops wm8350_ldo_ops = { | |||
1197 | .set_voltage = wm8350_ldo_set_voltage, | 1114 | .set_voltage = wm8350_ldo_set_voltage, |
1198 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | 1115 | .get_voltage_sel = regulator_get_voltage_sel_regmap, |
1199 | .list_voltage = wm8350_ldo_list_voltage, | 1116 | .list_voltage = wm8350_ldo_list_voltage, |
1200 | .enable = wm8350_ldo_enable, | 1117 | .enable = regulator_enable_regmap, |
1201 | .disable = wm8350_ldo_disable, | 1118 | .disable = regulator_disable_regmap, |
1202 | .is_enabled = wm8350_ldo_is_enabled, | 1119 | .is_enabled = regulator_is_enabled_regmap, |
1203 | .get_mode = wm8350_ldo_get_mode, | 1120 | .get_mode = wm8350_ldo_get_mode, |
1204 | .set_suspend_voltage = wm8350_ldo_set_suspend_voltage, | 1121 | .set_suspend_voltage = wm8350_ldo_set_suspend_voltage, |
1205 | .set_suspend_enable = wm8350_ldo_set_suspend_enable, | 1122 | .set_suspend_enable = wm8350_ldo_set_suspend_enable, |
@@ -1225,6 +1142,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1225 | .n_voltages = WM8350_DCDC_MAX_VSEL + 1, | 1142 | .n_voltages = WM8350_DCDC_MAX_VSEL + 1, |
1226 | .vsel_reg = WM8350_DCDC1_CONTROL, | 1143 | .vsel_reg = WM8350_DCDC1_CONTROL, |
1227 | .vsel_mask = WM8350_DC1_VSEL_MASK, | 1144 | .vsel_mask = WM8350_DC1_VSEL_MASK, |
1145 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1146 | .enable_mask = WM8350_DC1_ENA, | ||
1228 | .owner = THIS_MODULE, | 1147 | .owner = THIS_MODULE, |
1229 | }, | 1148 | }, |
1230 | { | 1149 | { |
@@ -1233,6 +1152,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1233 | .ops = &wm8350_dcdc2_5_ops, | 1152 | .ops = &wm8350_dcdc2_5_ops, |
1234 | .irq = WM8350_IRQ_UV_DC2, | 1153 | .irq = WM8350_IRQ_UV_DC2, |
1235 | .type = REGULATOR_VOLTAGE, | 1154 | .type = REGULATOR_VOLTAGE, |
1155 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1156 | .enable_mask = WM8350_DC2_ENA, | ||
1236 | .owner = THIS_MODULE, | 1157 | .owner = THIS_MODULE, |
1237 | }, | 1158 | }, |
1238 | { | 1159 | { |
@@ -1244,6 +1165,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1244 | .n_voltages = WM8350_DCDC_MAX_VSEL + 1, | 1165 | .n_voltages = WM8350_DCDC_MAX_VSEL + 1, |
1245 | .vsel_reg = WM8350_DCDC3_CONTROL, | 1166 | .vsel_reg = WM8350_DCDC3_CONTROL, |
1246 | .vsel_mask = WM8350_DC3_VSEL_MASK, | 1167 | .vsel_mask = WM8350_DC3_VSEL_MASK, |
1168 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1169 | .enable_mask = WM8350_DC3_ENA, | ||
1247 | .owner = THIS_MODULE, | 1170 | .owner = THIS_MODULE, |
1248 | }, | 1171 | }, |
1249 | { | 1172 | { |
@@ -1255,6 +1178,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1255 | .n_voltages = WM8350_DCDC_MAX_VSEL + 1, | 1178 | .n_voltages = WM8350_DCDC_MAX_VSEL + 1, |
1256 | .vsel_reg = WM8350_DCDC4_CONTROL, | 1179 | .vsel_reg = WM8350_DCDC4_CONTROL, |
1257 | .vsel_mask = WM8350_DC4_VSEL_MASK, | 1180 | .vsel_mask = WM8350_DC4_VSEL_MASK, |
1181 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1182 | .enable_mask = WM8350_DC4_ENA, | ||
1258 | .owner = THIS_MODULE, | 1183 | .owner = THIS_MODULE, |
1259 | }, | 1184 | }, |
1260 | { | 1185 | { |
@@ -1263,6 +1188,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1263 | .ops = &wm8350_dcdc2_5_ops, | 1188 | .ops = &wm8350_dcdc2_5_ops, |
1264 | .irq = WM8350_IRQ_UV_DC5, | 1189 | .irq = WM8350_IRQ_UV_DC5, |
1265 | .type = REGULATOR_VOLTAGE, | 1190 | .type = REGULATOR_VOLTAGE, |
1191 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1192 | .enable_mask = WM8350_DC5_ENA, | ||
1266 | .owner = THIS_MODULE, | 1193 | .owner = THIS_MODULE, |
1267 | }, | 1194 | }, |
1268 | { | 1195 | { |
@@ -1274,6 +1201,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1274 | .n_voltages = WM8350_DCDC_MAX_VSEL + 1, | 1201 | .n_voltages = WM8350_DCDC_MAX_VSEL + 1, |
1275 | .vsel_reg = WM8350_DCDC6_CONTROL, | 1202 | .vsel_reg = WM8350_DCDC6_CONTROL, |
1276 | .vsel_mask = WM8350_DC6_VSEL_MASK, | 1203 | .vsel_mask = WM8350_DC6_VSEL_MASK, |
1204 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1205 | .enable_mask = WM8350_DC6_ENA, | ||
1277 | .owner = THIS_MODULE, | 1206 | .owner = THIS_MODULE, |
1278 | }, | 1207 | }, |
1279 | { | 1208 | { |
@@ -1285,6 +1214,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1285 | .n_voltages = WM8350_LDO1_VSEL_MASK + 1, | 1214 | .n_voltages = WM8350_LDO1_VSEL_MASK + 1, |
1286 | .vsel_reg = WM8350_LDO1_CONTROL, | 1215 | .vsel_reg = WM8350_LDO1_CONTROL, |
1287 | .vsel_mask = WM8350_LDO1_VSEL_MASK, | 1216 | .vsel_mask = WM8350_LDO1_VSEL_MASK, |
1217 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1218 | .enable_mask = WM8350_LDO1_ENA, | ||
1288 | .owner = THIS_MODULE, | 1219 | .owner = THIS_MODULE, |
1289 | }, | 1220 | }, |
1290 | { | 1221 | { |
@@ -1296,6 +1227,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1296 | .n_voltages = WM8350_LDO2_VSEL_MASK + 1, | 1227 | .n_voltages = WM8350_LDO2_VSEL_MASK + 1, |
1297 | .vsel_reg = WM8350_LDO2_CONTROL, | 1228 | .vsel_reg = WM8350_LDO2_CONTROL, |
1298 | .vsel_mask = WM8350_LDO2_VSEL_MASK, | 1229 | .vsel_mask = WM8350_LDO2_VSEL_MASK, |
1230 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1231 | .enable_mask = WM8350_LDO2_ENA, | ||
1299 | .owner = THIS_MODULE, | 1232 | .owner = THIS_MODULE, |
1300 | }, | 1233 | }, |
1301 | { | 1234 | { |
@@ -1307,6 +1240,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1307 | .n_voltages = WM8350_LDO3_VSEL_MASK + 1, | 1240 | .n_voltages = WM8350_LDO3_VSEL_MASK + 1, |
1308 | .vsel_reg = WM8350_LDO3_CONTROL, | 1241 | .vsel_reg = WM8350_LDO3_CONTROL, |
1309 | .vsel_mask = WM8350_LDO3_VSEL_MASK, | 1242 | .vsel_mask = WM8350_LDO3_VSEL_MASK, |
1243 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1244 | .enable_mask = WM8350_LDO3_ENA, | ||
1310 | .owner = THIS_MODULE, | 1245 | .owner = THIS_MODULE, |
1311 | }, | 1246 | }, |
1312 | { | 1247 | { |
@@ -1318,6 +1253,8 @@ static const struct regulator_desc wm8350_reg[NUM_WM8350_REGULATORS] = { | |||
1318 | .n_voltages = WM8350_LDO4_VSEL_MASK + 1, | 1253 | .n_voltages = WM8350_LDO4_VSEL_MASK + 1, |
1319 | .vsel_reg = WM8350_LDO4_CONTROL, | 1254 | .vsel_reg = WM8350_LDO4_CONTROL, |
1320 | .vsel_mask = WM8350_LDO4_VSEL_MASK, | 1255 | .vsel_mask = WM8350_LDO4_VSEL_MASK, |
1256 | .enable_reg = WM8350_DCDC_LDO_REQUESTED, | ||
1257 | .enable_mask = WM8350_LDO4_ENA, | ||
1321 | .owner = THIS_MODULE, | 1258 | .owner = THIS_MODULE, |
1322 | }, | 1259 | }, |
1323 | { | 1260 | { |