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authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-23 17:02:12 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-23 17:02:12 -0400
commit475c77edf826333aa61625f49d6a2bec26ecb5a6 (patch)
tree8e1c6c319e347cd3c649fdb0b3ab45971c6b19e7 /drivers/pci/quirks.c
parent934e18b5cb4531cc6e81865bf54115cfd21d1ac6 (diff)
parent1488d5158dcd612fcdaf6b642451b026ee8bbcbb (diff)
Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci
Pull PCI changes (including maintainer change) from Jesse Barnes: "This pull has some good cleanups from Bjorn and Yinghai, as well as some more code from Yinghai to better handle resource re-allocation when enabled. There's also a new initcall_debug feature from Arjan which will print out quirk timing information to help identify slow quirks for fixing or refinement (Yinghai sent in a few patches to do just that once the new debug code landed). Beyond that, I'm handing off PCI maintainership to Bjorn Helgaas. He's been a core PCI and Linux contributor for some time now, and has kindly volunteered to take over. I just don't feel I have the time for PCI review and work that it deserves lately (I've taken on some other projects), and haven't been as responsive lately as I'd like, so I approached Bjorn asking if he'd like to manage things. He's going to give it a try, and I'm confident he'll do at least as well as I have in keeping the tree managed, patches flowing, and keeping things stable." Fix up some fairly trivial conflicts due to other cleanups (mips device resource fixup cleanups clashing with list handling cleanup, ppc iseries removal clashing with pci_probe_only cleanup etc) * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (112 commits) PCI: Bjorn gets PCI hotplug too PCI: hand PCI maintenance over to Bjorn Helgaas unicore32/PCI: move <asm-generic/pci-bridge.h> include to asm/pci.h sparc/PCI: convert devtree and arch-probed bus addresses to resource powerpc/PCI: allow reallocation on PA Semi powerpc/PCI: convert devtree bus addresses to resource powerpc/PCI: compute I/O space bus-to-resource offset consistently arm/PCI: don't export pci_flags PCI: fix bridge I/O window bus-to-resource conversion x86/PCI: add spinlock held check to 'pcibios_fwaddrmap_lookup()' PCI / PCIe: Introduce command line option to disable ARI PCI: make acpihp use __pci_remove_bus_device instead PCI: export __pci_remove_bus_device PCI: Rename pci_remove_behind_bridge to pci_stop_and_remove_behind_bridge PCI: Rename pci_remove_bus_device to pci_stop_and_remove_bus_device PCI: print out PCI device info along with duration PCI: Move "pci reassigndev resource alignment" out of quirks.c PCI: Use class for quirk for usb host controller fixup PCI: Use class for quirk for ti816x class fixup PCI: Use class for quirk for intel e100 interrupt fixup ...
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c182
1 files changed, 90 insertions, 92 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f722c5f6951..4bf71028556 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -26,73 +26,12 @@
26#include <linux/dmi.h> 26#include <linux/dmi.h>
27#include <linux/pci-aspm.h> 27#include <linux/pci-aspm.h>
28#include <linux/ioport.h> 28#include <linux/ioport.h>
29#include <linux/sched.h>
30#include <linux/ktime.h>
29#include <asm/dma.h> /* isa_dma_bridge_buggy */ 31#include <asm/dma.h> /* isa_dma_bridge_buggy */
30#include "pci.h" 32#include "pci.h"
31 33
32/* 34/*
33 * This quirk function disables memory decoding and releases memory resources
34 * of the device specified by kernel's boot parameter 'pci=resource_alignment='.
35 * It also rounds up size to specified alignment.
36 * Later on, the kernel will assign page-aligned memory resource back
37 * to the device.
38 */
39static void __devinit quirk_resource_alignment(struct pci_dev *dev)
40{
41 int i;
42 struct resource *r;
43 resource_size_t align, size;
44 u16 command;
45
46 if (!pci_is_reassigndev(dev))
47 return;
48
49 if (dev->hdr_type == PCI_HEADER_TYPE_NORMAL &&
50 (dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) {
51 dev_warn(&dev->dev,
52 "Can't reassign resources to host bridge.\n");
53 return;
54 }
55
56 dev_info(&dev->dev,
57 "Disabling memory decoding and releasing memory resources.\n");
58 pci_read_config_word(dev, PCI_COMMAND, &command);
59 command &= ~PCI_COMMAND_MEMORY;
60 pci_write_config_word(dev, PCI_COMMAND, command);
61
62 align = pci_specified_resource_alignment(dev);
63 for (i=0; i < PCI_BRIDGE_RESOURCES; i++) {
64 r = &dev->resource[i];
65 if (!(r->flags & IORESOURCE_MEM))
66 continue;
67 size = resource_size(r);
68 if (size < align) {
69 size = align;
70 dev_info(&dev->dev,
71 "Rounding up size of resource #%d to %#llx.\n",
72 i, (unsigned long long)size);
73 }
74 r->end = size - 1;
75 r->start = 0;
76 }
77 /* Need to disable bridge's resource window,
78 * to enable the kernel to reassign new resource
79 * window later on.
80 */
81 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
82 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
83 for (i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
84 r = &dev->resource[i];
85 if (!(r->flags & IORESOURCE_MEM))
86 continue;
87 r->end = resource_size(r) - 1;
88 r->start = 0;
89 }
90 pci_disable_bridge_window(dev);
91 }
92}
93DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_resource_alignment);
94
95/*
96 * Decoding should be disabled for a PCI device during BAR sizing to avoid 35 * Decoding should be disabled for a PCI device during BAR sizing to avoid
97 * conflict. But doing so may cause problems on host bridge and perhaps other 36 * conflict. But doing so may cause problems on host bridge and perhaps other
98 * key system devices. For devices that need to have mmio decoding always-on, 37 * key system devices. For devices that need to have mmio decoding always-on,
@@ -100,10 +39,10 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_resource_alignment);
100 */ 39 */
101static void __devinit quirk_mmio_always_on(struct pci_dev *dev) 40static void __devinit quirk_mmio_always_on(struct pci_dev *dev)
102{ 41{
103 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) 42 dev->mmio_always_on = 1;
104 dev->mmio_always_on = 1;
105} 43}
106DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, quirk_mmio_always_on); 44DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
45 PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
107 46
108/* The Mellanox Tavor device gives false positive parity errors 47/* The Mellanox Tavor device gives false positive parity errors
109 * Mark this device with a broken_parity_status, to allow 48 * Mark this device with a broken_parity_status, to allow
@@ -1002,12 +941,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_vt
1002 */ 941 */
1003static void quirk_cardbus_legacy(struct pci_dev *dev) 942static void quirk_cardbus_legacy(struct pci_dev *dev)
1004{ 943{
1005 if ((PCI_CLASS_BRIDGE_CARDBUS << 8) ^ dev->class)
1006 return;
1007 pci_write_config_dword(dev, PCI_CB_LEGACY_MODE_BASE, 0); 944 pci_write_config_dword(dev, PCI_CB_LEGACY_MODE_BASE, 0);
1008} 945}
1009DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, quirk_cardbus_legacy); 946DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,
1010DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_ANY_ID, PCI_ANY_ID, quirk_cardbus_legacy); 947 PCI_CLASS_BRIDGE_CARDBUS, 8, quirk_cardbus_legacy);
948DECLARE_PCI_FIXUP_CLASS_RESUME_EARLY(PCI_ANY_ID, PCI_ANY_ID,
949 PCI_CLASS_BRIDGE_CARDBUS, 8, quirk_cardbus_legacy);
1011 950
1012/* 951/*
1013 * Following the PCI ordering rules is optional on the AMD762. I'm not 952 * Following the PCI ordering rules is optional on the AMD762. I'm not
@@ -1164,17 +1103,20 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, qui
1164 1103
1165static void __devinit quirk_no_ata_d3(struct pci_dev *pdev) 1104static void __devinit quirk_no_ata_d3(struct pci_dev *pdev)
1166{ 1105{
1167 /* Quirk the legacy ATA devices only. The AHCI ones are ok */ 1106 pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
1168 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
1169 pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
1170} 1107}
1171DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_ANY_ID, quirk_no_ata_d3); 1108/* Quirk the legacy ATA devices only. The AHCI ones are ok */
1172DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, PCI_ANY_ID, quirk_no_ata_d3); 1109DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_ANY_ID,
1110 PCI_CLASS_STORAGE_IDE, 8, quirk_no_ata_d3);
1111DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_ATI, PCI_ANY_ID,
1112 PCI_CLASS_STORAGE_IDE, 8, quirk_no_ata_d3);
1173/* ALi loses some register settings that we cannot then restore */ 1113/* ALi loses some register settings that we cannot then restore */
1174DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, PCI_ANY_ID, quirk_no_ata_d3); 1114DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_AL, PCI_ANY_ID,
1115 PCI_CLASS_STORAGE_IDE, 8, quirk_no_ata_d3);
1175/* VIA comes back fine but we need to keep it alive or ACPI GTM failures 1116/* VIA comes back fine but we need to keep it alive or ACPI GTM failures
1176 occur when mode detecting */ 1117 occur when mode detecting */
1177DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_no_ata_d3); 1118DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
1119 PCI_CLASS_STORAGE_IDE, 8, quirk_no_ata_d3);
1178 1120
1179/* This was originally an Alpha specific thing, but it really fits here. 1121/* This was originally an Alpha specific thing, but it really fits here.
1180 * The i82375 PCI/EISA bridge appears as non-classified. Fix that. 1122 * The i82375 PCI/EISA bridge appears as non-classified. Fix that.
@@ -1873,8 +1815,7 @@ static void __devinit quirk_netmos(struct pci_dev *dev)
1873 case PCI_DEVICE_ID_NETMOS_9745: 1815 case PCI_DEVICE_ID_NETMOS_9745:
1874 case PCI_DEVICE_ID_NETMOS_9845: 1816 case PCI_DEVICE_ID_NETMOS_9845:
1875 case PCI_DEVICE_ID_NETMOS_9855: 1817 case PCI_DEVICE_ID_NETMOS_9855:
1876 if ((dev->class >> 8) == PCI_CLASS_COMMUNICATION_SERIAL && 1818 if (num_parallel) {
1877 num_parallel) {
1878 dev_info(&dev->dev, "Netmos %04x (%u parallel, " 1819 dev_info(&dev->dev, "Netmos %04x (%u parallel, "
1879 "%u serial); changing class SERIAL to OTHER " 1820 "%u serial); changing class SERIAL to OTHER "
1880 "(use parport_serial)\n", 1821 "(use parport_serial)\n",
@@ -1884,7 +1825,8 @@ static void __devinit quirk_netmos(struct pci_dev *dev)
1884 } 1825 }
1885 } 1826 }
1886} 1827}
1887DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID, quirk_netmos); 1828DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NETMOS, PCI_ANY_ID,
1829 PCI_CLASS_COMMUNICATION_SERIAL, 8, quirk_netmos);
1888 1830
1889static void __devinit quirk_e100_interrupt(struct pci_dev *dev) 1831static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
1890{ 1832{
@@ -1952,7 +1894,8 @@ static void __devinit quirk_e100_interrupt(struct pci_dev *dev)
1952 1894
1953 iounmap(csr); 1895 iounmap(csr);
1954} 1896}
1955DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_e100_interrupt); 1897DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
1898 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_e100_interrupt);
1956 1899
1957/* 1900/*
1958 * The 82575 and 82598 may experience data corruption issues when transitioning 1901 * The 82575 and 82598 may experience data corruption issues when transitioning
@@ -2834,12 +2777,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x3c28, vtd_mask_spec_errors);
2834static void __devinit fixup_ti816x_class(struct pci_dev* dev) 2777static void __devinit fixup_ti816x_class(struct pci_dev* dev)
2835{ 2778{
2836 /* TI 816x devices do not have class code set when in PCIe boot mode */ 2779 /* TI 816x devices do not have class code set when in PCIe boot mode */
2837 if (dev->class == PCI_CLASS_NOT_DEFINED) { 2780 dev_info(&dev->dev, "Setting PCI class for 816x PCIe device\n");
2838 dev_info(&dev->dev, "Setting PCI class for 816x PCIe device\n"); 2781 dev->class = PCI_CLASS_MULTIMEDIA_VIDEO;
2839 dev->class = PCI_CLASS_MULTIMEDIA_VIDEO;
2840 }
2841} 2782}
2842DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_TI, 0xb800, fixup_ti816x_class); 2783DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_TI, 0xb800,
2784 PCI_CLASS_NOT_DEFINED, 0, fixup_ti816x_class);
2843 2785
2844/* Some PCIe devices do not work reliably with the claimed maximum 2786/* Some PCIe devices do not work reliably with the claimed maximum
2845 * payload size supported. 2787 * payload size supported.
@@ -2924,17 +2866,73 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f8, quirk_intel_mc_errata);
2924DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); 2866DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
2925DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); 2867DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
2926 2868
2869
2870static void do_one_fixup_debug(void (*fn)(struct pci_dev *dev), struct pci_dev *dev)
2871{
2872 ktime_t calltime, delta, rettime;
2873 unsigned long long duration;
2874
2875 printk(KERN_DEBUG "calling %pF @ %i for %s\n",
2876 fn, task_pid_nr(current), dev_name(&dev->dev));
2877 calltime = ktime_get();
2878 fn(dev);
2879 rettime = ktime_get();
2880 delta = ktime_sub(rettime, calltime);
2881 duration = (unsigned long long) ktime_to_ns(delta) >> 10;
2882 printk(KERN_DEBUG "pci fixup %pF returned after %lld usecs for %s\n",
2883 fn, duration, dev_name(&dev->dev));
2884}
2885
2886/*
2887 * Some BIOS implementations leave the Intel GPU interrupts enabled,
2888 * even though no one is handling them (f.e. i915 driver is never loaded).
2889 * Additionally the interrupt destination is not set up properly
2890 * and the interrupt ends up -somewhere-.
2891 *
2892 * These spurious interrupts are "sticky" and the kernel disables
2893 * the (shared) interrupt line after 100.000+ generated interrupts.
2894 *
2895 * Fix it by disabling the still enabled interrupts.
2896 * This resolves crashes often seen on monitor unplug.
2897 */
2898#define I915_DEIER_REG 0x4400c
2899static void __devinit disable_igfx_irq(struct pci_dev *dev)
2900{
2901 void __iomem *regs = pci_iomap(dev, 0, 0);
2902 if (regs == NULL) {
2903 dev_warn(&dev->dev, "igfx quirk: Can't iomap PCI device\n");
2904 return;
2905 }
2906
2907 /* Check if any interrupt line is still enabled */
2908 if (readl(regs + I915_DEIER_REG) != 0) {
2909 dev_warn(&dev->dev, "BIOS left Intel GPU interrupts enabled; "
2910 "disabling\n");
2911
2912 writel(0, regs + I915_DEIER_REG);
2913 }
2914
2915 pci_iounmap(dev, regs);
2916}
2917DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq);
2918DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
2919
2927static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, 2920static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
2928 struct pci_fixup *end) 2921 struct pci_fixup *end)
2929{ 2922{
2930 while (f < end) { 2923 for (; f < end; f++)
2931 if ((f->vendor == dev->vendor || f->vendor == (u16) PCI_ANY_ID) && 2924 if ((f->class == (u32) (dev->class >> f->class_shift) ||
2932 (f->device == dev->device || f->device == (u16) PCI_ANY_ID)) { 2925 f->class == (u32) PCI_ANY_ID) &&
2926 (f->vendor == dev->vendor ||
2927 f->vendor == (u16) PCI_ANY_ID) &&
2928 (f->device == dev->device ||
2929 f->device == (u16) PCI_ANY_ID)) {
2933 dev_dbg(&dev->dev, "calling %pF\n", f->hook); 2930 dev_dbg(&dev->dev, "calling %pF\n", f->hook);
2934 f->hook(dev); 2931 if (initcall_debug)
2932 do_one_fixup_debug(f->hook, dev);
2933 else
2934 f->hook(dev);
2935 } 2935 }
2936 f++;
2937 }
2938} 2936}
2939 2937
2940extern struct pci_fixup __start_pci_fixups_early[]; 2938extern struct pci_fixup __start_pci_fixups_early[];