Patched in Tegra support.

1 files changed, 102 insertions, 109 deletions

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index b52630b8ead..cbfbab18be9 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -68,7 +68,7 @@ struct pcie_link_state {
         struct aspm_latency acceptable[8];
 };
 
-static int aspm_disabled, aspm_force;
+static int aspm_disabled, aspm_force, aspm_clear_state;
 static bool aspm_support_enabled = true;
 static DEFINE_MUTEX(aspm_lock);
 static LIST_HEAD(link_list);
@@ -76,15 +76,7 @@ static LIST_HEAD(link_list);
 #define POLICY_DEFAULT 0        /* BIOS default setting */
 #define POLICY_PERFORMANCE 1    /* high performance */
 #define POLICY_POWERSAVE 2      /* high power saving */
-
-#ifdef CONFIG_PCIEASPM_PERFORMANCE
-static int aspm_policy = POLICY_PERFORMANCE;
-#elif defined CONFIG_PCIEASPM_POWERSAVE
-static int aspm_policy = POLICY_POWERSAVE;
-#else
 static int aspm_policy;
-#endif
-
 static const char *policy_str[] = {
         [POLICY_DEFAULT] = "default",
         [POLICY_PERFORMANCE] = "performance",
@@ -125,16 +117,21 @@ static int policy_to_clkpm_state(struct pcie_link_state *link)
 
 static void pcie_set_clkpm_nocheck(struct pcie_link_state *link, int enable)
 {
+        int pos;
+        u16 reg16;
         struct pci_dev *child;
         struct pci_bus *linkbus = link->pdev->subordinate;
 
         list_for_each_entry(child, &linkbus->devices, bus_list) {
+                pos = pci_pcie_cap(child);
+                if (!pos)
+                        return;
+                pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
                 if (enable)
-                        pcie_capability_set_word(child, PCI_EXP_LNKCTL,
-                                                 PCI_EXP_LNKCTL_CLKREQ_EN);
+                        reg16 |= PCI_EXP_LNKCTL_CLKREQ_EN;
                 else
-                        pcie_capability_clear_word(child, PCI_EXP_LNKCTL,
-                                                   PCI_EXP_LNKCTL_CLKREQ_EN);
+                        reg16 &= ~PCI_EXP_LNKCTL_CLKREQ_EN;
+                pci_write_config_word(child, pos + PCI_EXP_LNKCTL, reg16);
         }
         link->clkpm_enabled = !!enable;
 }
@@ -152,7 +149,7 @@ static void pcie_set_clkpm(struct pcie_link_state *link, int enable)
 
 static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
 {
-        int capable = 1, enabled = 1;
+        int pos, capable = 1, enabled = 1;
         u32 reg32;
         u16 reg16;
         struct pci_dev *child;
@@ -160,13 +157,16 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
 
         /* All functions should have the same cap and state, take the worst */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                pcie_capability_read_dword(child, PCI_EXP_LNKCAP, &reg32);
+                pos = pci_pcie_cap(child);
+                if (!pos)
+                        return;
+                pci_read_config_dword(child, pos + PCI_EXP_LNKCAP, &reg32);
                 if (!(reg32 & PCI_EXP_LNKCAP_CLKPM)) {
                         capable = 0;
                         enabled = 0;
                         break;
                 }
-                pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);
+                pci_read_config_word(child, pos + PCI_EXP_LNKCTL, &reg16);
                 if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN))
                         enabled = 0;
         }
@@ -182,7 +182,7 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
  */
 static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
 {
-        int same_clock = 1;
+        int ppos, cpos, same_clock = 1;
         u16 reg16, parent_reg, child_reg[8];
         unsigned long start_jiffies;
         struct pci_dev *child, *parent = link->pdev;
@@ -195,43 +195,46 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
         BUG_ON(!pci_is_pcie(child));
 
         /* Check downstream component if bit Slot Clock Configuration is 1 */
-        pcie_capability_read_word(child, PCI_EXP_LNKSTA, &reg16);
+        cpos = pci_pcie_cap(child);
+        pci_read_config_word(child, cpos + PCI_EXP_LNKSTA, &reg16);
         if (!(reg16 & PCI_EXP_LNKSTA_SLC))
                 same_clock = 0;
 
         /* Check upstream component if bit Slot Clock Configuration is 1 */
-        pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
+        ppos = pci_pcie_cap(parent);
+        pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);
         if (!(reg16 & PCI_EXP_LNKSTA_SLC))
                 same_clock = 0;
 
         /* Configure downstream component, all functions */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                pcie_capability_read_word(child, PCI_EXP_LNKCTL, &reg16);
+                cpos = pci_pcie_cap(child);
+                pci_read_config_word(child, cpos + PCI_EXP_LNKCTL, &reg16);
                 child_reg[PCI_FUNC(child->devfn)] = reg16;
                 if (same_clock)
                         reg16 |= PCI_EXP_LNKCTL_CCC;
                 else
                         reg16 &= ~PCI_EXP_LNKCTL_CCC;
-                pcie_capability_write_word(child, PCI_EXP_LNKCTL, reg16);
+                pci_write_config_word(child, cpos + PCI_EXP_LNKCTL, reg16);
         }
 
         /* Configure upstream component */
-        pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &reg16);
+        pci_read_config_word(parent, ppos + PCI_EXP_LNKCTL, &reg16);
         parent_reg = reg16;
         if (same_clock)
                 reg16 |= PCI_EXP_LNKCTL_CCC;
         else
                 reg16 &= ~PCI_EXP_LNKCTL_CCC;
-        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
+        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16);
 
         /* Retrain link */
         reg16 |= PCI_EXP_LNKCTL_RL;
-        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, reg16);
+        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16);
 
         /* Wait for link training end. Break out after waiting for timeout */
         start_jiffies = jiffies;
         for (;;) {
-                pcie_capability_read_word(parent, PCI_EXP_LNKSTA, &reg16);
+                pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, &reg16);
                 if (!(reg16 & PCI_EXP_LNKSTA_LT))
                         break;
                 if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT))
@@ -242,11 +245,14 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
                 return;
 
         /* Training failed. Restore common clock configurations */
-        dev_err(&parent->dev, "ASPM: Could not configure common clock\n");
-        list_for_each_entry(child, &linkbus->devices, bus_list)
-                pcie_capability_write_word(child, PCI_EXP_LNKCTL,
-                                           child_reg[PCI_FUNC(child->devfn)]);
-        pcie_capability_write_word(parent, PCI_EXP_LNKCTL, parent_reg);
+        dev_printk(KERN_ERR, &parent->dev,
+                   "ASPM: Could not configure common clock\n");
+        list_for_each_entry(child, &linkbus->devices, bus_list) {
+                cpos = pci_pcie_cap(child);
+                pci_write_config_word(child, cpos + PCI_EXP_LNKCTL,
+                                      child_reg[PCI_FUNC(child->devfn)]);
+        }
+        pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, parent_reg);
 }
 
 /* Convert L0s latency encoding to ns */
@@ -291,14 +297,16 @@ struct aspm_register_info {
 static void pcie_get_aspm_reg(struct pci_dev *pdev,
                               struct aspm_register_info *info)
 {
+        int pos;
         u16 reg16;
         u32 reg32;
 
-        pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &reg32);
+        pos = pci_pcie_cap(pdev);
+        pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, &reg32);
         info->support = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10;
         info->latency_encoding_l0s = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12;
         info->latency_encoding_l1  = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15;
-        pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &reg16);
+        pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
         info->enabled = reg16 & PCI_EXP_LNKCTL_ASPMC;
 }
 
@@ -396,7 +404,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
          * do ASPM for now.
          */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
-                if (pci_pcie_type(child) == PCI_EXP_TYPE_PCI_BRIDGE) {
+                if (child->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
                         link->aspm_disable = ASPM_STATE_ALL;
                         break;
                 }
@@ -404,15 +412,17 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
 
         /* Get and check endpoint acceptable latencies */
         list_for_each_entry(child, &linkbus->devices, bus_list) {
+                int pos;
                 u32 reg32, encoding;
                 struct aspm_latency *acceptable =
                         &link->acceptable[PCI_FUNC(child->devfn)];
 
-                if (pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT &&
-                    pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END)
+                if (child->pcie_type != PCI_EXP_TYPE_ENDPOINT &&
+                    child->pcie_type != PCI_EXP_TYPE_LEG_END)
                         continue;
 
-                pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
+                pos = pci_pcie_cap(child);
+                pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);
                 /* Calculate endpoint L0s acceptable latency */
                 encoding = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6;
                 acceptable->l0s = calc_l0s_acceptable(encoding);
@@ -426,8 +436,13 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
 
 static void pcie_config_aspm_dev(struct pci_dev *pdev, u32 val)
 {
-        pcie_capability_clear_and_set_word(pdev, PCI_EXP_LNKCTL,
-                                           PCI_EXP_LNKCTL_ASPMC, val);
+        u16 reg16;
+        int pos = pci_pcie_cap(pdev);
+
+        pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
+        reg16 &= ~0x3;
+        reg16 |= val;
+        pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
 }
 
 static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)
@@ -442,12 +457,12 @@ static void pcie_config_aspm_link(struct pcie_link_state *link, u32 state)
                 return;
         /* Convert ASPM state to upstream/downstream ASPM register state */
         if (state & ASPM_STATE_L0S_UP)
-                dwstream |= PCI_EXP_LNKCTL_ASPM_L0S;
+                dwstream |= PCIE_LINK_STATE_L0S;
         if (state & ASPM_STATE_L0S_DW)
-                upstream |= PCI_EXP_LNKCTL_ASPM_L0S;
+                upstream |= PCIE_LINK_STATE_L0S;
         if (state & ASPM_STATE_L1) {
-                upstream |= PCI_EXP_LNKCTL_ASPM_L1;
-                dwstream |= PCI_EXP_LNKCTL_ASPM_L1;
+                upstream |= PCIE_LINK_STATE_L1;
+                dwstream |= PCIE_LINK_STATE_L1;
         }
         /*
          * Spec 2.0 suggests all functions should be configured the
@@ -482,32 +497,29 @@ static void free_link_state(struct pcie_link_state *link)
 static int pcie_aspm_sanity_check(struct pci_dev *pdev)
 {
         struct pci_dev *child;
+        int pos;
         u32 reg32;
 
+        if (aspm_clear_state)
+                return -EINVAL;
+
         /*
          * Some functions in a slot might not all be PCIe functions,
          * very strange. Disable ASPM for the whole slot
          */
         list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
-                if (!pci_is_pcie(child))
+                pos = pci_pcie_cap(child);
+                if (!pos)
                         return -EINVAL;
-
-                /*
-                 * If ASPM is disabled then we're not going to change
-                 * the BIOS state. It's safe to continue even if it's a
-                 * pre-1.1 device
-                 */
-
-                if (aspm_disabled)
-                        continue;
-
                 /*
                  * Disable ASPM for pre-1.1 PCIe device, we follow MS to use
                  * RBER bit to determine if a function is 1.1 version device
                  */
-                pcie_capability_read_dword(child, PCI_EXP_DEVCAP, &reg32);
+                pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, &reg32);
                 if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) {
-                        dev_info(&child->dev, "disabling ASPM on pre-1.1 PCIe device.  You can enable it with 'pcie_aspm=force'\n");
+                        dev_printk(KERN_INFO, &child->dev, "disabling ASPM"
+                                " on pre-1.1 PCIe device.  You can enable it"
+                                " with 'pcie_aspm=force'\n");
                         return -EINVAL;
                 }
         }
@@ -525,7 +537,7 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev)
         INIT_LIST_HEAD(&link->children);
         INIT_LIST_HEAD(&link->link);
         link->pdev = pdev;
-        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM) {
+        if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
                 struct pcie_link_state *parent;
                 parent = pdev->bus->parent->self->link_state;
                 if (!parent) {
@@ -558,12 +570,15 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
 
         if (!pci_is_pcie(pdev) || pdev->link_state)
                 return;
-        if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
-            pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM)
+        if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
+            pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
+                return;
+
+        if (aspm_disabled && !aspm_clear_state)
                 return;
 
         /* VIA has a strange chipset, root port is under a bridge */
-        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT &&
+        if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT &&
             pdev->bus->self)
                 return;
 
@@ -593,7 +608,7 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
          * the BIOS's expectation, we'll do so once pci_enable_device() is
          * called.
          */
-        if (aspm_policy != POLICY_POWERSAVE) {
+        if (aspm_policy != POLICY_POWERSAVE || aspm_clear_state) {
                 pcie_config_aspm_path(link);
                 pcie_set_clkpm(link, policy_to_clkpm_state(link));
         }
@@ -620,8 +635,8 @@ static void pcie_update_aspm_capable(struct pcie_link_state *root)
                 if (link->root != root)
                         continue;
                 list_for_each_entry(child, &linkbus->devices, bus_list) {
-                        if ((pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT) &&
-                            (pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END))
+                        if ((child->pcie_type != PCI_EXP_TYPE_ENDPOINT) &&
+                            (child->pcie_type != PCI_EXP_TYPE_LEG_END))
                                 continue;
                         pcie_aspm_check_latency(child);
                 }
@@ -634,10 +649,11 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
         struct pci_dev *parent = pdev->bus->self;
         struct pcie_link_state *link, *root, *parent_link;
 
-        if (!pci_is_pcie(pdev) || !parent || !parent->link_state)
+        if ((aspm_disabled && !aspm_clear_state) || !pci_is_pcie(pdev) ||
+            !parent || !parent->link_state)
                 return;
-        if ((pci_pcie_type(parent) != PCI_EXP_TYPE_ROOT_PORT) &&
-            (pci_pcie_type(parent) != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
+            (parent->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
 
         down_read(&pci_bus_sem);
@@ -677,8 +693,8 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev)
 
         if (aspm_disabled || !pci_is_pcie(pdev) || !link)
                 return;
-        if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
-            (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
         /*
          * Devices changed PM state, we should recheck if latency
@@ -702,8 +718,8 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
         if (aspm_policy != POLICY_POWERSAVE)
                 return;
 
-        if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
-            (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
+        if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
+            (pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
                 return;
 
         down_read(&pci_bus_sem);
@@ -718,20 +734,15 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
  * pci_disable_link_state - disable pci device's link state, so the link will
  * never enter specific states
  */
-static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem,
-                                     bool force)
+static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem)
 {
         struct pci_dev *parent = pdev->bus->self;
         struct pcie_link_state *link;
 
-        if (aspm_disabled && !force)
-                return;
-
-        if (!pci_is_pcie(pdev))
+        if (aspm_disabled || !pci_is_pcie(pdev))
                 return;
-
-        if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
-            pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM)
+        if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
+            pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
                 parent = pdev;
         if (!parent || !parent->link_state)
                 return;
@@ -757,31 +768,16 @@ static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem,
 
 void pci_disable_link_state_locked(struct pci_dev *pdev, int state)
 {
-        __pci_disable_link_state(pdev, state, false, false);
+        __pci_disable_link_state(pdev, state, false);
 }
 EXPORT_SYMBOL(pci_disable_link_state_locked);
 
 void pci_disable_link_state(struct pci_dev *pdev, int state)
 {
-        __pci_disable_link_state(pdev, state, true, false);
+        __pci_disable_link_state(pdev, state, true);
 }
 EXPORT_SYMBOL(pci_disable_link_state);
 
-void pcie_clear_aspm(struct pci_bus *bus)
-{
-        struct pci_dev *child;
-
-        /*
-         * Clear any ASPM setup that the firmware has carried out on this bus
-         */
-        list_for_each_entry(child, &bus->devices, bus_list) {
-                __pci_disable_link_state(child, PCIE_LINK_STATE_L0S |
-                                         PCIE_LINK_STATE_L1 |
-                                         PCIE_LINK_STATE_CLKPM,
-                                         false, true);
-        }
-}
-
 static int pcie_aspm_set_policy(const char *val, struct kernel_param *kp)
 {
         int i;
@@ -906,8 +902,8 @@ void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev)
         struct pcie_link_state *link_state = pdev->link_state;
 
         if (!pci_is_pcie(pdev) ||
-            (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
-             pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
+            (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
+             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
                 return;
 
         if (link_state->aspm_support)
@@ -923,8 +919,8 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
         struct pcie_link_state *link_state = pdev->link_state;
 
         if (!pci_is_pcie(pdev) ||
-            (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
-             pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
+            (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
+             pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
                 return;
 
         if (link_state->aspm_support)
@@ -939,7 +935,6 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
 static int __init pcie_aspm_disable(char *str)
 {
         if (!strcmp(str, "off")) {
-                aspm_policy = POLICY_DEFAULT;
                 aspm_disabled = 1;
                 aspm_support_enabled = false;
                 printk(KERN_INFO "PCIe ASPM is disabled\n");
@@ -952,18 +947,16 @@ static int __init pcie_aspm_disable(char *str)
 
 __setup("pcie_aspm=", pcie_aspm_disable);
 
+void pcie_clear_aspm(void)
+{
+        if (!aspm_force)
+                aspm_clear_state = 1;
+}
+
 void pcie_no_aspm(void)
 {
-        /*
-         * Disabling ASPM is intended to prevent the kernel from modifying
-         * existing hardware state, not to clear existing state. To that end:
-         * (a) set policy to POLICY_DEFAULT in order to avoid changing state
-         * (b) prevent userspace from changing policy
-         */
-        if (!aspm_force) {
-                aspm_policy = POLICY_DEFAULT;
+        if (!aspm_force)
                 aspm_disabled = 1;
-        }
 }
 
 /**