ath9k_hw: Disable INTR_HOST1_FATAL to avoid interrupt strom with ar9430

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

2 files changed, 11 insertions, 5 deletions

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 28076086f63..66566ef3b8a 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -795,12 +795,16 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
 static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
                                           enum nl80211_iftype opmode)
 {
+        u32 sync_default = AR_INTR_SYNC_DEFAULT;
         u32 imr_reg = AR_IMR_TXERR |
                 AR_IMR_TXURN |
                 AR_IMR_RXERR |
                 AR_IMR_RXORN |
                 AR_IMR_BCNMISC;
 
+        if (AR_SREV_9340(ah))
+                sync_default &= ~AR_INTR_SYNC_HOST1_FATAL;
+
         if (AR_SREV_9300_20_OR_LATER(ah)) {
                 imr_reg |= AR_IMR_RXOK_HP;
                 if (ah->config.rx_intr_mitigation)
@@ -831,7 +835,7 @@ static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
 
         if (!AR_SREV_9100(ah)) {
                 REG_WRITE(ah, AR_INTR_SYNC_CAUSE, 0xFFFFFFFF);
-                REG_WRITE(ah, AR_INTR_SYNC_ENABLE, AR_INTR_SYNC_DEFAULT);
+                REG_WRITE(ah, AR_INTR_SYNC_ENABLE, sync_default);
                 REG_WRITE(ah, AR_INTR_SYNC_MASK, 0);
         }
 
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index 6f431cbff38..d86b8393b8d 100644
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -793,10 +793,14 @@ EXPORT_SYMBOL(ath9k_hw_disable_interrupts);
 void ath9k_hw_enable_interrupts(struct ath_hw *ah)
 {
         struct ath_common *common = ath9k_hw_common(ah);
+        u32 sync_default = AR_INTR_SYNC_DEFAULT;
 
         if (!(ah->imask & ATH9K_INT_GLOBAL))
                 return;
 
+        if (AR_SREV_9340(ah))
+                sync_default &= ~AR_INTR_SYNC_HOST1_FATAL;
+
         ath_dbg(common, ATH_DBG_INTERRUPT, "enable IER\n");
         REG_WRITE(ah, AR_IER, AR_IER_ENABLE);
         if (!AR_SREV_9100(ah)) {
@@ -805,10 +809,8 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah)
                 REG_WRITE(ah, AR_INTR_ASYNC_MASK, AR_INTR_MAC_IRQ);
 
 
-                REG_WRITE(ah, AR_INTR_SYNC_ENABLE,
-                          AR_INTR_SYNC_DEFAULT);
-                REG_WRITE(ah, AR_INTR_SYNC_MASK,
-                          AR_INTR_SYNC_DEFAULT);
+                REG_WRITE(ah, AR_INTR_SYNC_ENABLE, sync_default);
+                REG_WRITE(ah, AR_INTR_SYNC_MASK, sync_default);
         }
         ath_dbg(common, ATH_DBG_INTERRUPT, "AR_IMR 0x%x IER 0x%x\n",
                 REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER));