diff options
author | Felix Fietkau <nbd@openwrt.org> | 2011-09-15 08:25:35 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-09-19 15:58:24 -0400 |
commit | 1b8714f7dcd8b41cd2843c42a6cc16ba2d4c899f (patch) | |
tree | 688f620b947800947b1cb4eed2add3572b209813 /drivers/net | |
parent | f11cc949fd9fed7040eba39eab11e7bee274b527 (diff) |
ath9k_hw: clean up hardware revision checks
- AR_SREV_5416_20_OR_LATER is always true, remove it
- AR_SREV_9280_20_OR_LATER is always true within eeprom_4k.c and eeprom_9287.c
- (AR_SREV_9271 || AR_SREV_9285) is always true in eeprom_4k.c
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar5008_phy.c | 3 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom.c | 7 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom_4k.c | 85 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom_9287.c | 6 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/eeprom_def.c | 46 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/mac.c | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/mac.h | 4 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/reg.h | 4 |
8 files changed, 63 insertions, 94 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c index fac2c6da6ca..b130c26d3dd 100644 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c | |||
@@ -704,8 +704,7 @@ static void ar5008_hw_override_ini(struct ath_hw *ah, | |||
704 | REG_WRITE(ah, AR_PCU_MISC_MODE2, val); | 704 | REG_WRITE(ah, AR_PCU_MISC_MODE2, val); |
705 | } | 705 | } |
706 | 706 | ||
707 | if (!AR_SREV_5416_20_OR_LATER(ah) || | 707 | if (AR_SREV_9280_20_OR_LATER(ah)) |
708 | AR_SREV_9280_20_OR_LATER(ah)) | ||
709 | return; | 708 | return; |
710 | /* | 709 | /* |
711 | * Disable BB clock gating | 710 | * Disable BB clock gating |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c index e61404dda8c..e46f751ab50 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.c +++ b/drivers/net/wireless/ath/ath9k/eeprom.c | |||
@@ -456,12 +456,7 @@ void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah, | |||
456 | pPdGainBoundaries[i] = | 456 | pPdGainBoundaries[i] = |
457 | min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]); | 457 | min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]); |
458 | 458 | ||
459 | if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) { | 459 | minDelta = 0; |
460 | minDelta = pPdGainBoundaries[0] - 23; | ||
461 | pPdGainBoundaries[0] = 23; | ||
462 | } else { | ||
463 | minDelta = 0; | ||
464 | } | ||
465 | 460 | ||
466 | if (i == 0) { | 461 | if (i == 0) { |
467 | if (AR_SREV_9280_20_OR_LATER(ah)) | 462 | if (AR_SREV_9280_20_OR_LATER(ah)) |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c index ea658e794cb..99f7a08c57e 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c | |||
@@ -405,12 +405,7 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, | |||
405 | REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0); | 405 | REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0); |
406 | 406 | ||
407 | for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) { | 407 | for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) { |
408 | if (AR_SREV_5416_20_OR_LATER(ah) && | 408 | regChainOffset = i * 0x1000; |
409 | (ah->rxchainmask == 5 || ah->txchainmask == 5) && | ||
410 | (i != 0)) { | ||
411 | regChainOffset = (i == 1) ? 0x2000 : 0x1000; | ||
412 | } else | ||
413 | regChainOffset = i * 0x1000; | ||
414 | 409 | ||
415 | if (pEepData->baseEepHeader.txMask & (1 << i)) { | 410 | if (pEepData->baseEepHeader.txMask & (1 << i)) { |
416 | pRawDataset = pEepData->calPierData2G[i]; | 411 | pRawDataset = pEepData->calPierData2G[i]; |
@@ -423,19 +418,17 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah, | |||
423 | 418 | ||
424 | ENABLE_REGWRITE_BUFFER(ah); | 419 | ENABLE_REGWRITE_BUFFER(ah); |
425 | 420 | ||
426 | if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) { | 421 | REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset, |
427 | REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset, | 422 | SM(pdGainOverlap_t2, |
428 | SM(pdGainOverlap_t2, | 423 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
429 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 424 | | SM(gainBoundaries[0], |
430 | | SM(gainBoundaries[0], | 425 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
431 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 426 | | SM(gainBoundaries[1], |
432 | | SM(gainBoundaries[1], | 427 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
433 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 428 | | SM(gainBoundaries[2], |
434 | | SM(gainBoundaries[2], | 429 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
435 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 430 | | SM(gainBoundaries[3], |
436 | | SM(gainBoundaries[3], | 431 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); |
437 | AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); | ||
438 | } | ||
439 | 432 | ||
440 | regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset; | 433 | regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset; |
441 | for (j = 0; j < 32; j++) { | 434 | for (j = 0; j < 32; j++) { |
@@ -715,10 +708,8 @@ static void ath9k_hw_4k_set_txpower(struct ath_hw *ah, | |||
715 | if (test) | 708 | if (test) |
716 | return; | 709 | return; |
717 | 710 | ||
718 | if (AR_SREV_9280_20_OR_LATER(ah)) { | 711 | for (i = 0; i < Ar5416RateSize; i++) |
719 | for (i = 0; i < Ar5416RateSize; i++) | 712 | ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2; |
720 | ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2; | ||
721 | } | ||
722 | 713 | ||
723 | ENABLE_REGWRITE_BUFFER(ah); | 714 | ENABLE_REGWRITE_BUFFER(ah); |
724 | 715 | ||
@@ -877,6 +868,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah, | |||
877 | u8 txRxAttenLocal; | 868 | u8 txRxAttenLocal; |
878 | u8 ob[5], db1[5], db2[5]; | 869 | u8 ob[5], db1[5], db2[5]; |
879 | u8 ant_div_control1, ant_div_control2; | 870 | u8 ant_div_control1, ant_div_control2; |
871 | u8 bb_desired_scale; | ||
880 | u32 regVal; | 872 | u32 regVal; |
881 | 873 | ||
882 | pModal = &eep->modalHeader; | 874 | pModal = &eep->modalHeader; |
@@ -1096,30 +1088,29 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah, | |||
1096 | AR_PHY_SETTLING_SWITCH, | 1088 | AR_PHY_SETTLING_SWITCH, |
1097 | pModal->swSettleHt40); | 1089 | pModal->swSettleHt40); |
1098 | } | 1090 | } |
1099 | if (AR_SREV_9271(ah) || AR_SREV_9285(ah)) { | 1091 | |
1100 | u8 bb_desired_scale = (pModal->bb_scale_smrt_antenna & | 1092 | bb_desired_scale = (pModal->bb_scale_smrt_antenna & |
1101 | EEP_4K_BB_DESIRED_SCALE_MASK); | 1093 | EEP_4K_BB_DESIRED_SCALE_MASK); |
1102 | if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) { | 1094 | if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) { |
1103 | u32 pwrctrl, mask, clr; | 1095 | u32 pwrctrl, mask, clr; |
1104 | 1096 | ||
1105 | mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25); | 1097 | mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25); |
1106 | pwrctrl = mask * bb_desired_scale; | 1098 | pwrctrl = mask * bb_desired_scale; |
1107 | clr = mask * 0x1f; | 1099 | clr = mask * 0x1f; |
1108 | REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr); | 1100 | REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr); |
1109 | REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr); | 1101 | REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr); |
1110 | REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr); | 1102 | REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr); |
1111 | 1103 | ||
1112 | mask = BIT(0)|BIT(5)|BIT(15); | 1104 | mask = BIT(0)|BIT(5)|BIT(15); |
1113 | pwrctrl = mask * bb_desired_scale; | 1105 | pwrctrl = mask * bb_desired_scale; |
1114 | clr = mask * 0x1f; | 1106 | clr = mask * 0x1f; |
1115 | REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr); | 1107 | REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr); |
1116 | 1108 | ||
1117 | mask = BIT(0)|BIT(5); | 1109 | mask = BIT(0)|BIT(5); |
1118 | pwrctrl = mask * bb_desired_scale; | 1110 | pwrctrl = mask * bb_desired_scale; |
1119 | clr = mask * 0x1f; | 1111 | clr = mask * 0x1f; |
1120 | REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr); | 1112 | REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr); |
1121 | REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr); | 1113 | REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr); |
1122 | } | ||
1123 | } | 1114 | } |
1124 | } | 1115 | } |
1125 | 1116 | ||
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c index 21f180db238..ebf97bae6c2 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c | |||
@@ -851,10 +851,8 @@ static void ath9k_hw_ar9287_set_txpower(struct ath_hw *ah, | |||
851 | if (test) | 851 | if (test) |
852 | return; | 852 | return; |
853 | 853 | ||
854 | if (AR_SREV_9280_20_OR_LATER(ah)) { | 854 | for (i = 0; i < Ar5416RateSize; i++) |
855 | for (i = 0; i < Ar5416RateSize; i++) | 855 | ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; |
856 | ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2; | ||
857 | } | ||
858 | 856 | ||
859 | ENABLE_REGWRITE_BUFFER(ah); | 857 | ENABLE_REGWRITE_BUFFER(ah); |
860 | 858 | ||
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c index e7e84be8bee..eda681fc7ba 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_def.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c | |||
@@ -547,8 +547,7 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah, | |||
547 | break; | 547 | break; |
548 | } | 548 | } |
549 | 549 | ||
550 | if (AR_SREV_5416_20_OR_LATER(ah) && | 550 | if ((ah->rxchainmask == 5 || ah->txchainmask == 5) && (i != 0)) |
551 | (ah->rxchainmask == 5 || ah->txchainmask == 5) && (i != 0)) | ||
552 | regChainOffset = (i == 1) ? 0x2000 : 0x1000; | 551 | regChainOffset = (i == 1) ? 0x2000 : 0x1000; |
553 | else | 552 | else |
554 | regChainOffset = i * 0x1000; | 553 | regChainOffset = i * 0x1000; |
@@ -565,9 +564,8 @@ static void ath9k_hw_def_set_board_values(struct ath_hw *ah, | |||
565 | SM(pModal->iqCalQCh[i], | 564 | SM(pModal->iqCalQCh[i], |
566 | AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF)); | 565 | AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF)); |
567 | 566 | ||
568 | if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) | 567 | ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal, |
569 | ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal, | 568 | regChainOffset, i); |
570 | regChainOffset, i); | ||
571 | } | 569 | } |
572 | 570 | ||
573 | if (AR_SREV_9280_20_OR_LATER(ah)) { | 571 | if (AR_SREV_9280_20_OR_LATER(ah)) { |
@@ -893,8 +891,7 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, | |||
893 | xpdGainValues[2]); | 891 | xpdGainValues[2]); |
894 | 892 | ||
895 | for (i = 0; i < AR5416_MAX_CHAINS; i++) { | 893 | for (i = 0; i < AR5416_MAX_CHAINS; i++) { |
896 | if (AR_SREV_5416_20_OR_LATER(ah) && | 894 | if ((ah->rxchainmask == 5 || ah->txchainmask == 5) && |
897 | (ah->rxchainmask == 5 || ah->txchainmask == 5) && | ||
898 | (i != 0)) { | 895 | (i != 0)) { |
899 | regChainOffset = (i == 1) ? 0x2000 : 0x1000; | 896 | regChainOffset = (i == 1) ? 0x2000 : 0x1000; |
900 | } else | 897 | } else |
@@ -935,27 +932,24 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, | |||
935 | 932 | ||
936 | ENABLE_REGWRITE_BUFFER(ah); | 933 | ENABLE_REGWRITE_BUFFER(ah); |
937 | 934 | ||
938 | if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) { | 935 | if (OLC_FOR_AR9280_20_LATER) { |
939 | if (OLC_FOR_AR9280_20_LATER) { | 936 | REG_WRITE(ah, |
940 | REG_WRITE(ah, | 937 | AR_PHY_TPCRG5 + regChainOffset, |
941 | AR_PHY_TPCRG5 + regChainOffset, | 938 | SM(0x6, |
942 | SM(0x6, | 939 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | |
943 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | | 940 | SM_PD_GAIN(1) | SM_PD_GAIN(2) | |
944 | SM_PD_GAIN(1) | SM_PD_GAIN(2) | | 941 | SM_PD_GAIN(3) | SM_PD_GAIN(4)); |
945 | SM_PD_GAIN(3) | SM_PD_GAIN(4)); | 942 | } else { |
946 | } else { | 943 | REG_WRITE(ah, |
947 | REG_WRITE(ah, | 944 | AR_PHY_TPCRG5 + regChainOffset, |
948 | AR_PHY_TPCRG5 + regChainOffset, | 945 | SM(pdGainOverlap_t2, |
949 | SM(pdGainOverlap_t2, | 946 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP)| |
950 | AR_PHY_TPCRG5_PD_GAIN_OVERLAP)| | 947 | SM_PDGAIN_B(0, 1) | |
951 | SM_PDGAIN_B(0, 1) | | 948 | SM_PDGAIN_B(1, 2) | |
952 | SM_PDGAIN_B(1, 2) | | 949 | SM_PDGAIN_B(2, 3) | |
953 | SM_PDGAIN_B(2, 3) | | 950 | SM_PDGAIN_B(3, 4)); |
954 | SM_PDGAIN_B(3, 4)); | ||
955 | } | ||
956 | } | 951 | } |
957 | 952 | ||
958 | |||
959 | ath9k_adjust_pdadc_values(ah, pwr_table_offset, | 953 | ath9k_adjust_pdadc_values(ah, pwr_table_offset, |
960 | diff, pdadcValues); | 954 | diff, pdadcValues); |
961 | 955 | ||
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c index 786587ac40a..22f23eafe8b 100644 --- a/drivers/net/wireless/ath/ath9k/mac.c +++ b/drivers/net/wireless/ath/ath9k/mac.c | |||
@@ -584,7 +584,7 @@ int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, | |||
584 | else | 584 | else |
585 | rs->rs_keyix = ATH9K_RXKEYIX_INVALID; | 585 | rs->rs_keyix = ATH9K_RXKEYIX_INVALID; |
586 | 586 | ||
587 | rs->rs_rate = RXSTATUS_RATE(ah, (&ads)); | 587 | rs->rs_rate = MS(ads.ds_rxstatus0, AR_RxRate); |
588 | rs->rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0; | 588 | rs->rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0; |
589 | 589 | ||
590 | rs->rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0; | 590 | rs->rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0; |
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h index ac5a1d265d3..91c96546c0c 100644 --- a/drivers/net/wireless/ath/ath9k/mac.h +++ b/drivers/net/wireless/ath/ath9k/mac.h | |||
@@ -17,10 +17,6 @@ | |||
17 | #ifndef MAC_H | 17 | #ifndef MAC_H |
18 | #define MAC_H | 18 | #define MAC_H |
19 | 19 | ||
20 | #define RXSTATUS_RATE(ah, ads) (AR_SREV_5416_20_OR_LATER(ah) ? \ | ||
21 | MS(ads->ds_rxstatus0, AR_RxRate) : \ | ||
22 | (ads->ds_rxstatus3 >> 2) & 0xFF) | ||
23 | |||
24 | #define set11nTries(_series, _index) \ | 20 | #define set11nTries(_series, _index) \ |
25 | (SM((_series)[_index].Tries, AR_XmitDataTries##_index)) | 21 | (SM((_series)[_index].Tries, AR_XmitDataTries##_index)) |
26 | 22 | ||
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index 0846654b57e..b76c49d9c50 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -803,10 +803,6 @@ | |||
803 | #define AR_SREV_5416(_ah) \ | 803 | #define AR_SREV_5416(_ah) \ |
804 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \ | 804 | (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \ |
805 | ((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE)) | 805 | ((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE)) |
806 | #define AR_SREV_5416_20_OR_LATER(_ah) \ | ||
807 | (((AR_SREV_5416(_ah)) && \ | ||
808 | ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_20)) || \ | ||
809 | ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9100)) | ||
810 | #define AR_SREV_5416_22_OR_LATER(_ah) \ | 806 | #define AR_SREV_5416_22_OR_LATER(_ah) \ |
811 | (((AR_SREV_5416(_ah)) && \ | 807 | (((AR_SREV_5416(_ah)) && \ |
812 | ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_22)) || \ | 808 | ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_22)) || \ |