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authorKalle Valo <kalle.valo@nokia.com>2009-08-07 06:33:57 -0400
committerJohn W. Linville <linville@tuxdriver.com>2009-08-14 09:13:38 -0400
commit0e71bb084adc4986b9a4be3581897f0ee703cbd5 (patch)
tree88c0fece109d88cdcd7a24e077b46bff5941327d /drivers/net/wireless
parentb5ed9c1b6f8fcb2d2315f12599fd5808f7933f16 (diff)
wl1251: remove wl1251_ops
Now wl1271 is splitted to separate files, no need to use wl1251_ops anymore. So remove struct wl1251_chip and wl1251_ops.c. Signed-off-by: Kalle Valo <kalle.valo@nokia.com> Reviewed-by: Vidhya Govindan <vidhya.govindan@nokia.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r--drivers/net/wireless/wl12xx/Makefile2
-rw-r--r--drivers/net/wireless/wl12xx/wl1251.h55
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_acx.c79
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_acx.h146
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_boot.c256
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_boot.h1
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_cmd.c4
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_init.c213
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_init.h2
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_io.c17
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_main.c141
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_ops.h165
12 files changed, 842 insertions, 239 deletions
diff --git a/drivers/net/wireless/wl12xx/Makefile b/drivers/net/wireless/wl12xx/Makefile
index 207e85274bc..62e37ad01cc 100644
--- a/drivers/net/wireless/wl12xx/Makefile
+++ b/drivers/net/wireless/wl12xx/Makefile
@@ -1,7 +1,7 @@
1wl1251-objs = wl1251_main.o wl1251_event.o \ 1wl1251-objs = wl1251_main.o wl1251_event.o \
2 wl1251_tx.o wl1251_rx.o wl1251_ps.o wl1251_cmd.o \ 2 wl1251_tx.o wl1251_rx.o wl1251_ps.o wl1251_cmd.o \
3 wl1251_acx.o wl1251_boot.o wl1251_init.o \ 3 wl1251_acx.o wl1251_boot.o wl1251_init.o \
4 wl1251_ops.o wl1251_debugfs.o wl1251_io.o 4 wl1251_debugfs.o wl1251_io.o
5 5
6obj-$(CONFIG_WL1251) += wl1251.o 6obj-$(CONFIG_WL1251) += wl1251.o
7obj-$(CONFIG_WL1251_SPI) += wl1251_spi.o 7obj-$(CONFIG_WL1251_SPI) += wl1251_spi.o
diff --git a/drivers/net/wireless/wl12xx/wl1251.h b/drivers/net/wireless/wl12xx/wl1251.h
index 13f0589beec..44c5001beed 100644
--- a/drivers/net/wireless/wl12xx/wl1251.h
+++ b/drivers/net/wireless/wl12xx/wl1251.h
@@ -143,35 +143,6 @@ struct wl1251_partition_set {
143 143
144struct wl1251; 144struct wl1251;
145 145
146/* FIXME: I'm not sure about this structure name */
147struct wl1251_chip {
148 u32 id;
149
150 const char *fw_filename;
151 const char *nvs_filename;
152
153 char fw_ver[21];
154
155 unsigned int power_on_sleep;
156 int intr_cmd_complete;
157 int intr_init_complete;
158
159 int (*op_upload_fw)(struct wl1251 *wl);
160 int (*op_upload_nvs)(struct wl1251 *wl);
161 int (*op_boot)(struct wl1251 *wl);
162 void (*op_set_ecpu_ctrl)(struct wl1251 *wl, u32 flag);
163 void (*op_target_enable_interrupts)(struct wl1251 *wl);
164 int (*op_hw_init)(struct wl1251 *wl);
165 int (*op_plt_init)(struct wl1251 *wl);
166 void (*op_tx_flush)(struct wl1251 *wl);
167 void (*op_fw_version)(struct wl1251 *wl);
168 int (*op_cmd_join)(struct wl1251 *wl, u8 bss_type, u8 dtim_interval,
169 u16 beacon_interval, u8 wait);
170
171 struct wl1251_partition_set *p_table;
172 enum wl12xx_acx_int_reg *acx_reg_table;
173};
174
175struct wl1251_stats { 146struct wl1251_stats {
176 struct acx_statistics *fw_stats; 147 struct acx_statistics *fw_stats;
177 unsigned long fw_stats_update; 148 unsigned long fw_stats_update;
@@ -307,8 +278,6 @@ struct wl1251 {
307 int virtual_mem_addr; 278 int virtual_mem_addr;
308 int virtual_reg_addr; 279 int virtual_reg_addr;
309 280
310 struct wl1251_chip chip;
311
312 int cmd_box_addr; 281 int cmd_box_addr;
313 int event_box_addr; 282 int event_box_addr;
314 struct boot_attr boot_attr; 283 struct boot_attr boot_attr;
@@ -401,6 +370,9 @@ struct wl1251 {
401 u32 buffer_cmd; 370 u32 buffer_cmd;
402 u8 buffer_busyword[WL1251_BUSY_WORD_LEN]; 371 u8 buffer_busyword[WL1251_BUSY_WORD_LEN];
403 struct wl1251_rx_descriptor *rx_descriptor; 372 struct wl1251_rx_descriptor *rx_descriptor;
373
374 u32 chip_id;
375 char fw_ver[21];
404}; 376};
405 377
406int wl1251_plt_start(struct wl1251 *wl); 378int wl1251_plt_start(struct wl1251 *wl);
@@ -420,16 +392,25 @@ void wl1251_disable_interrupts(struct wl1251 *wl);
420 392
421#define WL1251_TX_QUEUE_MAX_LENGTH 20 393#define WL1251_TX_QUEUE_MAX_LENGTH 20
422 394
423/* Different chips need different sleep times after power on. WL1271 needs
424 * 200ms, WL1251 needs only 10ms. By default we use 200ms, but as soon as we
425 * know the chip ID, we change the sleep value in the wl1251 chip structure,
426 * so in subsequent power ons, we don't waste more time then needed. */
427#define WL1251_DEFAULT_POWER_ON_SLEEP 200
428
429#define CHIP_ID_1251_PG10 (0x7010101) 395#define CHIP_ID_1251_PG10 (0x7010101)
430#define CHIP_ID_1251_PG11 (0x7020101) 396#define CHIP_ID_1251_PG11 (0x7020101)
431#define CHIP_ID_1251_PG12 (0x7030101) 397#define CHIP_ID_1251_PG12 (0x7030101)
432#define CHIP_ID_1271_PG10 (0x4030101) 398#define CHIP_ID_1271_PG10 (0x4030101)
433#define CHIP_ID_1271_PG20 (0x4030111) 399#define CHIP_ID_1271_PG20 (0x4030111)
434 400
401#define WL1251_FW_NAME "wl1251-fw.bin"
402#define WL1251_NVS_NAME "wl1251-nvs.bin"
403
404#define WL1251_POWER_ON_SLEEP 10 /* in miliseconds */
405
406#define WL1251_PART_DOWN_MEM_START 0x0
407#define WL1251_PART_DOWN_MEM_SIZE 0x16800
408#define WL1251_PART_DOWN_REG_START REGISTERS_BASE
409#define WL1251_PART_DOWN_REG_SIZE REGISTERS_DOWN_SIZE
410
411#define WL1251_PART_WORK_MEM_START 0x28000
412#define WL1251_PART_WORK_MEM_SIZE 0x14000
413#define WL1251_PART_WORK_REG_START REGISTERS_BASE
414#define WL1251_PART_WORK_REG_SIZE REGISTERS_WORK_SIZE
415
435#endif 416#endif
diff --git a/drivers/net/wireless/wl12xx/wl1251_acx.c b/drivers/net/wireless/wl12xx/wl1251_acx.c
index 91fe16c8d5b..0a225c62c97 100644
--- a/drivers/net/wireless/wl12xx/wl1251_acx.c
+++ b/drivers/net/wireless/wl12xx/wl1251_acx.c
@@ -837,3 +837,82 @@ int wl1251_acx_statistics(struct wl1251 *wl, struct acx_statistics *stats)
837 837
838 return 0; 838 return 0;
839} 839}
840
841int wl1251_acx_rate_policies(struct wl1251 *wl)
842{
843 struct acx_rate_policy *acx;
844 int ret = 0;
845
846 wl1251_debug(DEBUG_ACX, "acx rate policies");
847
848 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
849
850 if (!acx) {
851 ret = -ENOMEM;
852 goto out;
853 }
854
855 /* configure one default (one-size-fits-all) rate class */
856 acx->rate_class_cnt = 1;
857 acx->rate_class[0].enabled_rates = ACX_RATE_MASK_UNSPECIFIED;
858 acx->rate_class[0].short_retry_limit = ACX_RATE_RETRY_LIMIT;
859 acx->rate_class[0].long_retry_limit = ACX_RATE_RETRY_LIMIT;
860 acx->rate_class[0].aflags = 0;
861
862 ret = wl1251_cmd_configure(wl, ACX_RATE_POLICY, acx, sizeof(*acx));
863 if (ret < 0) {
864 wl1251_warning("Setting of rate policies failed: %d", ret);
865 goto out;
866 }
867
868out:
869 kfree(acx);
870 return ret;
871}
872
873int wl1251_acx_mem_cfg(struct wl1251 *wl)
874{
875 struct wl1251_acx_config_memory *mem_conf;
876 int ret, i;
877
878 wl1251_debug(DEBUG_ACX, "acx mem cfg");
879
880 mem_conf = kzalloc(sizeof(*mem_conf), GFP_KERNEL);
881 if (!mem_conf) {
882 ret = -ENOMEM;
883 goto out;
884 }
885
886 /* memory config */
887 mem_conf->mem_config.num_stations = cpu_to_le16(DEFAULT_NUM_STATIONS);
888 mem_conf->mem_config.rx_mem_block_num = 35;
889 mem_conf->mem_config.tx_min_mem_block_num = 64;
890 mem_conf->mem_config.num_tx_queues = MAX_TX_QUEUES;
891 mem_conf->mem_config.host_if_options = HOSTIF_PKT_RING;
892 mem_conf->mem_config.num_ssid_profiles = 1;
893 mem_conf->mem_config.debug_buffer_size =
894 cpu_to_le16(TRACE_BUFFER_MAX_SIZE);
895
896 /* RX queue config */
897 mem_conf->rx_queue_config.dma_address = 0;
898 mem_conf->rx_queue_config.num_descs = ACX_RX_DESC_DEF;
899 mem_conf->rx_queue_config.priority = DEFAULT_RXQ_PRIORITY;
900 mem_conf->rx_queue_config.type = DEFAULT_RXQ_TYPE;
901
902 /* TX queue config */
903 for (i = 0; i < MAX_TX_QUEUES; i++) {
904 mem_conf->tx_queue_config[i].num_descs = ACX_TX_DESC_DEF;
905 mem_conf->tx_queue_config[i].attributes = i;
906 }
907
908 ret = wl1251_cmd_configure(wl, ACX_MEM_CFG, mem_conf,
909 sizeof(*mem_conf));
910 if (ret < 0) {
911 wl1251_warning("wl1251 mem config failed: %d", ret);
912 goto out;
913 }
914
915out:
916 kfree(mem_conf);
917 return ret;
918}
diff --git a/drivers/net/wireless/wl12xx/wl1251_acx.h b/drivers/net/wireless/wl12xx/wl1251_acx.h
index 2e7b1933a8f..cafb9145950 100644
--- a/drivers/net/wireless/wl12xx/wl1251_acx.h
+++ b/drivers/net/wireless/wl12xx/wl1251_acx.h
@@ -1031,6 +1031,150 @@ struct acx_statistics {
1031 struct acx_rxpipe_statistics rxpipe; 1031 struct acx_rxpipe_statistics rxpipe;
1032} __attribute__ ((packed)); 1032} __attribute__ ((packed));
1033 1033
1034#define ACX_MAX_RATE_CLASSES 8
1035#define ACX_RATE_MASK_UNSPECIFIED 0
1036#define ACX_RATE_RETRY_LIMIT 10
1037
1038struct acx_rate_class {
1039 u32 enabled_rates;
1040 u8 short_retry_limit;
1041 u8 long_retry_limit;
1042 u8 aflags;
1043 u8 reserved;
1044};
1045
1046struct acx_rate_policy {
1047 struct acx_header header;
1048
1049 u32 rate_class_cnt;
1050 struct acx_rate_class rate_class[ACX_MAX_RATE_CLASSES];
1051} __attribute__ ((packed));
1052
1053struct wl1251_acx_memory {
1054 __le16 num_stations; /* number of STAs to be supported. */
1055 u16 reserved_1;
1056
1057 /*
1058 * Nmber of memory buffers for the RX mem pool.
1059 * The actual number may be less if there are
1060 * not enough blocks left for the minimum num
1061 * of TX ones.
1062 */
1063 u8 rx_mem_block_num;
1064 u8 reserved_2;
1065 u8 num_tx_queues; /* From 1 to 16 */
1066 u8 host_if_options; /* HOST_IF* */
1067 u8 tx_min_mem_block_num;
1068 u8 num_ssid_profiles;
1069 __le16 debug_buffer_size;
1070} __attribute__ ((packed));
1071
1072
1073#define ACX_RX_DESC_MIN 1
1074#define ACX_RX_DESC_MAX 127
1075#define ACX_RX_DESC_DEF 32
1076struct wl1251_acx_rx_queue_config {
1077 u8 num_descs;
1078 u8 pad;
1079 u8 type;
1080 u8 priority;
1081 __le32 dma_address;
1082} __attribute__ ((packed));
1083
1084#define ACX_TX_DESC_MIN 1
1085#define ACX_TX_DESC_MAX 127
1086#define ACX_TX_DESC_DEF 16
1087struct wl1251_acx_tx_queue_config {
1088 u8 num_descs;
1089 u8 pad[2];
1090 u8 attributes;
1091} __attribute__ ((packed));
1092
1093#define MAX_TX_QUEUE_CONFIGS 5
1094#define MAX_TX_QUEUES 4
1095struct wl1251_acx_config_memory {
1096 struct acx_header header;
1097
1098 struct wl1251_acx_memory mem_config;
1099 struct wl1251_acx_rx_queue_config rx_queue_config;
1100 struct wl1251_acx_tx_queue_config tx_queue_config[MAX_TX_QUEUE_CONFIGS];
1101} __attribute__ ((packed));
1102
1103struct wl1251_acx_mem_map {
1104 struct acx_header header;
1105
1106 void *code_start;
1107 void *code_end;
1108
1109 void *wep_defkey_start;
1110 void *wep_defkey_end;
1111
1112 void *sta_table_start;
1113 void *sta_table_end;
1114
1115 void *packet_template_start;
1116 void *packet_template_end;
1117
1118 void *queue_memory_start;
1119 void *queue_memory_end;
1120
1121 void *packet_memory_pool_start;
1122 void *packet_memory_pool_end;
1123
1124 void *debug_buffer1_start;
1125 void *debug_buffer1_end;
1126
1127 void *debug_buffer2_start;
1128 void *debug_buffer2_end;
1129
1130 /* Number of blocks FW allocated for TX packets */
1131 u32 num_tx_mem_blocks;
1132
1133 /* Number of blocks FW allocated for RX packets */
1134 u32 num_rx_mem_blocks;
1135} __attribute__ ((packed));
1136
1137/*************************************************************************
1138
1139 Host Interrupt Register (WiLink -> Host)
1140
1141**************************************************************************/
1142
1143/* RX packet is ready in Xfer buffer #0 */
1144#define WL1251_ACX_INTR_RX0_DATA BIT(0)
1145
1146/* TX result(s) are in the TX complete buffer */
1147#define WL1251_ACX_INTR_TX_RESULT BIT(1)
1148
1149/* OBSOLETE */
1150#define WL1251_ACX_INTR_TX_XFR BIT(2)
1151
1152/* RX packet is ready in Xfer buffer #1 */
1153#define WL1251_ACX_INTR_RX1_DATA BIT(3)
1154
1155/* Event was entered to Event MBOX #A */
1156#define WL1251_ACX_INTR_EVENT_A BIT(4)
1157
1158/* Event was entered to Event MBOX #B */
1159#define WL1251_ACX_INTR_EVENT_B BIT(5)
1160
1161/* OBSOLETE */
1162#define WL1251_ACX_INTR_WAKE_ON_HOST BIT(6)
1163
1164/* Trace meassge on MBOX #A */
1165#define WL1251_ACX_INTR_TRACE_A BIT(7)
1166
1167/* Trace meassge on MBOX #B */
1168#define WL1251_ACX_INTR_TRACE_B BIT(8)
1169
1170/* Command processing completion */
1171#define WL1251_ACX_INTR_CMD_COMPLETE BIT(9)
1172
1173/* Init sequence is done */
1174#define WL1251_ACX_INTR_INIT_COMPLETE BIT(14)
1175
1176#define WL1251_ACX_INTR_ALL 0xFFFFFFFF
1177
1034enum { 1178enum {
1035 ACX_WAKE_UP_CONDITIONS = 0x0002, 1179 ACX_WAKE_UP_CONDITIONS = 0x0002,
1036 ACX_MEM_CFG = 0x0003, 1180 ACX_MEM_CFG = 0x0003,
@@ -1142,5 +1286,7 @@ int wl1251_acx_cts_protect(struct wl1251 *wl,
1142 enum acx_ctsprotect_type ctsprotect); 1286 enum acx_ctsprotect_type ctsprotect);
1143int wl1251_acx_statistics(struct wl1251 *wl, struct acx_statistics *stats); 1287int wl1251_acx_statistics(struct wl1251 *wl, struct acx_statistics *stats);
1144int wl1251_acx_tsf_info(struct wl1251 *wl, u64 *mactime); 1288int wl1251_acx_tsf_info(struct wl1251 *wl, u64 *mactime);
1289int wl1251_acx_rate_policies(struct wl1251 *wl);
1290int wl1251_acx_mem_cfg(struct wl1251 *wl);
1145 1291
1146#endif /* __WL1251_ACX_H__ */ 1292#endif /* __WL1251_ACX_H__ */
diff --git a/drivers/net/wireless/wl12xx/wl1251_boot.c b/drivers/net/wireless/wl12xx/wl1251_boot.c
index 8b50d44d824..88e9cb0947d 100644
--- a/drivers/net/wireless/wl12xx/wl1251_boot.c
+++ b/drivers/net/wireless/wl12xx/wl1251_boot.c
@@ -28,6 +28,7 @@
28#include "wl1251_io.h" 28#include "wl1251_io.h"
29#include "wl1251_spi.h" 29#include "wl1251_spi.h"
30#include "wl1251_event.h" 30#include "wl1251_event.h"
31#include "wl1251_acx.h"
31 32
32void wl1251_boot_target_enable_interrupts(struct wl1251 *wl) 33void wl1251_boot_target_enable_interrupts(struct wl1251 *wl)
33{ 34{
@@ -208,18 +209,30 @@ int wl1251_boot_init_seq(struct wl1251 *wl)
208 return 0; 209 return 0;
209} 210}
210 211
212static void wl1251_boot_set_ecpu_ctrl(struct wl1251 *wl, u32 flag)
213{
214 u32 cpu_ctrl;
215
216 /* 10.5.0 run the firmware (I) */
217 cpu_ctrl = wl1251_reg_read32(wl, ACX_REG_ECPU_CONTROL);
218
219 /* 10.5.1 run the firmware (II) */
220 cpu_ctrl &= ~flag;
221 wl1251_reg_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl);
222}
223
211int wl1251_boot_run_firmware(struct wl1251 *wl) 224int wl1251_boot_run_firmware(struct wl1251 *wl)
212{ 225{
213 int loop, ret; 226 int loop, ret;
214 u32 chip_id, interrupt; 227 u32 chip_id, interrupt;
215 228
216 wl->chip.op_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT); 229 wl1251_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
217 230
218 chip_id = wl1251_reg_read32(wl, CHIP_ID_B); 231 chip_id = wl1251_reg_read32(wl, CHIP_ID_B);
219 232
220 wl1251_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id); 233 wl1251_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
221 234
222 if (chip_id != wl->chip.id) { 235 if (chip_id != wl->chip_id) {
223 wl1251_error("chip id doesn't match after firmware boot"); 236 wl1251_error("chip id doesn't match after firmware boot");
224 return -EIO; 237 return -EIO;
225 } 238 }
@@ -236,9 +249,9 @@ int wl1251_boot_run_firmware(struct wl1251 *wl)
236 return -EIO; 249 return -EIO;
237 } 250 }
238 /* check that ACX_INTR_INIT_COMPLETE is enabled */ 251 /* check that ACX_INTR_INIT_COMPLETE is enabled */
239 else if (interrupt & wl->chip.intr_init_complete) { 252 else if (interrupt & WL1251_ACX_INTR_INIT_COMPLETE) {
240 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_ACK, 253 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
241 wl->chip.intr_init_complete); 254 WL1251_ACX_INTR_INIT_COMPLETE);
242 break; 255 break;
243 } 256 }
244 } 257 }
@@ -256,16 +269,15 @@ int wl1251_boot_run_firmware(struct wl1251 *wl)
256 wl->event_box_addr = wl1251_reg_read32(wl, REG_EVENT_MAILBOX_PTR); 269 wl->event_box_addr = wl1251_reg_read32(wl, REG_EVENT_MAILBOX_PTR);
257 270
258 /* set the working partition to its "running" mode offset */ 271 /* set the working partition to its "running" mode offset */
259 wl1251_set_partition(wl, 272 wl1251_set_partition(wl, WL1251_PART_WORK_MEM_START,
260 wl->chip.p_table[PART_WORK].mem.start, 273 WL1251_PART_WORK_MEM_SIZE,
261 wl->chip.p_table[PART_WORK].mem.size, 274 WL1251_PART_WORK_REG_START,
262 wl->chip.p_table[PART_WORK].reg.start, 275 WL1251_PART_WORK_REG_SIZE);
263 wl->chip.p_table[PART_WORK].reg.size);
264 276
265 wl1251_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x event_box_addr 0x%x", 277 wl1251_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x event_box_addr 0x%x",
266 wl->cmd_box_addr, wl->event_box_addr); 278 wl->cmd_box_addr, wl->event_box_addr);
267 279
268 wl->chip.op_fw_version(wl); 280 wl1251_acx_fw_version(wl, wl->fw_ver, sizeof(wl->fw_ver));
269 281
270 /* 282 /*
271 * in case of full asynchronous mode the firmware event must be 283 * in case of full asynchronous mode the firmware event must be
@@ -275,7 +287,14 @@ int wl1251_boot_run_firmware(struct wl1251 *wl)
275 /* enable gpio interrupts */ 287 /* enable gpio interrupts */
276 wl1251_enable_interrupts(wl); 288 wl1251_enable_interrupts(wl);
277 289
278 wl->chip.op_target_enable_interrupts(wl); 290 /* Enable target's interrupts */
291 wl->intr_mask = WL1251_ACX_INTR_RX0_DATA |
292 WL1251_ACX_INTR_RX1_DATA |
293 WL1251_ACX_INTR_TX_RESULT |
294 WL1251_ACX_INTR_EVENT_A |
295 WL1251_ACX_INTR_EVENT_B |
296 WL1251_ACX_INTR_INIT_COMPLETE;
297 wl1251_boot_target_enable_interrupts(wl);
279 298
280 /* unmask all mbox events */ 299 /* unmask all mbox events */
281 wl->event_mask = 0xffffffff; 300 wl->event_mask = 0xffffffff;
@@ -291,3 +310,218 @@ int wl1251_boot_run_firmware(struct wl1251 *wl)
291 /* firmware startup completed */ 310 /* firmware startup completed */
292 return 0; 311 return 0;
293} 312}
313
314static int wl1251_boot_upload_firmware(struct wl1251 *wl)
315{
316 int addr, chunk_num, partition_limit;
317 size_t fw_data_len;
318 u8 *p;
319
320 /* whal_FwCtrl_LoadFwImageSm() */
321
322 wl1251_debug(DEBUG_BOOT, "chip id before fw upload: 0x%x",
323 wl1251_reg_read32(wl, CHIP_ID_B));
324
325 /* 10.0 check firmware length and set partition */
326 fw_data_len = (wl->fw[4] << 24) | (wl->fw[5] << 16) |
327 (wl->fw[6] << 8) | (wl->fw[7]);
328
329 wl1251_debug(DEBUG_BOOT, "fw_data_len %zu chunk_size %d", fw_data_len,
330 CHUNK_SIZE);
331
332 if ((fw_data_len % 4) != 0) {
333 wl1251_error("firmware length not multiple of four");
334 return -EIO;
335 }
336
337 wl1251_set_partition(wl, WL1251_PART_DOWN_MEM_START,
338 WL1251_PART_DOWN_MEM_SIZE,
339 WL1251_PART_DOWN_REG_START,
340 WL1251_PART_DOWN_REG_SIZE);
341
342 /* 10.1 set partition limit and chunk num */
343 chunk_num = 0;
344 partition_limit = WL1251_PART_DOWN_MEM_SIZE;
345
346 while (chunk_num < fw_data_len / CHUNK_SIZE) {
347 /* 10.2 update partition, if needed */
348 addr = WL1251_PART_DOWN_MEM_START +
349 (chunk_num + 2) * CHUNK_SIZE;
350 if (addr > partition_limit) {
351 addr = WL1251_PART_DOWN_MEM_START +
352 chunk_num * CHUNK_SIZE;
353 partition_limit = chunk_num * CHUNK_SIZE +
354 WL1251_PART_DOWN_MEM_SIZE;
355 wl1251_set_partition(wl,
356 addr,
357 WL1251_PART_DOWN_MEM_SIZE,
358 WL1251_PART_DOWN_REG_START,
359 WL1251_PART_DOWN_REG_SIZE);
360 }
361
362 /* 10.3 upload the chunk */
363 addr = WL1251_PART_DOWN_MEM_START + chunk_num * CHUNK_SIZE;
364 p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;
365 wl1251_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
366 p, addr);
367 wl1251_mem_write(wl, addr, p, CHUNK_SIZE);
368
369 chunk_num++;
370 }
371
372 /* 10.4 upload the last chunk */
373 addr = WL1251_PART_DOWN_MEM_START + chunk_num * CHUNK_SIZE;
374 p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;
375 wl1251_debug(DEBUG_BOOT, "uploading fw last chunk (%zu B) 0x%p to 0x%x",
376 fw_data_len % CHUNK_SIZE, p, addr);
377 wl1251_mem_write(wl, addr, p, fw_data_len % CHUNK_SIZE);
378
379 return 0;
380}
381
382static int wl1251_boot_upload_nvs(struct wl1251 *wl)
383{
384 size_t nvs_len, nvs_bytes_written, burst_len;
385 int nvs_start, i;
386 u32 dest_addr, val;
387 u8 *nvs_ptr, *nvs;
388
389 nvs = wl->nvs;
390 if (nvs == NULL)
391 return -ENODEV;
392
393 nvs_ptr = nvs;
394
395 nvs_len = wl->nvs_len;
396 nvs_start = wl->fw_len;
397
398 /*
399 * Layout before the actual NVS tables:
400 * 1 byte : burst length.
401 * 2 bytes: destination address.
402 * n bytes: data to burst copy.
403 *
404 * This is ended by a 0 length, then the NVS tables.
405 */
406
407 while (nvs_ptr[0]) {
408 burst_len = nvs_ptr[0];
409 dest_addr = (nvs_ptr[1] & 0xfe) | ((u32)(nvs_ptr[2] << 8));
410
411 /* We move our pointer to the data */
412 nvs_ptr += 3;
413
414 for (i = 0; i < burst_len; i++) {
415 val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
416 | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
417
418 wl1251_debug(DEBUG_BOOT,
419 "nvs burst write 0x%x: 0x%x",
420 dest_addr, val);
421 wl1251_mem_write32(wl, dest_addr, val);
422
423 nvs_ptr += 4;
424 dest_addr += 4;
425 }
426 }
427
428 /*
429 * We've reached the first zero length, the first NVS table
430 * is 7 bytes further.
431 */
432 nvs_ptr += 7;
433 nvs_len -= nvs_ptr - nvs;
434 nvs_len = ALIGN(nvs_len, 4);
435
436 /* Now we must set the partition correctly */
437 wl1251_set_partition(wl, nvs_start,
438 WL1251_PART_DOWN_MEM_SIZE,
439 WL1251_PART_DOWN_REG_START,
440 WL1251_PART_DOWN_REG_SIZE);
441
442 /* And finally we upload the NVS tables */
443 nvs_bytes_written = 0;
444 while (nvs_bytes_written < nvs_len) {
445 val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
446 | (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
447
448 val = cpu_to_le32(val);
449
450 wl1251_debug(DEBUG_BOOT,
451 "nvs write table 0x%x: 0x%x",
452 nvs_start, val);
453 wl1251_mem_write32(wl, nvs_start, val);
454
455 nvs_ptr += 4;
456 nvs_bytes_written += 4;
457 nvs_start += 4;
458 }
459
460 return 0;
461}
462
463int wl1251_boot(struct wl1251 *wl)
464{
465 int ret = 0, minor_minor_e2_ver;
466 u32 tmp, boot_data;
467
468 ret = wl1251_boot_soft_reset(wl);
469 if (ret < 0)
470 goto out;
471
472 /* 2. start processing NVS file */
473 ret = wl1251_boot_upload_nvs(wl);
474 if (ret < 0)
475 goto out;
476
477 /* write firmware's last address (ie. it's length) to
478 * ACX_EEPROMLESS_IND_REG */
479 wl1251_reg_write32(wl, ACX_EEPROMLESS_IND_REG, wl->fw_len);
480
481 /* 6. read the EEPROM parameters */
482 tmp = wl1251_reg_read32(wl, SCR_PAD2);
483
484 /* 7. read bootdata */
485 wl->boot_attr.radio_type = (tmp & 0x0000FF00) >> 8;
486 wl->boot_attr.major = (tmp & 0x00FF0000) >> 16;
487 tmp = wl1251_reg_read32(wl, SCR_PAD3);
488
489 /* 8. check bootdata and call restart sequence */
490 wl->boot_attr.minor = (tmp & 0x00FF0000) >> 16;
491 minor_minor_e2_ver = (tmp & 0xFF000000) >> 24;
492
493 wl1251_debug(DEBUG_BOOT, "radioType 0x%x majorE2Ver 0x%x "
494 "minorE2Ver 0x%x minor_minor_e2_ver 0x%x",
495 wl->boot_attr.radio_type, wl->boot_attr.major,
496 wl->boot_attr.minor, minor_minor_e2_ver);
497
498 ret = wl1251_boot_init_seq(wl);
499 if (ret < 0)
500 goto out;
501
502 /* 9. NVS processing done */
503 boot_data = wl1251_reg_read32(wl, ACX_REG_ECPU_CONTROL);
504
505 wl1251_debug(DEBUG_BOOT, "halt boot_data 0x%x", boot_data);
506
507 /* 10. check that ECPU_CONTROL_HALT bits are set in
508 * pWhalBus->uBootData and start uploading firmware
509 */
510 if ((boot_data & ECPU_CONTROL_HALT) == 0) {
511 wl1251_error("boot failed, ECPU_CONTROL_HALT not set");
512 ret = -EIO;
513 goto out;
514 }
515
516 ret = wl1251_boot_upload_firmware(wl);
517 if (ret < 0)
518 goto out;
519
520 /* 10.5 start firmware */
521 ret = wl1251_boot_run_firmware(wl);
522 if (ret < 0)
523 goto out;
524
525out:
526 return ret;
527}
diff --git a/drivers/net/wireless/wl12xx/wl1251_boot.h b/drivers/net/wireless/wl12xx/wl1251_boot.h
index 798362d71e3..90063697e8f 100644
--- a/drivers/net/wireless/wl12xx/wl1251_boot.h
+++ b/drivers/net/wireless/wl12xx/wl1251_boot.h
@@ -30,6 +30,7 @@ int wl1251_boot_soft_reset(struct wl1251 *wl);
30int wl1251_boot_init_seq(struct wl1251 *wl); 30int wl1251_boot_init_seq(struct wl1251 *wl);
31int wl1251_boot_run_firmware(struct wl1251 *wl); 31int wl1251_boot_run_firmware(struct wl1251 *wl);
32void wl1251_boot_target_enable_interrupts(struct wl1251 *wl); 32void wl1251_boot_target_enable_interrupts(struct wl1251 *wl);
33int wl1251_boot(struct wl1251 *wl);
33 34
34/* number of times we try to read the INIT interrupt */ 35/* number of times we try to read the INIT interrupt */
35#define INIT_LOOP 20000 36#define INIT_LOOP 20000
diff --git a/drivers/net/wireless/wl12xx/wl1251_cmd.c b/drivers/net/wireless/wl12xx/wl1251_cmd.c
index dfbf6811976..53f5da65bcb 100644
--- a/drivers/net/wireless/wl12xx/wl1251_cmd.c
+++ b/drivers/net/wireless/wl12xx/wl1251_cmd.c
@@ -37,7 +37,7 @@ int wl1251_cmd_send(struct wl1251 *wl, u16 id, void *buf, size_t len)
37 timeout = jiffies + msecs_to_jiffies(WL1251_COMMAND_TIMEOUT); 37 timeout = jiffies + msecs_to_jiffies(WL1251_COMMAND_TIMEOUT);
38 38
39 intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR); 39 intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
40 while (!(intr & wl->chip.intr_cmd_complete)) { 40 while (!(intr & WL1251_ACX_INTR_CMD_COMPLETE)) {
41 if (time_after(jiffies, timeout)) { 41 if (time_after(jiffies, timeout)) {
42 wl1251_error("command complete timeout"); 42 wl1251_error("command complete timeout");
43 ret = -ETIMEDOUT; 43 ret = -ETIMEDOUT;
@@ -50,7 +50,7 @@ int wl1251_cmd_send(struct wl1251 *wl, u16 id, void *buf, size_t len)
50 } 50 }
51 51
52 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_ACK, 52 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_ACK,
53 wl->chip.intr_cmd_complete); 53 WL1251_ACX_INTR_CMD_COMPLETE);
54 54
55out: 55out:
56 return ret; 56 return ret;
diff --git a/drivers/net/wireless/wl12xx/wl1251_init.c b/drivers/net/wireless/wl12xx/wl1251_init.c
index df6c60f0fd6..1c587eceacc 100644
--- a/drivers/net/wireless/wl12xx/wl1251_init.c
+++ b/drivers/net/wireless/wl12xx/wl1251_init.c
@@ -28,6 +28,7 @@
28#include "wl12xx_80211.h" 28#include "wl12xx_80211.h"
29#include "wl1251_acx.h" 29#include "wl1251_acx.h"
30#include "wl1251_cmd.h" 30#include "wl1251_cmd.h"
31#include "reg.h"
31 32
32int wl1251_hw_init_hwenc_config(struct wl1251 *wl) 33int wl1251_hw_init_hwenc_config(struct wl1251 *wl)
33{ 34{
@@ -198,3 +199,215 @@ int wl1251_hw_init_power_auth(struct wl1251 *wl)
198{ 199{
199 return wl1251_acx_sleep_auth(wl, WL1251_PSM_CAM); 200 return wl1251_acx_sleep_auth(wl, WL1251_PSM_CAM);
200} 201}
202
203int wl1251_hw_init_mem_config(struct wl1251 *wl)
204{
205 int ret;
206
207 ret = wl1251_acx_mem_cfg(wl);
208 if (ret < 0)
209 return ret;
210
211 wl->target_mem_map = kzalloc(sizeof(struct wl1251_acx_mem_map),
212 GFP_KERNEL);
213 if (!wl->target_mem_map) {
214 wl1251_error("couldn't allocate target memory map");
215 return -ENOMEM;
216 }
217
218 /* we now ask for the firmware built memory map */
219 ret = wl1251_acx_mem_map(wl, wl->target_mem_map,
220 sizeof(struct wl1251_acx_mem_map));
221 if (ret < 0) {
222 wl1251_error("couldn't retrieve firmware memory map");
223 kfree(wl->target_mem_map);
224 wl->target_mem_map = NULL;
225 return ret;
226 }
227
228 return 0;
229}
230
231static int wl1251_hw_init_txq_fill(u8 qid,
232 struct acx_tx_queue_qos_config *config,
233 u32 num_blocks)
234{
235 config->qid = qid;
236
237 switch (qid) {
238 case QOS_AC_BE:
239 config->high_threshold =
240 (QOS_TX_HIGH_BE_DEF * num_blocks) / 100;
241 config->low_threshold =
242 (QOS_TX_LOW_BE_DEF * num_blocks) / 100;
243 break;
244 case QOS_AC_BK:
245 config->high_threshold =
246 (QOS_TX_HIGH_BK_DEF * num_blocks) / 100;
247 config->low_threshold =
248 (QOS_TX_LOW_BK_DEF * num_blocks) / 100;
249 break;
250 case QOS_AC_VI:
251 config->high_threshold =
252 (QOS_TX_HIGH_VI_DEF * num_blocks) / 100;
253 config->low_threshold =
254 (QOS_TX_LOW_VI_DEF * num_blocks) / 100;
255 break;
256 case QOS_AC_VO:
257 config->high_threshold =
258 (QOS_TX_HIGH_VO_DEF * num_blocks) / 100;
259 config->low_threshold =
260 (QOS_TX_LOW_VO_DEF * num_blocks) / 100;
261 break;
262 default:
263 wl1251_error("Invalid TX queue id: %d", qid);
264 return -EINVAL;
265 }
266
267 return 0;
268}
269
270static int wl1251_hw_init_tx_queue_config(struct wl1251 *wl)
271{
272 struct acx_tx_queue_qos_config *config;
273 struct wl1251_acx_mem_map *wl_mem_map = wl->target_mem_map;
274 int ret, i;
275
276 wl1251_debug(DEBUG_ACX, "acx tx queue config");
277
278 config = kzalloc(sizeof(*config), GFP_KERNEL);
279 if (!config) {
280 ret = -ENOMEM;
281 goto out;
282 }
283
284 for (i = 0; i < MAX_NUM_OF_AC; i++) {
285 ret = wl1251_hw_init_txq_fill(i, config,
286 wl_mem_map->num_tx_mem_blocks);
287 if (ret < 0)
288 goto out;
289
290 ret = wl1251_cmd_configure(wl, ACX_TX_QUEUE_CFG,
291 config, sizeof(*config));
292 if (ret < 0)
293 goto out;
294 }
295
296out:
297 kfree(config);
298 return ret;
299}
300
301static int wl1251_hw_init_data_path_config(struct wl1251 *wl)
302{
303 int ret;
304
305 /* asking for the data path parameters */
306 wl->data_path = kzalloc(sizeof(struct acx_data_path_params_resp),
307 GFP_KERNEL);
308 if (!wl->data_path) {
309 wl1251_error("Couldnt allocate data path parameters");
310 return -ENOMEM;
311 }
312
313 ret = wl1251_acx_data_path_params(wl, wl->data_path);
314 if (ret < 0) {
315 kfree(wl->data_path);
316 wl->data_path = NULL;
317 return ret;
318 }
319
320 return 0;
321}
322
323
324int wl1251_hw_init(struct wl1251 *wl)
325{
326 struct wl1251_acx_mem_map *wl_mem_map;
327 int ret;
328
329 ret = wl1251_hw_init_hwenc_config(wl);
330 if (ret < 0)
331 return ret;
332
333 /* Template settings */
334 ret = wl1251_hw_init_templates_config(wl);
335 if (ret < 0)
336 return ret;
337
338 /* Default memory configuration */
339 ret = wl1251_hw_init_mem_config(wl);
340 if (ret < 0)
341 return ret;
342
343 /* Default data path configuration */
344 ret = wl1251_hw_init_data_path_config(wl);
345 if (ret < 0)
346 goto out_free_memmap;
347
348 /* RX config */
349 ret = wl1251_hw_init_rx_config(wl,
350 RX_CFG_PROMISCUOUS | RX_CFG_TSF,
351 RX_FILTER_OPTION_DEF);
352 /* RX_CONFIG_OPTION_ANY_DST_ANY_BSS,
353 RX_FILTER_OPTION_FILTER_ALL); */
354 if (ret < 0)
355 goto out_free_data_path;
356
357 /* TX queues config */
358 ret = wl1251_hw_init_tx_queue_config(wl);
359 if (ret < 0)
360 goto out_free_data_path;
361
362 /* PHY layer config */
363 ret = wl1251_hw_init_phy_config(wl);
364 if (ret < 0)
365 goto out_free_data_path;
366
367 /* Beacon filtering */
368 ret = wl1251_hw_init_beacon_filter(wl);
369 if (ret < 0)
370 goto out_free_data_path;
371
372 /* Bluetooth WLAN coexistence */
373 ret = wl1251_hw_init_pta(wl);
374 if (ret < 0)
375 goto out_free_data_path;
376
377 /* Energy detection */
378 ret = wl1251_hw_init_energy_detection(wl);
379 if (ret < 0)
380 goto out_free_data_path;
381
382 /* Beacons and boradcast settings */
383 ret = wl1251_hw_init_beacon_broadcast(wl);
384 if (ret < 0)
385 goto out_free_data_path;
386
387 /* Enable data path */
388 ret = wl1251_cmd_data_path(wl, wl->channel, 1);
389 if (ret < 0)
390 goto out_free_data_path;
391
392 /* Default power state */
393 ret = wl1251_hw_init_power_auth(wl);
394 if (ret < 0)
395 goto out_free_data_path;
396
397 wl_mem_map = wl->target_mem_map;
398 wl1251_info("%d tx blocks at 0x%x, %d rx blocks at 0x%x",
399 wl_mem_map->num_tx_mem_blocks,
400 wl->data_path->tx_control_addr,
401 wl_mem_map->num_rx_mem_blocks,
402 wl->data_path->rx_control_addr);
403
404 return 0;
405
406 out_free_data_path:
407 kfree(wl->data_path);
408
409 out_free_memmap:
410 kfree(wl->target_mem_map);
411
412 return ret;
413}
diff --git a/drivers/net/wireless/wl12xx/wl1251_init.h b/drivers/net/wireless/wl12xx/wl1251_init.h
index 8596188e834..b3b25ec885e 100644
--- a/drivers/net/wireless/wl12xx/wl1251_init.h
+++ b/drivers/net/wireless/wl12xx/wl1251_init.h
@@ -35,5 +35,7 @@ int wl1251_hw_init_pta(struct wl1251 *wl);
35int wl1251_hw_init_energy_detection(struct wl1251 *wl); 35int wl1251_hw_init_energy_detection(struct wl1251 *wl);
36int wl1251_hw_init_beacon_broadcast(struct wl1251 *wl); 36int wl1251_hw_init_beacon_broadcast(struct wl1251 *wl);
37int wl1251_hw_init_power_auth(struct wl1251 *wl); 37int wl1251_hw_init_power_auth(struct wl1251 *wl);
38int wl1251_hw_init_mem_config(struct wl1251 *wl);
39int wl1251_hw_init(struct wl1251 *wl);
38 40
39#endif 41#endif
diff --git a/drivers/net/wireless/wl12xx/wl1251_io.c b/drivers/net/wireless/wl12xx/wl1251_io.c
index db2cfbfb1e4..04e486c275c 100644
--- a/drivers/net/wireless/wl12xx/wl1251_io.c
+++ b/drivers/net/wireless/wl12xx/wl1251_io.c
@@ -25,6 +25,21 @@
25#include "reg.h" 25#include "reg.h"
26#include "wl1251_io.h" 26#include "wl1251_io.h"
27 27
28/* FIXME: this is static data nowadays and the table can be removed */
29static enum wl12xx_acx_int_reg wl1251_io_reg_table[ACX_REG_TABLE_LEN] = {
30 [ACX_REG_INTERRUPT_TRIG] = (REGISTERS_BASE + 0x0474),
31 [ACX_REG_INTERRUPT_TRIG_H] = (REGISTERS_BASE + 0x0478),
32 [ACX_REG_INTERRUPT_MASK] = (REGISTERS_BASE + 0x0494),
33 [ACX_REG_HINT_MASK_SET] = (REGISTERS_BASE + 0x0498),
34 [ACX_REG_HINT_MASK_CLR] = (REGISTERS_BASE + 0x049C),
35 [ACX_REG_INTERRUPT_NO_CLEAR] = (REGISTERS_BASE + 0x04B0),
36 [ACX_REG_INTERRUPT_CLEAR] = (REGISTERS_BASE + 0x04A4),
37 [ACX_REG_INTERRUPT_ACK] = (REGISTERS_BASE + 0x04A8),
38 [ACX_REG_SLV_SOFT_RESET] = (REGISTERS_BASE + 0x0000),
39 [ACX_REG_EE_START] = (REGISTERS_BASE + 0x080C),
40 [ACX_REG_ECPU_CONTROL] = (REGISTERS_BASE + 0x0804)
41};
42
28static int wl1251_translate_reg_addr(struct wl1251 *wl, int addr) 43static int wl1251_translate_reg_addr(struct wl1251 *wl, int addr)
29{ 44{
30 /* If the address is lower than REGISTERS_BASE, it means that this is 45 /* If the address is lower than REGISTERS_BASE, it means that this is
@@ -36,7 +51,7 @@ static int wl1251_translate_reg_addr(struct wl1251 *wl, int addr)
36 wl1251_error("address out of range (%d)", addr); 51 wl1251_error("address out of range (%d)", addr);
37 return -EINVAL; 52 return -EINVAL;
38 } 53 }
39 addr = wl->chip.acx_reg_table[addr]; 54 addr = wl1251_io_reg_table[addr];
40 } 55 }
41 56
42 return addr - wl->physical_reg_addr + wl->virtual_reg_addr; 57 return addr - wl->physical_reg_addr + wl->virtual_reg_addr;
diff --git a/drivers/net/wireless/wl12xx/wl1251_main.c b/drivers/net/wireless/wl12xx/wl1251_main.c
index 4c1aad33fb5..8c88fe279ec 100644
--- a/drivers/net/wireless/wl12xx/wl1251_main.c
+++ b/drivers/net/wireless/wl12xx/wl1251_main.c
@@ -32,7 +32,6 @@
32#include "wl1251.h" 32#include "wl1251.h"
33#include "wl12xx_80211.h" 33#include "wl12xx_80211.h"
34#include "reg.h" 34#include "reg.h"
35#include "wl1251_ops.h"
36#include "wl1251_io.h" 35#include "wl1251_io.h"
37#include "wl1251_cmd.h" 36#include "wl1251_cmd.h"
38#include "wl1251_event.h" 37#include "wl1251_event.h"
@@ -41,6 +40,7 @@
41#include "wl1251_ps.h" 40#include "wl1251_ps.h"
42#include "wl1251_init.h" 41#include "wl1251_init.h"
43#include "wl1251_debugfs.h" 42#include "wl1251_debugfs.h"
43#include "wl1251_boot.h"
44 44
45void wl1251_enable_interrupts(struct wl1251 *wl) 45void wl1251_enable_interrupts(struct wl1251 *wl)
46{ 46{
@@ -68,7 +68,7 @@ static int wl1251_fetch_firmware(struct wl1251 *wl)
68 struct device *dev = wiphy_dev(wl->hw->wiphy); 68 struct device *dev = wiphy_dev(wl->hw->wiphy);
69 int ret; 69 int ret;
70 70
71 ret = request_firmware(&fw, wl->chip.fw_filename, dev); 71 ret = request_firmware(&fw, WL1251_FW_NAME, dev);
72 72
73 if (ret < 0) { 73 if (ret < 0) {
74 wl1251_error("could not get firmware: %d", ret); 74 wl1251_error("could not get firmware: %d", ret);
@@ -107,7 +107,7 @@ static int wl1251_fetch_nvs(struct wl1251 *wl)
107 struct device *dev = wiphy_dev(wl->hw->wiphy); 107 struct device *dev = wiphy_dev(wl->hw->wiphy);
108 int ret; 108 int ret;
109 109
110 ret = request_firmware(&fw, wl->chip.nvs_filename, dev); 110 ret = request_firmware(&fw, WL1251_NVS_NAME, dev);
111 111
112 if (ret < 0) { 112 if (ret < 0) {
113 wl1251_error("could not get nvs file: %d", ret); 113 wl1251_error("could not get nvs file: %d", ret);
@@ -157,7 +157,7 @@ static int wl1251_chip_wakeup(struct wl1251 *wl)
157 int ret = 0; 157 int ret = 0;
158 158
159 wl1251_power_on(wl); 159 wl1251_power_on(wl);
160 msleep(wl->chip.power_on_sleep); 160 msleep(WL1251_POWER_ON_SLEEP);
161 wl->if_ops->reset(wl); 161 wl->if_ops->reset(wl);
162 162
163 /* We don't need a real memory partition here, because we only want 163 /* We don't need a real memory partition here, because we only want
@@ -174,22 +174,19 @@ static int wl1251_chip_wakeup(struct wl1251 *wl)
174 /* whal_FwCtrl_BootSm() */ 174 /* whal_FwCtrl_BootSm() */
175 175
176 /* 0. read chip id from CHIP_ID */ 176 /* 0. read chip id from CHIP_ID */
177 wl->chip.id = wl1251_reg_read32(wl, CHIP_ID_B); 177 wl->chip_id = wl1251_reg_read32(wl, CHIP_ID_B);
178 178
179 /* 1. check if chip id is valid */ 179 /* 1. check if chip id is valid */
180 180
181 switch (wl->chip.id) { 181 switch (wl->chip_id) {
182 case CHIP_ID_1251_PG12: 182 case CHIP_ID_1251_PG12:
183 wl1251_debug(DEBUG_BOOT, "chip id 0x%x (1251 PG12)", 183 wl1251_debug(DEBUG_BOOT, "chip id 0x%x (1251 PG12)",
184 wl->chip.id); 184 wl->chip_id);
185
186 wl1251_setup(wl);
187
188 break; 185 break;
189 case CHIP_ID_1251_PG10: 186 case CHIP_ID_1251_PG10:
190 case CHIP_ID_1251_PG11: 187 case CHIP_ID_1251_PG11:
191 default: 188 default:
192 wl1251_error("unsupported chip id: 0x%x", wl->chip.id); 189 wl1251_error("unsupported chip id: 0x%x", wl->chip_id);
193 ret = -ENODEV; 190 ret = -ENODEV;
194 goto out; 191 goto out;
195 } 192 }
@@ -211,6 +208,107 @@ out:
211 return ret; 208 return ret;
212} 209}
213 210
211static void wl1251_irq_work(struct work_struct *work)
212{
213 u32 intr;
214 struct wl1251 *wl =
215 container_of(work, struct wl1251, irq_work);
216 int ret;
217
218 mutex_lock(&wl->mutex);
219
220 wl1251_debug(DEBUG_IRQ, "IRQ work");
221
222 if (wl->state == WL1251_STATE_OFF)
223 goto out;
224
225 ret = wl1251_ps_elp_wakeup(wl);
226 if (ret < 0)
227 goto out;
228
229 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, WL1251_ACX_INTR_ALL);
230
231 intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);
232 wl1251_debug(DEBUG_IRQ, "intr: 0x%x", intr);
233
234 if (wl->data_path) {
235 wl->rx_counter =
236 wl1251_mem_read32(wl, wl->data_path->rx_control_addr);
237
238 /* We handle a frmware bug here */
239 switch ((wl->rx_counter - wl->rx_handled) & 0xf) {
240 case 0:
241 wl1251_debug(DEBUG_IRQ, "RX: FW and host in sync");
242 intr &= ~WL1251_ACX_INTR_RX0_DATA;
243 intr &= ~WL1251_ACX_INTR_RX1_DATA;
244 break;
245 case 1:
246 wl1251_debug(DEBUG_IRQ, "RX: FW +1");
247 intr |= WL1251_ACX_INTR_RX0_DATA;
248 intr &= ~WL1251_ACX_INTR_RX1_DATA;
249 break;
250 case 2:
251 wl1251_debug(DEBUG_IRQ, "RX: FW +2");
252 intr |= WL1251_ACX_INTR_RX0_DATA;
253 intr |= WL1251_ACX_INTR_RX1_DATA;
254 break;
255 default:
256 wl1251_warning("RX: FW and host out of sync: %d",
257 wl->rx_counter - wl->rx_handled);
258 break;
259 }
260
261 wl->rx_handled = wl->rx_counter;
262
263
264 wl1251_debug(DEBUG_IRQ, "RX counter: %d", wl->rx_counter);
265 }
266
267 intr &= wl->intr_mask;
268
269 if (intr == 0) {
270 wl1251_debug(DEBUG_IRQ, "INTR is 0");
271 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK,
272 ~(wl->intr_mask));
273
274 goto out_sleep;
275 }
276
277 if (intr & WL1251_ACX_INTR_RX0_DATA) {
278 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX0_DATA");
279 wl1251_rx(wl);
280 }
281
282 if (intr & WL1251_ACX_INTR_RX1_DATA) {
283 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX1_DATA");
284 wl1251_rx(wl);
285 }
286
287 if (intr & WL1251_ACX_INTR_TX_RESULT) {
288 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_TX_RESULT");
289 wl1251_tx_complete(wl);
290 }
291
292 if (intr & (WL1251_ACX_INTR_EVENT_A | WL1251_ACX_INTR_EVENT_B)) {
293 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_EVENT (0x%x)", intr);
294 if (intr & WL1251_ACX_INTR_EVENT_A)
295 wl1251_event_handle(wl, 0);
296 else
297 wl1251_event_handle(wl, 1);
298 }
299
300 if (intr & WL1251_ACX_INTR_INIT_COMPLETE)
301 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_INIT_COMPLETE");
302
303 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));
304
305out_sleep:
306 wl1251_ps_elp_sleep(wl);
307
308out:
309 mutex_unlock(&wl->mutex);
310}
311
214static void wl1251_filter_work(struct work_struct *work) 312static void wl1251_filter_work(struct work_struct *work)
215{ 313{
216 struct wl1251 *wl = 314 struct wl1251 *wl =
@@ -227,7 +325,7 @@ static void wl1251_filter_work(struct work_struct *work)
227 goto out; 325 goto out;
228 326
229 /* FIXME: replace the magic numbers with proper definitions */ 327 /* FIXME: replace the magic numbers with proper definitions */
230 ret = wl->chip.op_cmd_join(wl, wl->bss_type, 1, 100, 0); 328 ret = wl1251_cmd_join(wl, wl->bss_type, 1, 100, 0);
231 if (ret < 0) 329 if (ret < 0)
232 goto out_sleep; 330 goto out_sleep;
233 331
@@ -289,11 +387,11 @@ static int wl1251_op_start(struct ieee80211_hw *hw)
289 if (ret < 0) 387 if (ret < 0)
290 goto out; 388 goto out;
291 389
292 ret = wl->chip.op_boot(wl); 390 ret = wl1251_boot(wl);
293 if (ret < 0) 391 if (ret < 0)
294 goto out; 392 goto out;
295 393
296 ret = wl->chip.op_hw_init(wl); 394 ret = wl1251_hw_init(wl);
297 if (ret < 0) 395 if (ret < 0)
298 goto out; 396 goto out;
299 397
@@ -303,7 +401,7 @@ static int wl1251_op_start(struct ieee80211_hw *hw)
303 401
304 wl->state = WL1251_STATE_ON; 402 wl->state = WL1251_STATE_ON;
305 403
306 wl1251_info("firmware booted (%s)", wl->chip.fw_ver); 404 wl1251_info("firmware booted (%s)", wl->fw_ver);
307 405
308out: 406out:
309 if (ret < 0) 407 if (ret < 0)
@@ -346,7 +444,7 @@ static void wl1251_op_stop(struct ieee80211_hw *hw)
346 mutex_lock(&wl->mutex); 444 mutex_lock(&wl->mutex);
347 445
348 /* let's notify MAC80211 about the remaining pending TX frames */ 446 /* let's notify MAC80211 about the remaining pending TX frames */
349 wl->chip.op_tx_flush(wl); 447 wl1251_tx_flush(wl);
350 wl1251_power_off(wl); 448 wl1251_power_off(wl);
351 449
352 memset(wl->bssid, 0, ETH_ALEN); 450 memset(wl->bssid, 0, ETH_ALEN);
@@ -467,7 +565,7 @@ static int wl1251_op_config(struct ieee80211_hw *hw, u32 changed)
467 565
468 if (channel != wl->channel) { 566 if (channel != wl->channel) {
469 /* FIXME: use beacon interval provided by mac80211 */ 567 /* FIXME: use beacon interval provided by mac80211 */
470 ret = wl->chip.op_cmd_join(wl, wl->bss_type, 1, 100, 0); 568 ret = wl1251_cmd_join(wl, wl->bss_type, 1, 100, 0);
471 if (ret < 0) 569 if (ret < 0)
472 goto out_sleep; 570 goto out_sleep;
473 571
@@ -1041,7 +1139,7 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw,
1041 if (ret < 0) 1139 if (ret < 0)
1042 goto out; 1140 goto out;
1043 1141
1044 ret = wl->chip.op_cmd_join(wl, wl->bss_type, 1, 100, 0); 1142 ret = wl1251_cmd_join(wl, wl->bss_type, 1, 100, 0);
1045 1143
1046 if (ret < 0) 1144 if (ret < 0)
1047 goto out; 1145 goto out;
@@ -1232,15 +1330,14 @@ struct ieee80211_hw *wl1251_alloc_hw(void)
1232 wl->tx_queue_stopped = false; 1330 wl->tx_queue_stopped = false;
1233 wl->power_level = WL1251_DEFAULT_POWER_LEVEL; 1331 wl->power_level = WL1251_DEFAULT_POWER_LEVEL;
1234 1332
1235 /* We use the default power on sleep time until we know which chip
1236 * we're using */
1237 wl->chip.power_on_sleep = WL1251_DEFAULT_POWER_ON_SLEEP;
1238
1239 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++) 1333 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++)
1240 wl->tx_frames[i] = NULL; 1334 wl->tx_frames[i] = NULL;
1241 1335
1242 wl->next_tx_complete = 0; 1336 wl->next_tx_complete = 0;
1243 1337
1338 INIT_WORK(&wl->irq_work, wl1251_irq_work);
1339 INIT_WORK(&wl->tx_work, wl1251_tx_work);
1340
1244 /* 1341 /*
1245 * In case our MAC address is not correctly set, 1342 * In case our MAC address is not correctly set,
1246 * we use a random but Nokia MAC. 1343 * we use a random but Nokia MAC.
diff --git a/drivers/net/wireless/wl12xx/wl1251_ops.h b/drivers/net/wireless/wl12xx/wl1251_ops.h
deleted file mode 100644
index 68183c472e4..00000000000
--- a/drivers/net/wireless/wl12xx/wl1251_ops.h
+++ /dev/null
@@ -1,165 +0,0 @@
1/*
2 * This file is part of wl1251
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#ifndef __WL1251_OPS_H__
25#define __WL1251_OPS_H__
26
27#include <linux/bitops.h>
28
29#include "wl1251.h"
30#include "wl1251_acx.h"
31
32#define WL1251_FW_NAME "wl1251-fw.bin"
33#define WL1251_NVS_NAME "wl1251-nvs.bin"
34
35#define WL1251_POWER_ON_SLEEP 10 /* in miliseconds */
36
37void wl1251_setup(struct wl1251 *wl);
38
39
40struct wl1251_acx_memory {
41 __le16 num_stations; /* number of STAs to be supported. */
42 u16 reserved_1;
43
44 /*
45 * Nmber of memory buffers for the RX mem pool.
46 * The actual number may be less if there are
47 * not enough blocks left for the minimum num
48 * of TX ones.
49 */
50 u8 rx_mem_block_num;
51 u8 reserved_2;
52 u8 num_tx_queues; /* From 1 to 16 */
53 u8 host_if_options; /* HOST_IF* */
54 u8 tx_min_mem_block_num;
55 u8 num_ssid_profiles;
56 __le16 debug_buffer_size;
57} __attribute__ ((packed));
58
59
60#define ACX_RX_DESC_MIN 1
61#define ACX_RX_DESC_MAX 127
62#define ACX_RX_DESC_DEF 32
63struct wl1251_acx_rx_queue_config {
64 u8 num_descs;
65 u8 pad;
66 u8 type;
67 u8 priority;
68 __le32 dma_address;
69} __attribute__ ((packed));
70
71#define ACX_TX_DESC_MIN 1
72#define ACX_TX_DESC_MAX 127
73#define ACX_TX_DESC_DEF 16
74struct wl1251_acx_tx_queue_config {
75 u8 num_descs;
76 u8 pad[2];
77 u8 attributes;
78} __attribute__ ((packed));
79
80#define MAX_TX_QUEUE_CONFIGS 5
81#define MAX_TX_QUEUES 4
82struct wl1251_acx_config_memory {
83 struct acx_header header;
84
85 struct wl1251_acx_memory mem_config;
86 struct wl1251_acx_rx_queue_config rx_queue_config;
87 struct wl1251_acx_tx_queue_config tx_queue_config[MAX_TX_QUEUE_CONFIGS];
88} __attribute__ ((packed));
89
90struct wl1251_acx_mem_map {
91 struct acx_header header;
92
93 void *code_start;
94 void *code_end;
95
96 void *wep_defkey_start;
97 void *wep_defkey_end;
98
99 void *sta_table_start;
100 void *sta_table_end;
101
102 void *packet_template_start;
103 void *packet_template_end;
104
105 void *queue_memory_start;
106 void *queue_memory_end;
107
108 void *packet_memory_pool_start;
109 void *packet_memory_pool_end;
110
111 void *debug_buffer1_start;
112 void *debug_buffer1_end;
113
114 void *debug_buffer2_start;
115 void *debug_buffer2_end;
116
117 /* Number of blocks FW allocated for TX packets */
118 u32 num_tx_mem_blocks;
119
120 /* Number of blocks FW allocated for RX packets */
121 u32 num_rx_mem_blocks;
122} __attribute__ ((packed));
123
124/*************************************************************************
125
126 Host Interrupt Register (WiLink -> Host)
127
128**************************************************************************/
129
130/* RX packet is ready in Xfer buffer #0 */
131#define WL1251_ACX_INTR_RX0_DATA BIT(0)
132
133/* TX result(s) are in the TX complete buffer */
134#define WL1251_ACX_INTR_TX_RESULT BIT(1)
135
136/* OBSOLETE */
137#define WL1251_ACX_INTR_TX_XFR BIT(2)
138
139/* RX packet is ready in Xfer buffer #1 */
140#define WL1251_ACX_INTR_RX1_DATA BIT(3)
141
142/* Event was entered to Event MBOX #A */
143#define WL1251_ACX_INTR_EVENT_A BIT(4)
144
145/* Event was entered to Event MBOX #B */
146#define WL1251_ACX_INTR_EVENT_B BIT(5)
147
148/* OBSOLETE */
149#define WL1251_ACX_INTR_WAKE_ON_HOST BIT(6)
150
151/* Trace meassge on MBOX #A */
152#define WL1251_ACX_INTR_TRACE_A BIT(7)
153
154/* Trace meassge on MBOX #B */
155#define WL1251_ACX_INTR_TRACE_B BIT(8)
156
157/* Command processing completion */
158#define WL1251_ACX_INTR_CMD_COMPLETE BIT(9)
159
160/* Init sequence is done */
161#define WL1251_ACX_INTR_INIT_COMPLETE BIT(14)
162
163#define WL1251_ACX_INTR_ALL 0xFFFFFFFF
164
165#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-18 19:41:06 -0400