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authorJohannes Berg <johannes@sipsolutions.net>2008-01-24 13:38:38 -0500
committerJohn W. Linville <linville@tuxdriver.com>2008-02-29 15:19:32 -0500
commit8318d78a44d49ac1edf2bdec7299de3617c4232e (patch)
treed434634418edd7399737801615d247be06616fdd /drivers/net/wireless/rt2x00/rt61pci.c
parent10b6b80145cc93887dd8aab99bfffa375e9add31 (diff)
cfg80211 API for channels/bitrates, mac80211 and driver conversion
This patch creates new cfg80211 wiphy API for channel and bitrate registration and converts mac80211 and drivers to the new API. The old mac80211 API is completely ripped out. All drivers (except ath5k) are updated to the new API, in many cases I expect that optimisations can be done. Along with the regulatory code I've also ripped out the IEEE80211_HW_DEFAULT_REG_DOMAIN_CONFIGURED flag, I believe it to be unnecessary if the hardware simply gives us whatever channels it wants to support and we then enable/disable them as required, which is pretty much required for travelling. Additionally, the patch adds proper "basic" rate handling for STA mode interface, AP mode interface will have to have new API added to allow userspace to set the basic rate set, currently it'll be empty... However, the basic rate handling will need to be moved to the BSS conf stuff. I do expect there to be bugs in this, especially wrt. transmit power handling where I'm basically clueless about how it should work. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c23
1 files changed, 12 insertions, 11 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 59e87a1d96a..1dd30510ed1 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -426,12 +426,12 @@ static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
426 case ANTENNA_HW_DIVERSITY: 426 case ANTENNA_HW_DIVERSITY:
427 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2); 427 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
428 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 428 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
429 (rt2x00dev->curr_hwmode != HWMODE_A)); 429 (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ));
430 break; 430 break;
431 case ANTENNA_A: 431 case ANTENNA_A:
432 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1); 432 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
433 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0); 433 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
434 if (rt2x00dev->curr_hwmode == HWMODE_A) 434 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
435 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0); 435 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
436 else 436 else
437 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3); 437 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
@@ -446,7 +446,7 @@ static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
446 case ANTENNA_B: 446 case ANTENNA_B:
447 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1); 447 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
448 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0); 448 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
449 if (rt2x00dev->curr_hwmode == HWMODE_A) 449 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
450 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3); 450 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
451 else 451 else
452 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0); 452 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
@@ -602,7 +602,7 @@ static void rt61pci_config_antenna(struct rt2x00_dev *rt2x00dev,
602 unsigned int i; 602 unsigned int i;
603 u32 reg; 603 u32 reg;
604 604
605 if (rt2x00dev->curr_hwmode == HWMODE_A) { 605 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
606 sel = antenna_sel_a; 606 sel = antenna_sel_a;
607 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags); 607 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
608 } else { 608 } else {
@@ -616,10 +616,9 @@ static void rt61pci_config_antenna(struct rt2x00_dev *rt2x00dev,
616 rt2x00pci_register_read(rt2x00dev, PHY_CSR0, &reg); 616 rt2x00pci_register_read(rt2x00dev, PHY_CSR0, &reg);
617 617
618 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 618 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
619 (rt2x00dev->curr_hwmode == HWMODE_B || 619 rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
620 rt2x00dev->curr_hwmode == HWMODE_G));
621 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 620 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
622 (rt2x00dev->curr_hwmode == HWMODE_A)); 621 rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
623 622
624 rt2x00pci_register_write(rt2x00dev, PHY_CSR0, reg); 623 rt2x00pci_register_write(rt2x00dev, PHY_CSR0, reg);
625 624
@@ -698,9 +697,9 @@ static void rt61pci_enable_led(struct rt2x00_dev *rt2x00dev)
698 697
699 rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1); 698 rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
700 rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 699 rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS,
701 (rt2x00dev->rx_status.phymode == MODE_IEEE80211A)); 700 rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ);
702 rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 701 rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS,
703 (rt2x00dev->rx_status.phymode != MODE_IEEE80211A)); 702 rt2x00dev->rx_status.band != IEEE80211_BAND_5GHZ);
704 703
705 arg0 = rt2x00dev->led_reg & 0xff; 704 arg0 = rt2x00dev->led_reg & 0xff;
706 arg1 = (rt2x00dev->led_reg >> 8) & 0xff; 705 arg1 = (rt2x00dev->led_reg >> 8) & 0xff;
@@ -798,7 +797,7 @@ static void rt61pci_link_tuner(struct rt2x00_dev *rt2x00dev)
798 /* 797 /*
799 * Determine r17 bounds. 798 * Determine r17 bounds.
800 */ 799 */
801 if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) { 800 if (rt2x00dev->rx_status.band == IEEE80211_BAND_2GHZ) {
802 low_bound = 0x28; 801 low_bound = 0x28;
803 up_bound = 0x48; 802 up_bound = 0x48;
804 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) { 803 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
@@ -1544,8 +1543,10 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1544 rt2x00_desc_write(txd, 2, word); 1543 rt2x00_desc_write(txd, 2, word);
1545 1544
1546 rt2x00_desc_read(txd, 5, &word); 1545 rt2x00_desc_read(txd, 5, &word);
1546/* XXX: removed for now
1547 rt2x00_set_field32(&word, TXD_W5_TX_POWER, 1547 rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1548 TXPOWER_TO_DEV(control->power_level)); 1548 TXPOWER_TO_DEV(control->power_level));
1549 */
1549 rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1); 1550 rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1550 rt2x00_desc_write(txd, 5, word); 1551 rt2x00_desc_write(txd, 5, word);
1551 1552
@@ -1637,7 +1638,7 @@ static int rt61pci_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1637 return 0; 1638 return 0;
1638 } 1639 }
1639 1640
1640 if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) { 1641 if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1641 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) 1642 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
1642 offset += 14; 1643 offset += 14;
1643 1644