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authorShanyu Zhao <shanyu.zhao@intel.com>2010-03-16 13:22:26 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-03-30 15:37:31 -0400
commit48a6be6a0dd3982bb2d48e82b3e6f5458d9f3c63 (patch)
tree8980ff473c9d1bb56728517fe2e51b4369a5cd35 /drivers/net/wireless/iwlwifi/iwl-agn.c
parentbe6b38bcb175613f239e0b302607db346472c6b6 (diff)
iwlwifi: clear unattended interrupts in tasklet
Previously in interrupt handling tasklet, iwlwifi driver only clear/ack those interrupts that are enabled by the driver through inta_mask. If the hardware generates unattended interrupts, driver will not ack them, defeating the interrupt coalescing feature. This results in high number of interrupts per second and high CPU utilization. This patch addresses this issue by acking those unattended interrupts in the tasklet. Local test showed an order of magnitude improvement in terms of the number of interrupts without sacrificing networking throughput. This is a workaround for hardware issue. Signed-off-by: Shanyu Zhao <shanyu.zhao@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-agn.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index c8e2e3a42b4..e4c2e1e448a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1258,7 +1258,15 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1258 /* Ack/clear/reset pending uCode interrupts. 1258 /* Ack/clear/reset pending uCode interrupts.
1259 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1259 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1260 */ 1260 */
1261 iwl_write32(priv, CSR_INT, priv->inta); 1261 /* There is a hardware bug in the interrupt mask function that some
1262 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1263 * they are disabled in the CSR_INT_MASK register. Furthermore the
1264 * ICT interrupt handling mechanism has another bug that might cause
1265 * these unmasked interrupts fail to be detected. We workaround the
1266 * hardware bugs here by ACKing all the possible interrupts so that
1267 * interrupt coalescing can still be achieved.
1268 */
1269 iwl_write32(priv, CSR_INT, priv->inta | ~priv->inta_mask);
1262 1270
1263 inta = priv->inta; 1271 inta = priv->inta;
1264 1272