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authorTomas Winkler <tomas.winkler@intel.com>2008-04-23 20:14:53 -0400
committerJohn W. Linville <linville@tuxdriver.com>2008-05-07 15:02:17 -0400
commit91238714affef7603446207ad03a594d95d2eb9d (patch)
tree533e87b3331e71b7c3d708eecbf48ade3872cc4a /drivers/net/wireless/iwlwifi/iwl-4965.c
parentfde0db310fd4979e0d8e6ba009975d23cc7e65ac (diff)
iwlwifi: add apm init handler
This patch add apm init handler to iwlcore handler Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-4965.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965.c93
1 files changed, 48 insertions, 45 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c
index 2c5bfa4f048..b8c72159b59 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965.c
+++ b/drivers/net/wireless/iwlwifi/iwl-4965.c
@@ -694,62 +694,71 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
694 error_kw: 694 error_kw:
695 return rc; 695 return rc;
696} 696}
697 697static int iwl4965_apm_init(struct iwl_priv *priv)
698int iwl4965_hw_nic_init(struct iwl_priv *priv)
699{ 698{
700 int rc;
701 unsigned long flags; 699 unsigned long flags;
702 struct iwl4965_rx_queue *rxq = &priv->rxq; 700 int ret = 0;
703 u8 rev_id;
704 u8 val_link;
705 u16 sku_cap;
706 u32 val;
707 701
708 /* nic_init */
709 spin_lock_irqsave(&priv->lock, flags); 702 spin_lock_irqsave(&priv->lock, flags);
710
711 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, 703 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
712 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); 704 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
713 705
706 /* set "initialization complete" bit to move adapter
707 * D0U* --> D0A* state */
714 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 708 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
715 rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
716 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
717 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
718 if (rc < 0) {
719 spin_unlock_irqrestore(&priv->lock, flags);
720 IWL_DEBUG_INFO("Failed to init the card\n");
721 return rc;
722 }
723 709
724 rc = iwl_grab_nic_access(priv); 710 /* wait for clock stabilization */
725 if (rc) { 711 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
726 spin_unlock_irqrestore(&priv->lock, flags); 712 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
727 return rc; 713 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
714 if (ret < 0) {
715 IWL_DEBUG_INFO("Failed to init the card\n");
716 goto out;
728 } 717 }
729 718
730 iwl_read_prph(priv, APMG_CLK_CTRL_REG); 719 ret = iwl_grab_nic_access(priv);
720 if (ret)
721 goto out;
731 722
723 /* enable DMA */
732 iwl_write_prph(priv, APMG_CLK_CTRL_REG, 724 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
733 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); 725 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
734 iwl_read_prph(priv, APMG_CLK_CTRL_REG);
735 726
736 udelay(20); 727 udelay(20);
737 728
738 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 729 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
739 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 730 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
740 731
741 iwl_release_nic_access(priv); 732 iwl_release_nic_access(priv);
733out:
734 spin_unlock_irqrestore(&priv->lock, flags);
735 return ret;
736}
737
738int iwl4965_hw_nic_init(struct iwl_priv *priv)
739{
740 unsigned long flags;
741 struct iwl4965_rx_queue *rxq = &priv->rxq;
742 u8 rev_id;
743 u8 val_link;
744 u32 val;
745 int ret;
746
747 /* nic_init */
748 priv->cfg->ops->lib->apm_ops.init(priv);
749
750 spin_lock_irqsave(&priv->lock, flags);
742 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32); 751 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
743 spin_unlock_irqrestore(&priv->lock, flags); 752 spin_unlock_irqrestore(&priv->lock, flags);
744 753
745 /* Determine HW type */ 754 /* Determine HW type */
746 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id); 755 ret = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
747 if (rc) 756 if (ret)
748 return rc; 757 return ret;
749 758
750 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id); 759 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
751 760
752 rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN); 761 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
753 762
754 spin_lock_irqsave(&priv->lock, flags); 763 spin_lock_irqsave(&priv->lock, flags);
755 764
@@ -782,11 +791,11 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
782 CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI | 791 CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI |
783 CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI); 792 CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI);
784 793
785 rc = iwl_grab_nic_access(priv); 794 ret = iwl_grab_nic_access(priv);
786 if (rc < 0) { 795 if (ret < 0) {
787 spin_unlock_irqrestore(&priv->lock, flags); 796 spin_unlock_irqrestore(&priv->lock, flags);
788 IWL_DEBUG_INFO("Failed to init the card\n"); 797 IWL_DEBUG_INFO("Failed to init the card\n");
789 return rc; 798 return ret;
790 } 799 }
791 800
792 iwl_read_prph(priv, APMG_PS_CTRL_REG); 801 iwl_read_prph(priv, APMG_PS_CTRL_REG);
@@ -803,8 +812,8 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
803 812
804 /* Allocate the RX queue, or reset if it is already allocated */ 813 /* Allocate the RX queue, or reset if it is already allocated */
805 if (!rxq->bd) { 814 if (!rxq->bd) {
806 rc = iwl4965_rx_queue_alloc(priv); 815 ret = iwl4965_rx_queue_alloc(priv);
807 if (rc) { 816 if (ret) {
808 IWL_ERROR("Unable to initialize Rx queue\n"); 817 IWL_ERROR("Unable to initialize Rx queue\n");
809 return -ENOMEM; 818 return -ENOMEM;
810 } 819 }
@@ -827,16 +836,9 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
827 spin_unlock_irqrestore(&priv->lock, flags); 836 spin_unlock_irqrestore(&priv->lock, flags);
828 837
829 /* Allocate and init all Tx and Command queues */ 838 /* Allocate and init all Tx and Command queues */
830 rc = iwl4965_txq_ctx_reset(priv); 839 ret = iwl4965_txq_ctx_reset(priv);
831 if (rc) 840 if (ret)
832 return rc; 841 return ret;
833
834 sku_cap = iwl_eeprom_query16(priv, EEPROM_SKU_CAP);
835 if (sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
836 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
837
838 if (sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
839 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
840 842
841 set_bit(STATUS_INIT, &priv->status); 843 set_bit(STATUS_INIT, &priv->status);
842 844
@@ -4344,6 +4346,7 @@ static struct iwl_lib_ops iwl4965_lib = {
4344 .alive_notify = iwl4965_alive_notify, 4346 .alive_notify = iwl4965_alive_notify,
4345 .load_ucode = iwl4965_load_bsm, 4347 .load_ucode = iwl4965_load_bsm,
4346 .apm_ops = { 4348 .apm_ops = {
4349 .init = iwl4965_apm_init,
4347 .set_pwr_src = iwl4965_set_pwr_src, 4350 .set_pwr_src = iwl4965_set_pwr_src,
4348 }, 4351 },
4349 .eeprom_ops = { 4352 .eeprom_ops = {