diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2011-09-16 06:34:01 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-09-19 16:10:12 -0400 |
commit | ac78a52f49e3645c49e2c13a239b570d2e590bee (patch) | |
tree | 1e74da265dc1ee601110d36e478e6dd0f5195ef4 /drivers/net/wireless/b43 | |
parent | 0c5644b98b54dd4d156aba098689adb2054205cd (diff) |
b43: LCN-PHY: implement SPUR avoidance mode
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r-- | drivers/net/wireless/b43/phy_lcn.c | 58 |
1 files changed, 56 insertions, 2 deletions
diff --git a/drivers/net/wireless/b43/phy_lcn.c b/drivers/net/wireless/b43/phy_lcn.c index 76503646120..895164783c3 100644 --- a/drivers/net/wireless/b43/phy_lcn.c +++ b/drivers/net/wireless/b43/phy_lcn.c | |||
@@ -42,6 +42,39 @@ struct lcn_tx_iir_filter { | |||
42 | u16 values[16]; | 42 | u16 values[16]; |
43 | }; | 43 | }; |
44 | 44 | ||
45 | /* In theory it's PHY common function, move if needed */ | ||
46 | /* brcms_b_switch_macfreq */ | ||
47 | static void b43_phy_switch_macfreq(struct b43_wldev *dev, u8 spurmode) | ||
48 | { | ||
49 | if (dev->dev->chip_id == 43224 || dev->dev->chip_id == 43225) { | ||
50 | switch (spurmode) { | ||
51 | case 2: /* 126 Mhz */ | ||
52 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082); | ||
53 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); | ||
54 | break; | ||
55 | case 1: /* 123 Mhz */ | ||
56 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341); | ||
57 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); | ||
58 | break; | ||
59 | default: /* 120 Mhz */ | ||
60 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889); | ||
61 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); | ||
62 | break; | ||
63 | } | ||
64 | } else if (dev->phy.type == B43_PHYTYPE_LCN) { | ||
65 | switch (spurmode) { | ||
66 | case 1: /* 82 Mhz */ | ||
67 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0); | ||
68 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC); | ||
69 | break; | ||
70 | default: /* 80 Mhz */ | ||
71 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD); | ||
72 | b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC); | ||
73 | break; | ||
74 | } | ||
75 | } | ||
76 | } | ||
77 | |||
45 | /************************************************** | 78 | /************************************************** |
46 | * Radio 2064. | 79 | * Radio 2064. |
47 | **************************************************/ | 80 | **************************************************/ |
@@ -367,6 +400,27 @@ static bool b43_phy_lcn_load_tx_iir_ofdm_filter(struct b43_wldev *dev, | |||
367 | return false; | 400 | return false; |
368 | } | 401 | } |
369 | 402 | ||
403 | /* wlc_lcnphy_txrx_spur_avoidance_mode */ | ||
404 | static void b43_phy_lcn_txrx_spur_avoidance_mode(struct b43_wldev *dev, | ||
405 | bool enable) | ||
406 | { | ||
407 | if (enable) { | ||
408 | b43_phy_write(dev, 0x942, 0x7); | ||
409 | b43_phy_write(dev, 0x93b, ((1 << 13) + 23)); | ||
410 | b43_phy_write(dev, 0x93c, ((1 << 13) + 1989)); | ||
411 | |||
412 | b43_phy_write(dev, 0x44a, 0x084); | ||
413 | b43_phy_write(dev, 0x44a, 0x080); | ||
414 | b43_phy_write(dev, 0x6d3, 0x2222); | ||
415 | b43_phy_write(dev, 0x6d3, 0x2220); | ||
416 | } else { | ||
417 | b43_phy_write(dev, 0x942, 0x0); | ||
418 | b43_phy_write(dev, 0x93b, ((0 << 13) + 23)); | ||
419 | b43_phy_write(dev, 0x93c, ((0 << 13) + 1989)); | ||
420 | } | ||
421 | b43_phy_switch_macfreq(dev, enable); | ||
422 | } | ||
423 | |||
370 | /************************************************** | 424 | /************************************************** |
371 | * Channel switching ops. | 425 | * Channel switching ops. |
372 | **************************************************/ | 426 | **************************************************/ |
@@ -388,7 +442,7 @@ static void b43_phy_lcn_set_channel_tweaks(struct b43_wldev *dev, int channel) | |||
388 | 442 | ||
389 | b43_phy_write(dev, 0x942, 0); | 443 | b43_phy_write(dev, 0x942, 0); |
390 | 444 | ||
391 | /* b43_phy_lcn_txrx_spur_avoidance_mode(dev, false); */ | 445 | b43_phy_lcn_txrx_spur_avoidance_mode(dev, false); |
392 | b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1b00); | 446 | b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1b00); |
393 | b43_phy_write(dev, 0x425, 0x5907); | 447 | b43_phy_write(dev, 0x425, 0x5907); |
394 | } else { | 448 | } else { |
@@ -400,7 +454,7 @@ static void b43_phy_lcn_set_channel_tweaks(struct b43_wldev *dev, int channel) | |||
400 | 454 | ||
401 | b43_phy_write(dev, 0x942, 0); | 455 | b43_phy_write(dev, 0x942, 0); |
402 | 456 | ||
403 | /* b43_phy_lcn_txrx_spur_avoidance_mode(dev, true); */ | 457 | b43_phy_lcn_txrx_spur_avoidance_mode(dev, true); |
404 | b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1f00); | 458 | b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1f00); |
405 | b43_phy_write(dev, 0x425, 0x590a); | 459 | b43_phy_write(dev, 0x425, 0x590a); |
406 | } | 460 | } |