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authorRafał Miłecki <zajec5@gmail.com>2011-12-17 07:57:20 -0500
committerJohn W. Linville <linville@tuxdriver.com>2011-12-19 14:40:48 -0500
commitab499217dc946876d81ea8842a4eb9d53e8329a8 (patch)
tree7f8125b2b54156712d0db1907410167da5039958 /drivers/net/wireless/b43
parentb9116b9a2b5db63187d28f99e038f473fad036dc (diff)
b43: N-PHY: reorder functions: put basic ones at beginning
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43')
-rw-r--r--drivers/net/wireless/b43/phy_n.c665
1 files changed, 332 insertions, 333 deletions
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index f2435e78b37..1ede25811ec 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -78,19 +78,6 @@ enum b43_nphy_rssi_type {
78 B43_NPHY_RSSI_TBD, 78 B43_NPHY_RSSI_TBD,
79}; 79};
80 80
81/* TODO: reorder functions */
82static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev,
83 bool enable);
84static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
85 u8 *events, u8 *delays, u8 length);
86static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
87 enum b43_nphy_rf_sequence seq);
88static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
89 u16 value, u8 core, bool off);
90static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
91 u16 value, u8 core);
92static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev);
93
94static inline bool b43_nphy_ipa(struct b43_wldev *dev) 81static inline bool b43_nphy_ipa(struct b43_wldev *dev)
95{ 82{
96 enum ieee80211_band band = b43_current_band(dev->wl); 83 enum ieee80211_band band = b43_current_band(dev->wl);
@@ -98,6 +85,338 @@ static inline bool b43_nphy_ipa(struct b43_wldev *dev)
98 (dev->phy.n->ipa5g_on && band == IEEE80211_BAND_5GHZ)); 85 (dev->phy.n->ipa5g_on && band == IEEE80211_BAND_5GHZ));
99} 86}
100 87
88/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetIpaGainTbl */
89static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev)
90{
91 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
92 if (dev->phy.rev >= 6) {
93 if (dev->dev->chip_id == 47162)
94 return txpwrctrl_tx_gain_ipa_rev5;
95 return txpwrctrl_tx_gain_ipa_rev6;
96 } else if (dev->phy.rev >= 5) {
97 return txpwrctrl_tx_gain_ipa_rev5;
98 } else {
99 return txpwrctrl_tx_gain_ipa;
100 }
101 } else {
102 return txpwrctrl_tx_gain_ipa_5g;
103 }
104}
105
106/**************************************************
107 * RF (just without b43_nphy_rf_control_intc_override)
108 **************************************************/
109
110/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
111static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
112 enum b43_nphy_rf_sequence seq)
113{
114 static const u16 trigger[] = {
115 [B43_RFSEQ_RX2TX] = B43_NPHY_RFSEQTR_RX2TX,
116 [B43_RFSEQ_TX2RX] = B43_NPHY_RFSEQTR_TX2RX,
117 [B43_RFSEQ_RESET2RX] = B43_NPHY_RFSEQTR_RST2RX,
118 [B43_RFSEQ_UPDATE_GAINH] = B43_NPHY_RFSEQTR_UPGH,
119 [B43_RFSEQ_UPDATE_GAINL] = B43_NPHY_RFSEQTR_UPGL,
120 [B43_RFSEQ_UPDATE_GAINU] = B43_NPHY_RFSEQTR_UPGU,
121 };
122 int i;
123 u16 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
124
125 B43_WARN_ON(seq >= ARRAY_SIZE(trigger));
126
127 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
128 B43_NPHY_RFSEQMODE_CAOVER | B43_NPHY_RFSEQMODE_TROVER);
129 b43_phy_set(dev, B43_NPHY_RFSEQTR, trigger[seq]);
130 for (i = 0; i < 200; i++) {
131 if (!(b43_phy_read(dev, B43_NPHY_RFSEQST) & trigger[seq]))
132 goto ok;
133 msleep(1);
134 }
135 b43err(dev->wl, "RF sequence status timeout\n");
136ok:
137 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
138}
139
140/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverride */
141static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
142 u16 value, u8 core, bool off)
143{
144 int i;
145 u8 index = fls(field);
146 u8 addr, en_addr, val_addr;
147 /* we expect only one bit set */
148 B43_WARN_ON(field & (~(1 << (index - 1))));
149
150 if (dev->phy.rev >= 3) {
151 const struct nphy_rf_control_override_rev3 *rf_ctrl;
152 for (i = 0; i < 2; i++) {
153 if (index == 0 || index == 16) {
154 b43err(dev->wl,
155 "Unsupported RF Ctrl Override call\n");
156 return;
157 }
158
159 rf_ctrl = &tbl_rf_control_override_rev3[index - 1];
160 en_addr = B43_PHY_N((i == 0) ?
161 rf_ctrl->en_addr0 : rf_ctrl->en_addr1);
162 val_addr = B43_PHY_N((i == 0) ?
163 rf_ctrl->val_addr0 : rf_ctrl->val_addr1);
164
165 if (off) {
166 b43_phy_mask(dev, en_addr, ~(field));
167 b43_phy_mask(dev, val_addr,
168 ~(rf_ctrl->val_mask));
169 } else {
170 if (core == 0 || ((1 << core) & i) != 0) {
171 b43_phy_set(dev, en_addr, field);
172 b43_phy_maskset(dev, val_addr,
173 ~(rf_ctrl->val_mask),
174 (value << rf_ctrl->val_shift));
175 }
176 }
177 }
178 } else {
179 const struct nphy_rf_control_override_rev2 *rf_ctrl;
180 if (off) {
181 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field));
182 value = 0;
183 } else {
184 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, field);
185 }
186
187 for (i = 0; i < 2; i++) {
188 if (index <= 1 || index == 16) {
189 b43err(dev->wl,
190 "Unsupported RF Ctrl Override call\n");
191 return;
192 }
193
194 if (index == 2 || index == 10 ||
195 (index >= 13 && index <= 15)) {
196 core = 1;
197 }
198
199 rf_ctrl = &tbl_rf_control_override_rev2[index - 2];
200 addr = B43_PHY_N((i == 0) ?
201 rf_ctrl->addr0 : rf_ctrl->addr1);
202
203 if ((core & (1 << i)) != 0)
204 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask),
205 (value << rf_ctrl->shift));
206
207 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1);
208 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
209 B43_NPHY_RFCTL_CMD_START);
210 udelay(1);
211 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE);
212 }
213 }
214}
215
216/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlIntcOverride */
217static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
218 u16 value, u8 core)
219{
220 u8 i, j;
221 u16 reg, tmp, val;
222
223 B43_WARN_ON(dev->phy.rev < 3);
224 B43_WARN_ON(field > 4);
225
226 for (i = 0; i < 2; i++) {
227 if ((core == 1 && i == 1) || (core == 2 && !i))
228 continue;
229
230 reg = (i == 0) ?
231 B43_NPHY_RFCTL_INTC1 : B43_NPHY_RFCTL_INTC2;
232 b43_phy_mask(dev, reg, 0xFBFF);
233
234 switch (field) {
235 case 0:
236 b43_phy_write(dev, reg, 0);
237 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
238 break;
239 case 1:
240 if (!i) {
241 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1,
242 0xFC3F, (value << 6));
243 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1,
244 0xFFFE, 1);
245 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
246 B43_NPHY_RFCTL_CMD_START);
247 for (j = 0; j < 100; j++) {
248 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START) {
249 j = 0;
250 break;
251 }
252 udelay(10);
253 }
254 if (j)
255 b43err(dev->wl,
256 "intc override timeout\n");
257 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,
258 0xFFFE);
259 } else {
260 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2,
261 0xFC3F, (value << 6));
262 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
263 0xFFFE, 1);
264 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
265 B43_NPHY_RFCTL_CMD_RXTX);
266 for (j = 0; j < 100; j++) {
267 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX) {
268 j = 0;
269 break;
270 }
271 udelay(10);
272 }
273 if (j)
274 b43err(dev->wl,
275 "intc override timeout\n");
276 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
277 0xFFFE);
278 }
279 break;
280 case 2:
281 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
282 tmp = 0x0020;
283 val = value << 5;
284 } else {
285 tmp = 0x0010;
286 val = value << 4;
287 }
288 b43_phy_maskset(dev, reg, ~tmp, val);
289 break;
290 case 3:
291 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
292 tmp = 0x0001;
293 val = value;
294 } else {
295 tmp = 0x0004;
296 val = value << 2;
297 }
298 b43_phy_maskset(dev, reg, ~tmp, val);
299 break;
300 case 4:
301 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
302 tmp = 0x0002;
303 val = value << 1;
304 } else {
305 tmp = 0x0008;
306 val = value << 3;
307 }
308 b43_phy_maskset(dev, reg, ~tmp, val);
309 break;
310 }
311 }
312}
313
314/**************************************************
315 * Various PHY ops
316 **************************************************/
317
318/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
319static void b43_nphy_write_clip_detection(struct b43_wldev *dev,
320 const u16 *clip_st)
321{
322 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
323 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
324}
325
326/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
327static void b43_nphy_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
328{
329 clip_st[0] = b43_phy_read(dev, B43_NPHY_C1_CLIP1THRES);
330 clip_st[1] = b43_phy_read(dev, B43_NPHY_C2_CLIP1THRES);
331}
332
333/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/classifier */
334static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
335{
336 u16 tmp;
337
338 if (dev->dev->core_rev == 16)
339 b43_mac_suspend(dev);
340
341 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
342 tmp &= (B43_NPHY_CLASSCTL_CCKEN | B43_NPHY_CLASSCTL_OFDMEN |
343 B43_NPHY_CLASSCTL_WAITEDEN);
344 tmp &= ~mask;
345 tmp |= (val & mask);
346 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
347
348 if (dev->dev->core_rev == 16)
349 b43_mac_enable(dev);
350
351 return tmp;
352}
353
354/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
355static void b43_nphy_reset_cca(struct b43_wldev *dev)
356{
357 u16 bbcfg;
358
359 b43_phy_force_clock(dev, 1);
360 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
361 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
362 udelay(1);
363 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
364 b43_phy_force_clock(dev, 0);
365 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
366}
367
368/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/carriersearch */
369static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
370{
371 struct b43_phy *phy = &dev->phy;
372 struct b43_phy_n *nphy = phy->n;
373
374 if (enable) {
375 static const u16 clip[] = { 0xFFFF, 0xFFFF };
376 if (nphy->deaf_count++ == 0) {
377 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
378 b43_nphy_classifier(dev, 0x7, 0);
379 b43_nphy_read_clip_detection(dev, nphy->clip_state);
380 b43_nphy_write_clip_detection(dev, clip);
381 }
382 b43_nphy_reset_cca(dev);
383 } else {
384 if (--nphy->deaf_count == 0) {
385 b43_nphy_classifier(dev, 0x7, nphy->classifier_state);
386 b43_nphy_write_clip_detection(dev, nphy->clip_state);
387 }
388 }
389}
390
391/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRfSeq */
392static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
393 u8 *events, u8 *delays, u8 length)
394{
395 struct b43_phy_n *nphy = dev->phy.n;
396 u8 i;
397 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F;
398 u16 offset1 = cmd << 4;
399 u16 offset2 = offset1 + 0x80;
400
401 if (nphy->hang_avoid)
402 b43_nphy_stay_in_carrier_search(dev, true);
403
404 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset1), length, events);
405 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset2), length, delays);
406
407 for (i = length; i < 16; i++) {
408 b43_ntab_write(dev, B43_NTAB8(7, offset1 + i), end);
409 b43_ntab_write(dev, B43_NTAB8(7, offset2 + i), 1);
410 }
411
412 if (nphy->hang_avoid)
413 b43_nphy_stay_in_carrier_search(dev, false);
414}
415
416/**************************************************
417 * Others
418 **************************************************/
419
101void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna) 420void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
102{//TODO 421{//TODO
103} 422}
@@ -835,20 +1154,6 @@ static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
835 } 1154 }
836} 1155}
837 1156
838/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
839static void b43_nphy_reset_cca(struct b43_wldev *dev)
840{
841 u16 bbcfg;
842
843 b43_phy_force_clock(dev, 1);
844 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
845 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
846 udelay(1);
847 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
848 b43_phy_force_clock(dev, 0);
849 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
850}
851
852/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */ 1157/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */
853static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble) 1158static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble)
854{ 1159{
@@ -1142,21 +1447,6 @@ static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
1142 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]); 1447 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]);
1143} 1448}
1144 1449
1145/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
1146static void b43_nphy_write_clip_detection(struct b43_wldev *dev,
1147 const u16 *clip_st)
1148{
1149 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
1150 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
1151}
1152
1153/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
1154static void b43_nphy_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
1155{
1156 clip_st[0] = b43_phy_read(dev, B43_NPHY_C1_CLIP1THRES);
1157 clip_st[1] = b43_phy_read(dev, B43_NPHY_C2_CLIP1THRES);
1158}
1159
1160/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SuperSwitchInit */ 1450/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SuperSwitchInit */
1161static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init) 1451static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
1162{ 1452{
@@ -1205,50 +1495,6 @@ static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
1205 } 1495 }
1206} 1496}
1207 1497
1208/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/classifier */
1209static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
1210{
1211 u16 tmp;
1212
1213 if (dev->dev->core_rev == 16)
1214 b43_mac_suspend(dev);
1215
1216 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
1217 tmp &= (B43_NPHY_CLASSCTL_CCKEN | B43_NPHY_CLASSCTL_OFDMEN |
1218 B43_NPHY_CLASSCTL_WAITEDEN);
1219 tmp &= ~mask;
1220 tmp |= (val & mask);
1221 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
1222
1223 if (dev->dev->core_rev == 16)
1224 b43_mac_enable(dev);
1225
1226 return tmp;
1227}
1228
1229/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/carriersearch */
1230static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
1231{
1232 struct b43_phy *phy = &dev->phy;
1233 struct b43_phy_n *nphy = phy->n;
1234
1235 if (enable) {
1236 static const u16 clip[] = { 0xFFFF, 0xFFFF };
1237 if (nphy->deaf_count++ == 0) {
1238 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
1239 b43_nphy_classifier(dev, 0x7, 0);
1240 b43_nphy_read_clip_detection(dev, nphy->clip_state);
1241 b43_nphy_write_clip_detection(dev, clip);
1242 }
1243 b43_nphy_reset_cca(dev);
1244 } else {
1245 if (--nphy->deaf_count == 0) {
1246 b43_nphy_classifier(dev, 0x7, nphy->classifier_state);
1247 b43_nphy_write_clip_detection(dev, nphy->clip_state);
1248 }
1249 }
1250}
1251
1252/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/stop-playback */ 1498/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/stop-playback */
1253static void b43_nphy_stop_playback(struct b43_wldev *dev) 1499static void b43_nphy_stop_playback(struct b43_wldev *dev)
1254{ 1500{
@@ -2034,235 +2280,6 @@ static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev *dev)
2034 b43_nphy_stay_in_carrier_search(dev, false); 2280 b43_nphy_stay_in_carrier_search(dev, false);
2035} 2281}
2036 2282
2037/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRfSeq */
2038static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
2039 u8 *events, u8 *delays, u8 length)
2040{
2041 struct b43_phy_n *nphy = dev->phy.n;
2042 u8 i;
2043 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F;
2044 u16 offset1 = cmd << 4;
2045 u16 offset2 = offset1 + 0x80;
2046
2047 if (nphy->hang_avoid)
2048 b43_nphy_stay_in_carrier_search(dev, true);
2049
2050 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset1), length, events);
2051 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset2), length, delays);
2052
2053 for (i = length; i < 16; i++) {
2054 b43_ntab_write(dev, B43_NTAB8(7, offset1 + i), end);
2055 b43_ntab_write(dev, B43_NTAB8(7, offset2 + i), 1);
2056 }
2057
2058 if (nphy->hang_avoid)
2059 b43_nphy_stay_in_carrier_search(dev, false);
2060}
2061
2062/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
2063static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
2064 enum b43_nphy_rf_sequence seq)
2065{
2066 static const u16 trigger[] = {
2067 [B43_RFSEQ_RX2TX] = B43_NPHY_RFSEQTR_RX2TX,
2068 [B43_RFSEQ_TX2RX] = B43_NPHY_RFSEQTR_TX2RX,
2069 [B43_RFSEQ_RESET2RX] = B43_NPHY_RFSEQTR_RST2RX,
2070 [B43_RFSEQ_UPDATE_GAINH] = B43_NPHY_RFSEQTR_UPGH,
2071 [B43_RFSEQ_UPDATE_GAINL] = B43_NPHY_RFSEQTR_UPGL,
2072 [B43_RFSEQ_UPDATE_GAINU] = B43_NPHY_RFSEQTR_UPGU,
2073 };
2074 int i;
2075 u16 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
2076
2077 B43_WARN_ON(seq >= ARRAY_SIZE(trigger));
2078
2079 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
2080 B43_NPHY_RFSEQMODE_CAOVER | B43_NPHY_RFSEQMODE_TROVER);
2081 b43_phy_set(dev, B43_NPHY_RFSEQTR, trigger[seq]);
2082 for (i = 0; i < 200; i++) {
2083 if (!(b43_phy_read(dev, B43_NPHY_RFSEQST) & trigger[seq]))
2084 goto ok;
2085 msleep(1);
2086 }
2087 b43err(dev->wl, "RF sequence status timeout\n");
2088ok:
2089 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
2090}
2091
2092/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverride */
2093static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
2094 u16 value, u8 core, bool off)
2095{
2096 int i;
2097 u8 index = fls(field);
2098 u8 addr, en_addr, val_addr;
2099 /* we expect only one bit set */
2100 B43_WARN_ON(field & (~(1 << (index - 1))));
2101
2102 if (dev->phy.rev >= 3) {
2103 const struct nphy_rf_control_override_rev3 *rf_ctrl;
2104 for (i = 0; i < 2; i++) {
2105 if (index == 0 || index == 16) {
2106 b43err(dev->wl,
2107 "Unsupported RF Ctrl Override call\n");
2108 return;
2109 }
2110
2111 rf_ctrl = &tbl_rf_control_override_rev3[index - 1];
2112 en_addr = B43_PHY_N((i == 0) ?
2113 rf_ctrl->en_addr0 : rf_ctrl->en_addr1);
2114 val_addr = B43_PHY_N((i == 0) ?
2115 rf_ctrl->val_addr0 : rf_ctrl->val_addr1);
2116
2117 if (off) {
2118 b43_phy_mask(dev, en_addr, ~(field));
2119 b43_phy_mask(dev, val_addr,
2120 ~(rf_ctrl->val_mask));
2121 } else {
2122 if (core == 0 || ((1 << core) & i) != 0) {
2123 b43_phy_set(dev, en_addr, field);
2124 b43_phy_maskset(dev, val_addr,
2125 ~(rf_ctrl->val_mask),
2126 (value << rf_ctrl->val_shift));
2127 }
2128 }
2129 }
2130 } else {
2131 const struct nphy_rf_control_override_rev2 *rf_ctrl;
2132 if (off) {
2133 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field));
2134 value = 0;
2135 } else {
2136 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, field);
2137 }
2138
2139 for (i = 0; i < 2; i++) {
2140 if (index <= 1 || index == 16) {
2141 b43err(dev->wl,
2142 "Unsupported RF Ctrl Override call\n");
2143 return;
2144 }
2145
2146 if (index == 2 || index == 10 ||
2147 (index >= 13 && index <= 15)) {
2148 core = 1;
2149 }
2150
2151 rf_ctrl = &tbl_rf_control_override_rev2[index - 2];
2152 addr = B43_PHY_N((i == 0) ?
2153 rf_ctrl->addr0 : rf_ctrl->addr1);
2154
2155 if ((core & (1 << i)) != 0)
2156 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask),
2157 (value << rf_ctrl->shift));
2158
2159 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1);
2160 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
2161 B43_NPHY_RFCTL_CMD_START);
2162 udelay(1);
2163 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE);
2164 }
2165 }
2166}
2167
2168/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlIntcOverride */
2169static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
2170 u16 value, u8 core)
2171{
2172 u8 i, j;
2173 u16 reg, tmp, val;
2174
2175 B43_WARN_ON(dev->phy.rev < 3);
2176 B43_WARN_ON(field > 4);
2177
2178 for (i = 0; i < 2; i++) {
2179 if ((core == 1 && i == 1) || (core == 2 && !i))
2180 continue;
2181
2182 reg = (i == 0) ?
2183 B43_NPHY_RFCTL_INTC1 : B43_NPHY_RFCTL_INTC2;
2184 b43_phy_mask(dev, reg, 0xFBFF);
2185
2186 switch (field) {
2187 case 0:
2188 b43_phy_write(dev, reg, 0);
2189 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
2190 break;
2191 case 1:
2192 if (!i) {
2193 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1,
2194 0xFC3F, (value << 6));
2195 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1,
2196 0xFFFE, 1);
2197 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
2198 B43_NPHY_RFCTL_CMD_START);
2199 for (j = 0; j < 100; j++) {
2200 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START) {
2201 j = 0;
2202 break;
2203 }
2204 udelay(10);
2205 }
2206 if (j)
2207 b43err(dev->wl,
2208 "intc override timeout\n");
2209 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,
2210 0xFFFE);
2211 } else {
2212 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2,
2213 0xFC3F, (value << 6));
2214 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
2215 0xFFFE, 1);
2216 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
2217 B43_NPHY_RFCTL_CMD_RXTX);
2218 for (j = 0; j < 100; j++) {
2219 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX) {
2220 j = 0;
2221 break;
2222 }
2223 udelay(10);
2224 }
2225 if (j)
2226 b43err(dev->wl,
2227 "intc override timeout\n");
2228 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
2229 0xFFFE);
2230 }
2231 break;
2232 case 2:
2233 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2234 tmp = 0x0020;
2235 val = value << 5;
2236 } else {
2237 tmp = 0x0010;
2238 val = value << 4;
2239 }
2240 b43_phy_maskset(dev, reg, ~tmp, val);
2241 break;
2242 case 3:
2243 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2244 tmp = 0x0001;
2245 val = value;
2246 } else {
2247 tmp = 0x0004;
2248 val = value << 2;
2249 }
2250 b43_phy_maskset(dev, reg, ~tmp, val);
2251 break;
2252 case 4:
2253 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2254 tmp = 0x0002;
2255 val = value << 1;
2256 } else {
2257 tmp = 0x0008;
2258 val = value << 3;
2259 }
2260 b43_phy_maskset(dev, reg, ~tmp, val);
2261 break;
2262 }
2263 }
2264}
2265
2266/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */ 2283/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */
2267static void b43_nphy_bphy_init(struct b43_wldev *dev) 2284static void b43_nphy_bphy_init(struct b43_wldev *dev)
2268{ 2285{
@@ -2846,24 +2863,6 @@ static void b43_nphy_restore_rssi_cal(struct b43_wldev *dev)
2846 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, rssical_phy_regs[11]); 2863 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, rssical_phy_regs[11]);
2847} 2864}
2848 2865
2849/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetIpaGainTbl */
2850static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev)
2851{
2852 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2853 if (dev->phy.rev >= 6) {
2854 if (dev->dev->chip_id == 47162)
2855 return txpwrctrl_tx_gain_ipa_rev5;
2856 return txpwrctrl_tx_gain_ipa_rev6;
2857 } else if (dev->phy.rev >= 5) {
2858 return txpwrctrl_tx_gain_ipa_rev5;
2859 } else {
2860 return txpwrctrl_tx_gain_ipa;
2861 }
2862 } else {
2863 return txpwrctrl_tx_gain_ipa_5g;
2864 }
2865}
2866
2867/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalRadioSetup */ 2866/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalRadioSetup */
2868static void b43_nphy_tx_cal_radio_setup(struct b43_wldev *dev) 2867static void b43_nphy_tx_cal_radio_setup(struct b43_wldev *dev)
2869{ 2868{
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-15 21:11:47 -0400