diff options
author | Gábor Stefanik <netrolller.3d@gmail.com> | 2009-08-02 19:28:12 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-08-04 16:44:24 -0400 |
commit | 738f0f4301587ad09b58651390b122205086b484 (patch) | |
tree | 6d5f51d1980db2ef37537b0bc6c1a5a694324e40 /drivers/net/wireless/b43/phy_lp.c | |
parent | d8cc8926e9b4dc2ce513ee3325bf16b4ea6d94e8 (diff) |
b43: implement baseband init for LP-PHY <= rev1
Implement baseband init for rev.0 and rev.1 LP PHYs. Convert boardflags_hi values to defines.
Implement b43_phy_copy for easier copying between registers, as needed by LP-PHY init.
Signed-off-by: Gábor Stefanik<netrolller.3d@gmail.com>
Cc: Michael Buesch<mb@bu3sch.de>
Cc: Larry Finger<larry.finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/phy_lp.c')
-rw-r--r-- | drivers/net/wireless/b43/phy_lp.c | 94 |
1 files changed, 93 insertions, 1 deletions
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c index ea0d3a3a6a6..aa1486a1354 100644 --- a/drivers/net/wireless/b43/phy_lp.c +++ b/drivers/net/wireless/b43/phy_lp.c | |||
@@ -66,7 +66,99 @@ static void lpphy_table_init(struct b43_wldev *dev) | |||
66 | 66 | ||
67 | static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev) | 67 | static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev) |
68 | { | 68 | { |
69 | B43_WARN_ON(1);//TODO rev < 2 not supported, yet. | 69 | struct ssb_bus *bus = dev->dev->bus; |
70 | u16 tmp, tmp2; | ||
71 | |||
72 | if (dev->phy.rev == 1 && | ||
73 | (bus->sprom.boardflags_hi & B43_BFH_FEM_BT)) { | ||
74 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x000A); | ||
75 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0x3F00, 0x0900); | ||
76 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x000A); | ||
77 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0B00); | ||
78 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x000A); | ||
79 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0400); | ||
80 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x000A); | ||
81 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0B00); | ||
82 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_5, 0xFFC0, 0x000A); | ||
83 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_5, 0xC0FF, 0x0900); | ||
84 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_6, 0xFFC0, 0x000A); | ||
85 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_6, 0xC0FF, 0x0B00); | ||
86 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_7, 0xFFC0, 0x000A); | ||
87 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_7, 0xC0FF, 0x0900); | ||
88 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xFFC0, 0x000A); | ||
89 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xC0FF, 0x0B00); | ||
90 | } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ || | ||
91 | (bus->boardinfo.type == 0x048A) || ((dev->phy.rev == 0) && | ||
92 | (bus->sprom.boardflags_lo & B43_BFL_FEM))) { | ||
93 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0001); | ||
94 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0400); | ||
95 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0001); | ||
96 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0500); | ||
97 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0002); | ||
98 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0800); | ||
99 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0002); | ||
100 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0A00); | ||
101 | } else if (dev->phy.rev == 1 || | ||
102 | (bus->sprom.boardflags_lo & B43_BFL_FEM)) { | ||
103 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0004); | ||
104 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0800); | ||
105 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0004); | ||
106 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0C00); | ||
107 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0002); | ||
108 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0100); | ||
109 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0002); | ||
110 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0300); | ||
111 | } else { | ||
112 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x000A); | ||
113 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0900); | ||
114 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x000A); | ||
115 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0B00); | ||
116 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0006); | ||
117 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0500); | ||
118 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0006); | ||
119 | b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0700); | ||
120 | } | ||
121 | if (dev->phy.rev == 1) { | ||
122 | b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_5, B43_LPPHY_TR_LOOKUP_1); | ||
123 | b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_6, B43_LPPHY_TR_LOOKUP_2); | ||
124 | b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_7, B43_LPPHY_TR_LOOKUP_3); | ||
125 | b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_8, B43_LPPHY_TR_LOOKUP_4); | ||
126 | } | ||
127 | if ((bus->sprom.boardflags_hi & B43_BFH_FEM_BT) && | ||
128 | (bus->chip_id == 0x5354) && | ||
129 | (bus->chip_package == SSB_CHIPPACK_BCM4712S)) { | ||
130 | b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0006); | ||
131 | b43_phy_write(dev, B43_LPPHY_GPIO_SELECT, 0x0005); | ||
132 | b43_phy_write(dev, B43_LPPHY_GPIO_OUTEN, 0xFFFF); | ||
133 | b43_hf_write(dev, b43_hf_read(dev) | 0x0800ULL << 32); | ||
134 | } | ||
135 | if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { | ||
136 | b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x8000); | ||
137 | b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0040); | ||
138 | b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0x00FF, 0xA400); | ||
139 | b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xF0FF, 0x0B00); | ||
140 | b43_phy_maskset(dev, B43_LPPHY_SYNCPEAKCNT, 0xFFF8, 0x0007); | ||
141 | b43_phy_maskset(dev, B43_LPPHY_DSSS_CONFIRM_CNT, 0xFFF8, 0x0003); | ||
142 | b43_phy_maskset(dev, B43_LPPHY_DSSS_CONFIRM_CNT, 0xFFC7, 0x0020); | ||
143 | b43_phy_mask(dev, B43_LPPHY_IDLEAFTERPKTRXTO, 0x00FF); | ||
144 | } else { /* 5GHz */ | ||
145 | b43_phy_mask(dev, B43_LPPHY_LP_PHY_CTL, 0x7FFF); | ||
146 | b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFBF); | ||
147 | } | ||
148 | if (dev->phy.rev == 1) { | ||
149 | tmp = b43_phy_read(dev, B43_LPPHY_CLIPCTRTHRESH); | ||
150 | tmp2 = (tmp & 0x03E0) >> 5; | ||
151 | tmp2 |= tmp << 5; | ||
152 | b43_phy_write(dev, B43_LPPHY_4C3, tmp2); | ||
153 | tmp = b43_phy_read(dev, B43_LPPHY_OFDMSYNCTHRESH0); | ||
154 | tmp2 = (tmp & 0x1F00) >> 8; | ||
155 | tmp2 |= tmp << 5; | ||
156 | b43_phy_write(dev, B43_LPPHY_4C4, tmp2); | ||
157 | tmp = b43_phy_read(dev, B43_LPPHY_VERYLOWGAINDB); | ||
158 | tmp2 = tmp & 0x00FF; | ||
159 | tmp2 |= tmp << 8; | ||
160 | b43_phy_write(dev, B43_LPPHY_4C5, tmp2); | ||
161 | } | ||
70 | } | 162 | } |
71 | 163 | ||
72 | static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) | 164 | static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) |