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authorFelix Fietkau <nbd@openwrt.org>2010-12-01 13:07:46 -0500
committerJohn W. Linville <linville@tuxdriver.com>2010-12-02 14:10:33 -0500
commite702ba18f25887c76d26c8a85cc1706463c62e9a (patch)
tree52fd746e1824862d47aae14077cea506ec6678a3 /drivers/net/wireless/ath
parent9306990a656d9cfd8bf3586938012729c1f2ea50 (diff)
ath9k_hw: fix endian issues with CTLs on AR9003
Parsing data using bitfields is messy, because it makes endian handling much harder. AR9002 and earlier got it right, AR9003 got it wrong. This might lead to either using too high or too low tx power values, depending on frequency and eeprom settings. Fix it by getting rid of the CTL related bitfields entirely and use masks instead. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Cc: stable@kernel.org Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c73
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.h9
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.c6
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.h13
4 files changed, 47 insertions, 54 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index c4182359bee..a7b82f0085d 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -55,6 +55,8 @@
55#define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */ 55#define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */
56#define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */ 56#define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */
57 57
58#define CTL(_tpower, _flag) ((_tpower) | ((_flag) << 6))
59
58static const struct ar9300_eeprom ar9300_default = { 60static const struct ar9300_eeprom ar9300_default = {
59 .eepromVersion = 2, 61 .eepromVersion = 2,
60 .templateVersion = 2, 62 .templateVersion = 2,
@@ -290,20 +292,21 @@ static const struct ar9300_eeprom ar9300_default = {
290 } 292 }
291 }, 293 },
292 .ctlPowerData_2G = { 294 .ctlPowerData_2G = {
293 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, 295 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
294 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, 296 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
295 { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } }, 297 { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
296 298
297 { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } }, 299 { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
298 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, 300 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
299 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, 301 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
300 302
301 { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } }, 303 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
302 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, 304 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
303 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, 305 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
304 306
305 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, 307 { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
306 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, 308 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
309 { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
307 }, 310 },
308 .modalHeader5G = { 311 .modalHeader5G = {
309 /* 4 idle,t1,t2,b (4 bits per setting) */ 312 /* 4 idle,t1,t2,b (4 bits per setting) */
@@ -568,56 +571,56 @@ static const struct ar9300_eeprom ar9300_default = {
568 .ctlPowerData_5G = { 571 .ctlPowerData_5G = {
569 { 572 {
570 { 573 {
571 {60, 1}, {60, 1}, {60, 1}, {60, 1}, 574 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
572 {60, 1}, {60, 1}, {60, 1}, {60, 0}, 575 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
573 } 576 }
574 }, 577 },
575 { 578 {
576 { 579 {
577 {60, 1}, {60, 1}, {60, 1}, {60, 1}, 580 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
578 {60, 1}, {60, 1}, {60, 1}, {60, 0}, 581 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
579 } 582 }
580 }, 583 },
581 { 584 {
582 { 585 {
583 {60, 0}, {60, 1}, {60, 0}, {60, 1}, 586 CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
584 {60, 1}, {60, 1}, {60, 1}, {60, 1}, 587 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
585 } 588 }
586 }, 589 },
587 { 590 {
588 { 591 {
589 {60, 0}, {60, 1}, {60, 1}, {60, 0}, 592 CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
590 {60, 1}, {60, 0}, {60, 0}, {60, 0}, 593 CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
591 } 594 }
592 }, 595 },
593 { 596 {
594 { 597 {
595 {60, 1}, {60, 1}, {60, 1}, {60, 0}, 598 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
596 {60, 0}, {60, 0}, {60, 0}, {60, 0}, 599 CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
597 } 600 }
598 }, 601 },
599 { 602 {
600 { 603 {
601 {60, 1}, {60, 1}, {60, 1}, {60, 1}, 604 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
602 {60, 1}, {60, 0}, {60, 0}, {60, 0}, 605 CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
603 } 606 }
604 }, 607 },
605 { 608 {
606 { 609 {
607 {60, 1}, {60, 1}, {60, 1}, {60, 1}, 610 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
608 {60, 1}, {60, 1}, {60, 1}, {60, 1}, 611 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
609 } 612 }
610 }, 613 },
611 { 614 {
612 { 615 {
613 {60, 1}, {60, 1}, {60, 0}, {60, 1}, 616 CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
614 {60, 1}, {60, 1}, {60, 1}, {60, 0}, 617 CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
615 } 618 }
616 }, 619 },
617 { 620 {
618 { 621 {
619 {60, 1}, {60, 0}, {60, 1}, {60, 1}, 622 CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
620 {60, 1}, {60, 1}, {60, 0}, {60, 1}, 623 CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
621 } 624 }
622 }, 625 },
623 } 626 }
@@ -1827,9 +1830,9 @@ static u16 ar9003_hw_get_direct_edge_power(struct ar9300_eeprom *eep,
1827 struct cal_ctl_data_5g *ctl_5g = eep->ctlPowerData_5G; 1830 struct cal_ctl_data_5g *ctl_5g = eep->ctlPowerData_5G;
1828 1831
1829 if (is2GHz) 1832 if (is2GHz)
1830 return ctl_2g[idx].ctlEdges[edge].tPower; 1833 return CTL_EDGE_TPOWER(ctl_2g[idx].ctlEdges[edge]);
1831 else 1834 else
1832 return ctl_5g[idx].ctlEdges[edge].tPower; 1835 return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge]);
1833} 1836}
1834 1837
1835static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep, 1838static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
@@ -1847,12 +1850,12 @@ static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
1847 1850
1848 if (is2GHz) { 1851 if (is2GHz) {
1849 if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 1) < freq && 1852 if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 1) < freq &&
1850 ctl_2g[idx].ctlEdges[edge - 1].flag) 1853 CTL_EDGE_FLAGS(ctl_2g[idx].ctlEdges[edge - 1]))
1851 return ctl_2g[idx].ctlEdges[edge - 1].tPower; 1854 return CTL_EDGE_TPOWER(ctl_2g[idx].ctlEdges[edge - 1]);
1852 } else { 1855 } else {
1853 if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 0) < freq && 1856 if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 0) < freq &&
1854 ctl_5g[idx].ctlEdges[edge - 1].flag) 1857 CTL_EDGE_FLAGS(ctl_5g[idx].ctlEdges[edge - 1]))
1855 return ctl_5g[idx].ctlEdges[edge - 1].tPower; 1858 return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge - 1]);
1856 } 1859 }
1857 1860
1858 return AR9300_MAX_RATE_POWER; 1861 return AR9300_MAX_RATE_POWER;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
index 3c533bb983c..655b3033396 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
@@ -261,17 +261,12 @@ struct cal_tgt_pow_ht {
261 u8 tPow2x[14]; 261 u8 tPow2x[14];
262} __packed; 262} __packed;
263 263
264struct cal_ctl_edge_pwr {
265 u8 tPower:6,
266 flag:2;
267} __packed;
268
269struct cal_ctl_data_2g { 264struct cal_ctl_data_2g {
270 struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_2G]; 265 u8 ctlEdges[AR9300_NUM_BAND_EDGES_2G];
271} __packed; 266} __packed;
272 267
273struct cal_ctl_data_5g { 268struct cal_ctl_data_5g {
274 struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G]; 269 u8 ctlEdges[AR9300_NUM_BAND_EDGES_5G];
275} __packed; 270} __packed;
276 271
277struct ar9300_eeprom { 272struct ar9300_eeprom {
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c
index 1266333f586..2bbf94d0191 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
@@ -240,16 +240,16 @@ u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower,
240 for (i = 0; (i < num_band_edges) && 240 for (i = 0; (i < num_band_edges) &&
241 (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) { 241 (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
242 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) { 242 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
243 twiceMaxEdgePower = pRdEdgesPower[i].tPower; 243 twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
244 break; 244 break;
245 } else if ((i > 0) && 245 } else if ((i > 0) &&
246 (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, 246 (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
247 is2GHz))) { 247 is2GHz))) {
248 if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel, 248 if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
249 is2GHz) < freq && 249 is2GHz) < freq &&
250 pRdEdgesPower[i - 1].flag) { 250 CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
251 twiceMaxEdgePower = 251 twiceMaxEdgePower =
252 pRdEdgesPower[i - 1].tPower; 252 CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
253 } 253 }
254 break; 254 break;
255 } 255 }
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h
index dacb45e1b90..41ad1fe6252 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -233,6 +233,9 @@
233 233
234#define AR9287_CHECKSUM_LOCATION (AR9287_EEP_START_LOC + 1) 234#define AR9287_CHECKSUM_LOCATION (AR9287_EEP_START_LOC + 1)
235 235
236#define CTL_EDGE_TPOWER(_ctl) ((_ctl) & 0x3f)
237#define CTL_EDGE_FLAGS(_ctl) (((_ctl) >> 6) & 0x03)
238
236enum eeprom_param { 239enum eeprom_param {
237 EEP_NFTHRESH_5, 240 EEP_NFTHRESH_5,
238 EEP_NFTHRESH_2, 241 EEP_NFTHRESH_2,
@@ -535,18 +538,10 @@ struct cal_target_power_ht {
535 u8 tPow2x[8]; 538 u8 tPow2x[8];
536} __packed; 539} __packed;
537 540
538
539#ifdef __BIG_ENDIAN_BITFIELD
540struct cal_ctl_edges {
541 u8 bChannel;
542 u8 flag:2, tPower:6;
543} __packed;
544#else
545struct cal_ctl_edges { 541struct cal_ctl_edges {
546 u8 bChannel; 542 u8 bChannel;
547 u8 tPower:6, flag:2; 543 u8 ctl;
548} __packed; 544} __packed;
549#endif
550 545
551struct cal_data_op_loop_ar9287 { 546struct cal_data_op_loop_ar9287 {
552 u8 pwrPdg[2][5]; 547 u8 pwrPdg[2][5];