diff options
author | Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com> | 2011-11-30 00:11:19 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-11-30 15:08:45 -0500 |
commit | f229f815d26acea2e51ef073ef73ea37406cca98 (patch) | |
tree | fc432699d6546e347aac7bd217ea92c5980e21e9 /drivers/net/wireless/ath/ath9k/mac.c | |
parent | 40dc5392e6bfcd62b3c09c68df8b73c2bc6adf2a (diff) |
ath9k_hw: take care of enabling MCI interrupts
enable MCI interrupt when ath9k_hw_enable_interrupts is called,
like during the completion of chip_reset before which the interrupts
are disabled
Cc: Wilson Tsao <wtsao@qca.qualcomm.com>
Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: Mohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/mac.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/mac.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c index ecdb6fd2907..9d693201b0b 100644 --- a/drivers/net/wireless/ath/ath9k/mac.c +++ b/drivers/net/wireless/ath/ath9k/mac.c | |||
@@ -798,6 +798,7 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah) | |||
798 | { | 798 | { |
799 | struct ath_common *common = ath9k_hw_common(ah); | 799 | struct ath_common *common = ath9k_hw_common(ah); |
800 | u32 sync_default = AR_INTR_SYNC_DEFAULT; | 800 | u32 sync_default = AR_INTR_SYNC_DEFAULT; |
801 | u32 async_mask; | ||
801 | 802 | ||
802 | if (!(ah->imask & ATH9K_INT_GLOBAL)) | 803 | if (!(ah->imask & ATH9K_INT_GLOBAL)) |
803 | return; | 804 | return; |
@@ -812,13 +813,16 @@ void ath9k_hw_enable_interrupts(struct ath_hw *ah) | |||
812 | if (AR_SREV_9340(ah)) | 813 | if (AR_SREV_9340(ah)) |
813 | sync_default &= ~AR_INTR_SYNC_HOST1_FATAL; | 814 | sync_default &= ~AR_INTR_SYNC_HOST1_FATAL; |
814 | 815 | ||
816 | async_mask = AR_INTR_MAC_IRQ; | ||
817 | |||
818 | if (ah->imask & ATH9K_INT_MCI) | ||
819 | async_mask |= AR_INTR_ASYNC_MASK_MCI; | ||
820 | |||
815 | ath_dbg(common, ATH_DBG_INTERRUPT, "enable IER\n"); | 821 | ath_dbg(common, ATH_DBG_INTERRUPT, "enable IER\n"); |
816 | REG_WRITE(ah, AR_IER, AR_IER_ENABLE); | 822 | REG_WRITE(ah, AR_IER, AR_IER_ENABLE); |
817 | if (!AR_SREV_9100(ah)) { | 823 | if (!AR_SREV_9100(ah)) { |
818 | REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, | 824 | REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, async_mask); |
819 | AR_INTR_MAC_IRQ); | 825 | REG_WRITE(ah, AR_INTR_ASYNC_MASK, async_mask); |
820 | REG_WRITE(ah, AR_INTR_ASYNC_MASK, AR_INTR_MAC_IRQ); | ||
821 | |||
822 | 826 | ||
823 | REG_WRITE(ah, AR_INTR_SYNC_ENABLE, sync_default); | 827 | REG_WRITE(ah, AR_INTR_SYNC_ENABLE, sync_default); |
824 | REG_WRITE(ah, AR_INTR_SYNC_MASK, sync_default); | 828 | REG_WRITE(ah, AR_INTR_SYNC_MASK, sync_default); |