ath9k_hw: Fix minimum CTL power for each runtime mode

The conformance test limits (CTL) for each regulatory domains
(FCC/ETSI/MKK) are programmed for each runtime modes (11B,11G,
HT20 and HT40) in EEPROM. The lowest ctledge power value of a
particular running mode should not be used while computing
ctledge power for a different running mode.(i.e 11G's min ctledge
power should not be used while computing ctledge power for HT20).

Currently, the code does not handle this properly which would
result in incorrect txpowers in certain cases. So reset the
twiceMaxEdgePower to the default while computing min ctlegepower
for every mode.

Cc: David Quan <dquan@qca.qualcomm.com>
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 2 insertions, 4 deletions

diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
index 9a7520f987f..61fcab0e2d7 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
@@ -473,7 +473,7 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
 
         int i;
         u16 twiceMinEdgePower;
-        u16 twiceMaxEdgePower = MAX_RATE_POWER;
+        u16 twiceMaxEdgePower;
         u16 scaledPower = 0, minCtlPower;
         u16 numCtlModes;
         const u16 *pCtlMode;
@@ -542,9 +542,7 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
                 else
                         freq = centers.ctl_center;
 
-                if (ah->eep_ops->get_eeprom_ver(ah) == 14 &&
-                    ah->eep_ops->get_eeprom_rev(ah) <= 2)
-                        twiceMaxEdgePower = MAX_RATE_POWER;
+                twiceMaxEdgePower = MAX_RATE_POWER;
 
                 for (i = 0; (i < AR5416_EEP4K_NUM_CTLS) &&
                              pEepData->ctlIndex[i]; i++) {