diff options
| author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2010-04-15 17:39:08 -0400 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2010-04-16 15:43:34 -0400 |
| commit | 400b738678bf6f0b65a76a4ec2925473ba3e06ff (patch) | |
| tree | 965f5e65f975db1913782a9b0f9abef881f89218 /drivers/net/wireless/ath/ath9k/ar9003_phy.h | |
| parent | 668602404d7398d841681c5e23fd8a9a45e4bb30 (diff) | |
ath9k_hw: abstract the AR_PHY_AGC_CONTROL register access
This is so we can share routines which access this register
on calib.c
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_phy.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.h | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index 70e647b13e0..4e1177dc24a 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h | |||
| @@ -359,7 +359,6 @@ | |||
| 359 | #define AR_PHY_SWITCH_COM_2 (AR_SM_BASE + 0x8c) | 359 | #define AR_PHY_SWITCH_COM_2 (AR_SM_BASE + 0x8c) |
| 360 | #define AR_PHY_RX_CHAINMASK (AR_SM_BASE + 0xa0) | 360 | #define AR_PHY_RX_CHAINMASK (AR_SM_BASE + 0xa0) |
| 361 | #define AR_PHY_CAL_CHAINMASK (AR_SM_BASE + 0xc0) | 361 | #define AR_PHY_CAL_CHAINMASK (AR_SM_BASE + 0xc0) |
| 362 | #define AR_PHY_AGC_CONTROL (AR_SM_BASE + 0xc4) | ||
| 363 | #define AR_PHY_CALMODE (AR_SM_BASE + 0xc8) | 362 | #define AR_PHY_CALMODE (AR_SM_BASE + 0xc8) |
| 364 | #define AR_PHY_FCAL_1 (AR_SM_BASE + 0xcc) | 363 | #define AR_PHY_FCAL_1 (AR_SM_BASE + 0xcc) |
| 365 | #define AR_PHY_FCAL_2_0 (AR_SM_BASE + 0xd0) | 364 | #define AR_PHY_FCAL_2_0 (AR_SM_BASE + 0xd0) |
| @@ -509,18 +508,6 @@ | |||
| 509 | #define AR_PHY_GC_ENABLE_DAC_FIFO 0x00000800 /* fifo between bb and dac */ | 508 | #define AR_PHY_GC_ENABLE_DAC_FIFO 0x00000800 /* fifo between bb and dac */ |
| 510 | #define AR_PHY_RX_DELAY_DELAY 0x00003FFF /* delay from wakeup to rx ena */ | 509 | #define AR_PHY_RX_DELAY_DELAY 0x00003FFF /* delay from wakeup to rx ena */ |
| 511 | 510 | ||
| 512 | #define AR_PHY_AGC_CONTROL_CAL 0x00000001 /* do internal calibration */ | ||
| 513 | #define AR_PHY_AGC_CONTROL_NF 0x00000002 /* do noise-floor calibration */ | ||
| 514 | #define AR_PHY_AGC_CONTROL_OFFSET_CAL 0x00000800 /* allow offset calibration */ | ||
| 515 | #define AR_PHY_AGC_CONTROL_ENABLE_NF 0x00008000 /* enable noise floor calibration to happen */ | ||
| 516 | #define AR_PHY_AGC_CONTROL_FLTR_CAL 0x00010000 /* allow tx filter calibration */ | ||
| 517 | #define AR_PHY_AGC_CONTROL_NO_UPDATE_NF 0x00020000 /* don't update noise floor automatically */ | ||
| 518 | #define AR_PHY_AGC_CONTROL_EXT_NF_PWR_MEAS 0x00040000 /* extend noise floor power measurement */ | ||
| 519 | #define AR_PHY_AGC_CONTROL_CLC_SUCCESS 0x00080000 /* carrier leak calibration done */ | ||
| 520 | |||
| 521 | #define AR_PHY_AGC_CONTROL_YCOK_MAX 0x000003c0 | ||
| 522 | #define AR_PHY_AGC_CONTROL_YCOK_MAX_S 6 | ||
| 523 | |||
| 524 | #define AR_PHY_CALMODE_IQ 0x00000000 | 511 | #define AR_PHY_CALMODE_IQ 0x00000000 |
| 525 | #define AR_PHY_CALMODE_ADC_GAIN 0x00000001 | 512 | #define AR_PHY_CALMODE_ADC_GAIN 0x00000001 |
| 526 | #define AR_PHY_CALMODE_ADC_DC_PER 0x00000002 | 513 | #define AR_PHY_CALMODE_ADC_DC_PER 0x00000002 |