diff options
author | Felix Fietkau <nbd@openwrt.org> | 2011-04-10 12:32:13 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-04-12 16:59:12 -0400 |
commit | c5e0a88aa2e0f42cdb4c79c977c52f6bc38ec160 (patch) | |
tree | c95a492a871537320c309e3cf3f9f45541824ff9 /drivers/net/wireless/ath/ath5k | |
parent | b1ad1b6febb7772583c98d9a879fbbdb82a726a7 (diff) |
ath5k: optimize tx descriptor setup
Use local variables to reduce the number of load/store operations on uncached
memory.
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath5k')
-rw-r--r-- | drivers/net/wireless/ath/ath5k/desc.c | 38 |
1 files changed, 20 insertions, 18 deletions
diff --git a/drivers/net/wireless/ath/ath5k/desc.c b/drivers/net/wireless/ath/ath5k/desc.c index 16b44ff7dd3..0a8a9efaf8b 100644 --- a/drivers/net/wireless/ath/ath5k/desc.c +++ b/drivers/net/wireless/ath/ath5k/desc.c | |||
@@ -184,6 +184,7 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | |||
184 | { | 184 | { |
185 | struct ath5k_hw_4w_tx_ctl *tx_ctl; | 185 | struct ath5k_hw_4w_tx_ctl *tx_ctl; |
186 | unsigned int frame_len; | 186 | unsigned int frame_len; |
187 | u32 txctl0 = 0, txctl1 = 0, txctl2 = 0, txctl3 = 0; | ||
187 | 188 | ||
188 | tx_ctl = &desc->ud.ds_tx5212.tx_ctl; | 189 | tx_ctl = &desc->ud.ds_tx5212.tx_ctl; |
189 | 190 | ||
@@ -209,7 +210,8 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | |||
209 | tx_power = AR5K_TUNE_MAX_TXPOWER; | 210 | tx_power = AR5K_TUNE_MAX_TXPOWER; |
210 | 211 | ||
211 | /* Clear descriptor */ | 212 | /* Clear descriptor */ |
212 | memset(&desc->ud.ds_tx5212, 0, sizeof(struct ath5k_hw_5212_tx_desc)); | 213 | memset(&desc->ud.ds_tx5212.tx_stat, 0, |
214 | sizeof(desc->ud.ds_tx5212.tx_stat)); | ||
213 | 215 | ||
214 | /* Setup control descriptor */ | 216 | /* Setup control descriptor */ |
215 | 217 | ||
@@ -221,7 +223,7 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | |||
221 | if (frame_len & ~AR5K_4W_TX_DESC_CTL0_FRAME_LEN) | 223 | if (frame_len & ~AR5K_4W_TX_DESC_CTL0_FRAME_LEN) |
222 | return -EINVAL; | 224 | return -EINVAL; |
223 | 225 | ||
224 | tx_ctl->tx_control_0 = frame_len & AR5K_4W_TX_DESC_CTL0_FRAME_LEN; | 226 | txctl0 = frame_len & AR5K_4W_TX_DESC_CTL0_FRAME_LEN; |
225 | 227 | ||
226 | /* Verify and set buffer length */ | 228 | /* Verify and set buffer length */ |
227 | 229 | ||
@@ -232,21 +234,17 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | |||
232 | if (pkt_len & ~AR5K_4W_TX_DESC_CTL1_BUF_LEN) | 234 | if (pkt_len & ~AR5K_4W_TX_DESC_CTL1_BUF_LEN) |
233 | return -EINVAL; | 235 | return -EINVAL; |
234 | 236 | ||
235 | tx_ctl->tx_control_1 = pkt_len & AR5K_4W_TX_DESC_CTL1_BUF_LEN; | 237 | txctl1 = pkt_len & AR5K_4W_TX_DESC_CTL1_BUF_LEN; |
236 | 238 | ||
237 | tx_ctl->tx_control_0 |= | 239 | txctl0 |= AR5K_REG_SM(tx_power, AR5K_4W_TX_DESC_CTL0_XMIT_POWER) | |
238 | AR5K_REG_SM(tx_power, AR5K_4W_TX_DESC_CTL0_XMIT_POWER) | | 240 | AR5K_REG_SM(antenna_mode, AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT); |
239 | AR5K_REG_SM(antenna_mode, AR5K_4W_TX_DESC_CTL0_ANT_MODE_XMIT); | 241 | txctl1 |= AR5K_REG_SM(type, AR5K_4W_TX_DESC_CTL1_FRAME_TYPE); |
240 | tx_ctl->tx_control_1 |= AR5K_REG_SM(type, | 242 | txctl2 = AR5K_REG_SM(tx_tries0, AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0); |
241 | AR5K_4W_TX_DESC_CTL1_FRAME_TYPE); | 243 | txctl3 = tx_rate0 & AR5K_4W_TX_DESC_CTL3_XMIT_RATE0; |
242 | tx_ctl->tx_control_2 = AR5K_REG_SM(tx_tries0, | ||
243 | AR5K_4W_TX_DESC_CTL2_XMIT_TRIES0); | ||
244 | tx_ctl->tx_control_3 = tx_rate0 & AR5K_4W_TX_DESC_CTL3_XMIT_RATE0; | ||
245 | 244 | ||
246 | #define _TX_FLAGS(_c, _flag) \ | 245 | #define _TX_FLAGS(_c, _flag) \ |
247 | if (flags & AR5K_TXDESC_##_flag) { \ | 246 | if (flags & AR5K_TXDESC_##_flag) { \ |
248 | tx_ctl->tx_control_##_c |= \ | 247 | txctl##_c |= AR5K_4W_TX_DESC_CTL##_c##_##_flag; \ |
249 | AR5K_4W_TX_DESC_CTL##_c##_##_flag; \ | ||
250 | } | 248 | } |
251 | 249 | ||
252 | _TX_FLAGS(0, CLRDMASK); | 250 | _TX_FLAGS(0, CLRDMASK); |
@@ -262,8 +260,8 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | |||
262 | * WEP crap | 260 | * WEP crap |
263 | */ | 261 | */ |
264 | if (key_index != AR5K_TXKEYIX_INVALID) { | 262 | if (key_index != AR5K_TXKEYIX_INVALID) { |
265 | tx_ctl->tx_control_0 |= AR5K_4W_TX_DESC_CTL0_ENCRYPT_KEY_VALID; | 263 | txctl0 |= AR5K_4W_TX_DESC_CTL0_ENCRYPT_KEY_VALID; |
266 | tx_ctl->tx_control_1 |= AR5K_REG_SM(key_index, | 264 | txctl1 |= AR5K_REG_SM(key_index, |
267 | AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_IDX); | 265 | AR5K_4W_TX_DESC_CTL1_ENCRYPT_KEY_IDX); |
268 | } | 266 | } |
269 | 267 | ||
@@ -274,12 +272,16 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah, | |||
274 | if ((flags & AR5K_TXDESC_RTSENA) && | 272 | if ((flags & AR5K_TXDESC_RTSENA) && |
275 | (flags & AR5K_TXDESC_CTSENA)) | 273 | (flags & AR5K_TXDESC_CTSENA)) |
276 | return -EINVAL; | 274 | return -EINVAL; |
277 | tx_ctl->tx_control_2 |= rtscts_duration & | 275 | txctl2 |= rtscts_duration & AR5K_4W_TX_DESC_CTL2_RTS_DURATION; |
278 | AR5K_4W_TX_DESC_CTL2_RTS_DURATION; | 276 | txctl3 |= AR5K_REG_SM(rtscts_rate, |
279 | tx_ctl->tx_control_3 |= AR5K_REG_SM(rtscts_rate, | ||
280 | AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE); | 277 | AR5K_4W_TX_DESC_CTL3_RTS_CTS_RATE); |
281 | } | 278 | } |
282 | 279 | ||
280 | tx_ctl->tx_control_0 = txctl0; | ||
281 | tx_ctl->tx_control_1 = txctl1; | ||
282 | tx_ctl->tx_control_2 = txctl2; | ||
283 | tx_ctl->tx_control_3 = txctl3; | ||
284 | |||
283 | return 0; | 285 | return 0; |
284 | } | 286 | } |
285 | 287 | ||