netxen: 128 memory controller support

Future revisions of the chip have 128 bit memory
transactions. Require drivers to implement rmw
in case of sub-128 bit accesses by driver. This
is mostly used by diagnostic tools.

Signed-off-by: Amit Kumar Salecha <amit@netxen.com>
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 6 insertions, 2 deletions

diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h
index 34613503262..d40fe33a4d8 100644
--- a/drivers/net/netxen/netxen_nic_hdr.h
+++ b/drivers/net/netxen/netxen_nic_hdr.h
@@ -678,10 +678,14 @@ enum {
 #define MIU_TEST_AGT_ADDR_HI            (0x08)
 #define MIU_TEST_AGT_WRDATA_LO          (0x10)
 #define MIU_TEST_AGT_WRDATA_HI          (0x14)
-#define MIU_TEST_AGT_WRDATA(i)          (0x10+(4*(i)))
+#define MIU_TEST_AGT_WRDATA_UPPER_LO    (0x20)
+#define MIU_TEST_AGT_WRDATA_UPPER_HI    (0x24)
+#define MIU_TEST_AGT_WRDATA(i)          (0x10+(0x10*((i)>>1))+(4*((i)&1)))
 #define MIU_TEST_AGT_RDDATA_LO          (0x18)
 #define MIU_TEST_AGT_RDDATA_HI          (0x1c)
-#define MIU_TEST_AGT_RDDATA(i)          (0x18+(4*(i)))
+#define MIU_TEST_AGT_RDDATA_UPPER_LO    (0x28)
+#define MIU_TEST_AGT_RDDATA_UPPER_HI    (0x2c)
+#define MIU_TEST_AGT_RDDATA(i)          (0x18+(0x10*((i)>>1))+(4*((i)&1)))
 
 #define MIU_TEST_AGT_ADDR_MASK          0xfffffff8
 #define MIU_TEST_AGT_UPPER_ADDR(off)    (0)