diff options
author | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-22 10:38:37 -0500 |
---|---|---|
committer | Jonathan Herman <hermanjl@cs.unc.edu> | 2013-01-22 10:38:37 -0500 |
commit | fcc9d2e5a6c89d22b8b773a64fb4ad21ac318446 (patch) | |
tree | a57612d1888735a2ec7972891b68c1ac5ec8faea /drivers/net/ixgbe/ixgbe_ethtool.c | |
parent | 8dea78da5cee153b8af9c07a2745f6c55057fe12 (diff) |
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_ethtool.c')
-rw-r--r-- | drivers/net/ixgbe/ixgbe_ethtool.c | 2592 |
1 files changed, 2592 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c new file mode 100644 index 00000000000..82d4244c6e1 --- /dev/null +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -0,0 +1,2592 @@ | |||
1 | /******************************************************************************* | ||
2 | |||
3 | Intel 10 Gigabit PCI Express Linux driver | ||
4 | Copyright(c) 1999 - 2011 Intel Corporation. | ||
5 | |||
6 | This program is free software; you can redistribute it and/or modify it | ||
7 | under the terms and conditions of the GNU General Public License, | ||
8 | version 2, as published by the Free Software Foundation. | ||
9 | |||
10 | This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | more details. | ||
14 | |||
15 | You should have received a copy of the GNU General Public License along with | ||
16 | this program; if not, write to the Free Software Foundation, Inc., | ||
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | |||
19 | The full GNU General Public License is included in this distribution in | ||
20 | the file called "COPYING". | ||
21 | |||
22 | Contact Information: | ||
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | ||
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
25 | |||
26 | *******************************************************************************/ | ||
27 | |||
28 | /* ethtool support for ixgbe */ | ||
29 | |||
30 | #include <linux/interrupt.h> | ||
31 | #include <linux/types.h> | ||
32 | #include <linux/module.h> | ||
33 | #include <linux/slab.h> | ||
34 | #include <linux/pci.h> | ||
35 | #include <linux/netdevice.h> | ||
36 | #include <linux/ethtool.h> | ||
37 | #include <linux/vmalloc.h> | ||
38 | #include <linux/uaccess.h> | ||
39 | |||
40 | #include "ixgbe.h" | ||
41 | |||
42 | |||
43 | #define IXGBE_ALL_RAR_ENTRIES 16 | ||
44 | |||
45 | enum {NETDEV_STATS, IXGBE_STATS}; | ||
46 | |||
47 | struct ixgbe_stats { | ||
48 | char stat_string[ETH_GSTRING_LEN]; | ||
49 | int type; | ||
50 | int sizeof_stat; | ||
51 | int stat_offset; | ||
52 | }; | ||
53 | |||
54 | #define IXGBE_STAT(m) IXGBE_STATS, \ | ||
55 | sizeof(((struct ixgbe_adapter *)0)->m), \ | ||
56 | offsetof(struct ixgbe_adapter, m) | ||
57 | #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \ | ||
58 | sizeof(((struct rtnl_link_stats64 *)0)->m), \ | ||
59 | offsetof(struct rtnl_link_stats64, m) | ||
60 | |||
61 | static struct ixgbe_stats ixgbe_gstrings_stats[] = { | ||
62 | {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)}, | ||
63 | {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)}, | ||
64 | {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)}, | ||
65 | {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)}, | ||
66 | {"rx_pkts_nic", IXGBE_STAT(stats.gprc)}, | ||
67 | {"tx_pkts_nic", IXGBE_STAT(stats.gptc)}, | ||
68 | {"rx_bytes_nic", IXGBE_STAT(stats.gorc)}, | ||
69 | {"tx_bytes_nic", IXGBE_STAT(stats.gotc)}, | ||
70 | {"lsc_int", IXGBE_STAT(lsc_int)}, | ||
71 | {"tx_busy", IXGBE_STAT(tx_busy)}, | ||
72 | {"non_eop_descs", IXGBE_STAT(non_eop_descs)}, | ||
73 | {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)}, | ||
74 | {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)}, | ||
75 | {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)}, | ||
76 | {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)}, | ||
77 | {"multicast", IXGBE_NETDEV_STAT(multicast)}, | ||
78 | {"broadcast", IXGBE_STAT(stats.bprc)}, | ||
79 | {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) }, | ||
80 | {"collisions", IXGBE_NETDEV_STAT(collisions)}, | ||
81 | {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)}, | ||
82 | {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)}, | ||
83 | {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)}, | ||
84 | {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)}, | ||
85 | {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)}, | ||
86 | {"fdir_match", IXGBE_STAT(stats.fdirmatch)}, | ||
87 | {"fdir_miss", IXGBE_STAT(stats.fdirmiss)}, | ||
88 | {"fdir_overflow", IXGBE_STAT(fdir_overflow)}, | ||
89 | {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)}, | ||
90 | {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)}, | ||
91 | {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)}, | ||
92 | {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)}, | ||
93 | {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)}, | ||
94 | {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)}, | ||
95 | {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)}, | ||
96 | {"tx_restart_queue", IXGBE_STAT(restart_queue)}, | ||
97 | {"rx_long_length_errors", IXGBE_STAT(stats.roc)}, | ||
98 | {"rx_short_length_errors", IXGBE_STAT(stats.ruc)}, | ||
99 | {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)}, | ||
100 | {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)}, | ||
101 | {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)}, | ||
102 | {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)}, | ||
103 | {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)}, | ||
104 | {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)}, | ||
105 | {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)}, | ||
106 | {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)}, | ||
107 | {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)}, | ||
108 | {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)}, | ||
109 | {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)}, | ||
110 | {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)}, | ||
111 | #ifdef IXGBE_FCOE | ||
112 | {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)}, | ||
113 | {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)}, | ||
114 | {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)}, | ||
115 | {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)}, | ||
116 | {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)}, | ||
117 | {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)}, | ||
118 | #endif /* IXGBE_FCOE */ | ||
119 | }; | ||
120 | |||
121 | #define IXGBE_QUEUE_STATS_LEN \ | ||
122 | ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \ | ||
123 | ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \ | ||
124 | (sizeof(struct ixgbe_queue_stats) / sizeof(u64))) | ||
125 | #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats) | ||
126 | #define IXGBE_PB_STATS_LEN ( \ | ||
127 | (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \ | ||
128 | IXGBE_FLAG_DCB_ENABLED) ? \ | ||
129 | (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \ | ||
130 | sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \ | ||
131 | sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \ | ||
132 | sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \ | ||
133 | / sizeof(u64) : 0) | ||
134 | #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \ | ||
135 | IXGBE_PB_STATS_LEN + \ | ||
136 | IXGBE_QUEUE_STATS_LEN) | ||
137 | |||
138 | static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { | ||
139 | "Register test (offline)", "Eeprom test (offline)", | ||
140 | "Interrupt test (offline)", "Loopback test (offline)", | ||
141 | "Link test (on/offline)" | ||
142 | }; | ||
143 | #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN | ||
144 | |||
145 | static int ixgbe_get_settings(struct net_device *netdev, | ||
146 | struct ethtool_cmd *ecmd) | ||
147 | { | ||
148 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
149 | struct ixgbe_hw *hw = &adapter->hw; | ||
150 | u32 link_speed = 0; | ||
151 | bool link_up; | ||
152 | |||
153 | ecmd->supported = SUPPORTED_10000baseT_Full; | ||
154 | ecmd->autoneg = AUTONEG_ENABLE; | ||
155 | ecmd->transceiver = XCVR_EXTERNAL; | ||
156 | if ((hw->phy.media_type == ixgbe_media_type_copper) || | ||
157 | (hw->phy.multispeed_fiber)) { | ||
158 | ecmd->supported |= (SUPPORTED_1000baseT_Full | | ||
159 | SUPPORTED_Autoneg); | ||
160 | |||
161 | switch (hw->mac.type) { | ||
162 | case ixgbe_mac_X540: | ||
163 | ecmd->supported |= SUPPORTED_100baseT_Full; | ||
164 | break; | ||
165 | default: | ||
166 | break; | ||
167 | } | ||
168 | |||
169 | ecmd->advertising = ADVERTISED_Autoneg; | ||
170 | if (hw->phy.autoneg_advertised) { | ||
171 | if (hw->phy.autoneg_advertised & | ||
172 | IXGBE_LINK_SPEED_100_FULL) | ||
173 | ecmd->advertising |= ADVERTISED_100baseT_Full; | ||
174 | if (hw->phy.autoneg_advertised & | ||
175 | IXGBE_LINK_SPEED_10GB_FULL) | ||
176 | ecmd->advertising |= ADVERTISED_10000baseT_Full; | ||
177 | if (hw->phy.autoneg_advertised & | ||
178 | IXGBE_LINK_SPEED_1GB_FULL) | ||
179 | ecmd->advertising |= ADVERTISED_1000baseT_Full; | ||
180 | } else { | ||
181 | /* | ||
182 | * Default advertised modes in case | ||
183 | * phy.autoneg_advertised isn't set. | ||
184 | */ | ||
185 | ecmd->advertising |= (ADVERTISED_10000baseT_Full | | ||
186 | ADVERTISED_1000baseT_Full); | ||
187 | if (hw->mac.type == ixgbe_mac_X540) | ||
188 | ecmd->advertising |= ADVERTISED_100baseT_Full; | ||
189 | } | ||
190 | |||
191 | if (hw->phy.media_type == ixgbe_media_type_copper) { | ||
192 | ecmd->supported |= SUPPORTED_TP; | ||
193 | ecmd->advertising |= ADVERTISED_TP; | ||
194 | ecmd->port = PORT_TP; | ||
195 | } else { | ||
196 | ecmd->supported |= SUPPORTED_FIBRE; | ||
197 | ecmd->advertising |= ADVERTISED_FIBRE; | ||
198 | ecmd->port = PORT_FIBRE; | ||
199 | } | ||
200 | } else if (hw->phy.media_type == ixgbe_media_type_backplane) { | ||
201 | /* Set as FIBRE until SERDES defined in kernel */ | ||
202 | if (hw->device_id == IXGBE_DEV_ID_82598_BX) { | ||
203 | ecmd->supported = (SUPPORTED_1000baseT_Full | | ||
204 | SUPPORTED_FIBRE); | ||
205 | ecmd->advertising = (ADVERTISED_1000baseT_Full | | ||
206 | ADVERTISED_FIBRE); | ||
207 | ecmd->port = PORT_FIBRE; | ||
208 | ecmd->autoneg = AUTONEG_DISABLE; | ||
209 | } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) || | ||
210 | (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) { | ||
211 | ecmd->supported |= (SUPPORTED_1000baseT_Full | | ||
212 | SUPPORTED_Autoneg | | ||
213 | SUPPORTED_FIBRE); | ||
214 | ecmd->advertising = (ADVERTISED_10000baseT_Full | | ||
215 | ADVERTISED_1000baseT_Full | | ||
216 | ADVERTISED_Autoneg | | ||
217 | ADVERTISED_FIBRE); | ||
218 | ecmd->port = PORT_FIBRE; | ||
219 | } else { | ||
220 | ecmd->supported |= (SUPPORTED_1000baseT_Full | | ||
221 | SUPPORTED_FIBRE); | ||
222 | ecmd->advertising = (ADVERTISED_10000baseT_Full | | ||
223 | ADVERTISED_1000baseT_Full | | ||
224 | ADVERTISED_FIBRE); | ||
225 | ecmd->port = PORT_FIBRE; | ||
226 | } | ||
227 | } else { | ||
228 | ecmd->supported |= SUPPORTED_FIBRE; | ||
229 | ecmd->advertising = (ADVERTISED_10000baseT_Full | | ||
230 | ADVERTISED_FIBRE); | ||
231 | ecmd->port = PORT_FIBRE; | ||
232 | ecmd->autoneg = AUTONEG_DISABLE; | ||
233 | } | ||
234 | |||
235 | /* Get PHY type */ | ||
236 | switch (adapter->hw.phy.type) { | ||
237 | case ixgbe_phy_tn: | ||
238 | case ixgbe_phy_aq: | ||
239 | case ixgbe_phy_cu_unknown: | ||
240 | /* Copper 10G-BASET */ | ||
241 | ecmd->port = PORT_TP; | ||
242 | break; | ||
243 | case ixgbe_phy_qt: | ||
244 | ecmd->port = PORT_FIBRE; | ||
245 | break; | ||
246 | case ixgbe_phy_nl: | ||
247 | case ixgbe_phy_sfp_passive_tyco: | ||
248 | case ixgbe_phy_sfp_passive_unknown: | ||
249 | case ixgbe_phy_sfp_ftl: | ||
250 | case ixgbe_phy_sfp_avago: | ||
251 | case ixgbe_phy_sfp_intel: | ||
252 | case ixgbe_phy_sfp_unknown: | ||
253 | switch (adapter->hw.phy.sfp_type) { | ||
254 | /* SFP+ devices, further checking needed */ | ||
255 | case ixgbe_sfp_type_da_cu: | ||
256 | case ixgbe_sfp_type_da_cu_core0: | ||
257 | case ixgbe_sfp_type_da_cu_core1: | ||
258 | ecmd->port = PORT_DA; | ||
259 | break; | ||
260 | case ixgbe_sfp_type_sr: | ||
261 | case ixgbe_sfp_type_lr: | ||
262 | case ixgbe_sfp_type_srlr_core0: | ||
263 | case ixgbe_sfp_type_srlr_core1: | ||
264 | ecmd->port = PORT_FIBRE; | ||
265 | break; | ||
266 | case ixgbe_sfp_type_not_present: | ||
267 | ecmd->port = PORT_NONE; | ||
268 | break; | ||
269 | case ixgbe_sfp_type_1g_cu_core0: | ||
270 | case ixgbe_sfp_type_1g_cu_core1: | ||
271 | ecmd->port = PORT_TP; | ||
272 | ecmd->supported = SUPPORTED_TP; | ||
273 | ecmd->advertising = (ADVERTISED_1000baseT_Full | | ||
274 | ADVERTISED_TP); | ||
275 | break; | ||
276 | case ixgbe_sfp_type_unknown: | ||
277 | default: | ||
278 | ecmd->port = PORT_OTHER; | ||
279 | break; | ||
280 | } | ||
281 | break; | ||
282 | case ixgbe_phy_xaui: | ||
283 | ecmd->port = PORT_NONE; | ||
284 | break; | ||
285 | case ixgbe_phy_unknown: | ||
286 | case ixgbe_phy_generic: | ||
287 | case ixgbe_phy_sfp_unsupported: | ||
288 | default: | ||
289 | ecmd->port = PORT_OTHER; | ||
290 | break; | ||
291 | } | ||
292 | |||
293 | hw->mac.ops.check_link(hw, &link_speed, &link_up, false); | ||
294 | if (link_up) { | ||
295 | switch (link_speed) { | ||
296 | case IXGBE_LINK_SPEED_10GB_FULL: | ||
297 | ethtool_cmd_speed_set(ecmd, SPEED_10000); | ||
298 | break; | ||
299 | case IXGBE_LINK_SPEED_1GB_FULL: | ||
300 | ethtool_cmd_speed_set(ecmd, SPEED_1000); | ||
301 | break; | ||
302 | case IXGBE_LINK_SPEED_100_FULL: | ||
303 | ethtool_cmd_speed_set(ecmd, SPEED_100); | ||
304 | break; | ||
305 | default: | ||
306 | break; | ||
307 | } | ||
308 | ecmd->duplex = DUPLEX_FULL; | ||
309 | } else { | ||
310 | ethtool_cmd_speed_set(ecmd, -1); | ||
311 | ecmd->duplex = -1; | ||
312 | } | ||
313 | |||
314 | return 0; | ||
315 | } | ||
316 | |||
317 | static int ixgbe_set_settings(struct net_device *netdev, | ||
318 | struct ethtool_cmd *ecmd) | ||
319 | { | ||
320 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
321 | struct ixgbe_hw *hw = &adapter->hw; | ||
322 | u32 advertised, old; | ||
323 | s32 err = 0; | ||
324 | |||
325 | if ((hw->phy.media_type == ixgbe_media_type_copper) || | ||
326 | (hw->phy.multispeed_fiber)) { | ||
327 | /* 10000/copper and 1000/copper must autoneg | ||
328 | * this function does not support any duplex forcing, but can | ||
329 | * limit the advertising of the adapter to only 10000 or 1000 */ | ||
330 | if (ecmd->autoneg == AUTONEG_DISABLE) | ||
331 | return -EINVAL; | ||
332 | |||
333 | old = hw->phy.autoneg_advertised; | ||
334 | advertised = 0; | ||
335 | if (ecmd->advertising & ADVERTISED_10000baseT_Full) | ||
336 | advertised |= IXGBE_LINK_SPEED_10GB_FULL; | ||
337 | |||
338 | if (ecmd->advertising & ADVERTISED_1000baseT_Full) | ||
339 | advertised |= IXGBE_LINK_SPEED_1GB_FULL; | ||
340 | |||
341 | if (ecmd->advertising & ADVERTISED_100baseT_Full) | ||
342 | advertised |= IXGBE_LINK_SPEED_100_FULL; | ||
343 | |||
344 | if (old == advertised) | ||
345 | return err; | ||
346 | /* this sets the link speed and restarts auto-neg */ | ||
347 | hw->mac.autotry_restart = true; | ||
348 | err = hw->mac.ops.setup_link(hw, advertised, true, true); | ||
349 | if (err) { | ||
350 | e_info(probe, "setup link failed with code %d\n", err); | ||
351 | hw->mac.ops.setup_link(hw, old, true, true); | ||
352 | } | ||
353 | } else { | ||
354 | /* in this case we currently only support 10Gb/FULL */ | ||
355 | u32 speed = ethtool_cmd_speed(ecmd); | ||
356 | if ((ecmd->autoneg == AUTONEG_ENABLE) || | ||
357 | (ecmd->advertising != ADVERTISED_10000baseT_Full) || | ||
358 | (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL)) | ||
359 | return -EINVAL; | ||
360 | } | ||
361 | |||
362 | return err; | ||
363 | } | ||
364 | |||
365 | static void ixgbe_get_pauseparam(struct net_device *netdev, | ||
366 | struct ethtool_pauseparam *pause) | ||
367 | { | ||
368 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
369 | struct ixgbe_hw *hw = &adapter->hw; | ||
370 | |||
371 | /* | ||
372 | * Flow Control Autoneg isn't on if | ||
373 | * - we didn't ask for it OR | ||
374 | * - it failed, we know this by tx & rx being off | ||
375 | */ | ||
376 | if (hw->fc.disable_fc_autoneg || | ||
377 | (hw->fc.current_mode == ixgbe_fc_none)) | ||
378 | pause->autoneg = 0; | ||
379 | else | ||
380 | pause->autoneg = 1; | ||
381 | |||
382 | if (hw->fc.current_mode == ixgbe_fc_rx_pause) { | ||
383 | pause->rx_pause = 1; | ||
384 | } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { | ||
385 | pause->tx_pause = 1; | ||
386 | } else if (hw->fc.current_mode == ixgbe_fc_full) { | ||
387 | pause->rx_pause = 1; | ||
388 | pause->tx_pause = 1; | ||
389 | #ifdef CONFIG_DCB | ||
390 | } else if (hw->fc.current_mode == ixgbe_fc_pfc) { | ||
391 | pause->rx_pause = 0; | ||
392 | pause->tx_pause = 0; | ||
393 | #endif | ||
394 | } | ||
395 | } | ||
396 | |||
397 | static int ixgbe_set_pauseparam(struct net_device *netdev, | ||
398 | struct ethtool_pauseparam *pause) | ||
399 | { | ||
400 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
401 | struct ixgbe_hw *hw = &adapter->hw; | ||
402 | struct ixgbe_fc_info fc; | ||
403 | |||
404 | #ifdef CONFIG_DCB | ||
405 | if (adapter->dcb_cfg.pfc_mode_enable || | ||
406 | ((hw->mac.type == ixgbe_mac_82598EB) && | ||
407 | (adapter->flags & IXGBE_FLAG_DCB_ENABLED))) | ||
408 | return -EINVAL; | ||
409 | |||
410 | #endif | ||
411 | fc = hw->fc; | ||
412 | |||
413 | if (pause->autoneg != AUTONEG_ENABLE) | ||
414 | fc.disable_fc_autoneg = true; | ||
415 | else | ||
416 | fc.disable_fc_autoneg = false; | ||
417 | |||
418 | if ((pause->rx_pause && pause->tx_pause) || pause->autoneg) | ||
419 | fc.requested_mode = ixgbe_fc_full; | ||
420 | else if (pause->rx_pause && !pause->tx_pause) | ||
421 | fc.requested_mode = ixgbe_fc_rx_pause; | ||
422 | else if (!pause->rx_pause && pause->tx_pause) | ||
423 | fc.requested_mode = ixgbe_fc_tx_pause; | ||
424 | else if (!pause->rx_pause && !pause->tx_pause) | ||
425 | fc.requested_mode = ixgbe_fc_none; | ||
426 | else | ||
427 | return -EINVAL; | ||
428 | |||
429 | #ifdef CONFIG_DCB | ||
430 | adapter->last_lfc_mode = fc.requested_mode; | ||
431 | #endif | ||
432 | |||
433 | /* if the thing changed then we'll update and use new autoneg */ | ||
434 | if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) { | ||
435 | hw->fc = fc; | ||
436 | if (netif_running(netdev)) | ||
437 | ixgbe_reinit_locked(adapter); | ||
438 | else | ||
439 | ixgbe_reset(adapter); | ||
440 | } | ||
441 | |||
442 | return 0; | ||
443 | } | ||
444 | |||
445 | static u32 ixgbe_get_msglevel(struct net_device *netdev) | ||
446 | { | ||
447 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
448 | return adapter->msg_enable; | ||
449 | } | ||
450 | |||
451 | static void ixgbe_set_msglevel(struct net_device *netdev, u32 data) | ||
452 | { | ||
453 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
454 | adapter->msg_enable = data; | ||
455 | } | ||
456 | |||
457 | static int ixgbe_get_regs_len(struct net_device *netdev) | ||
458 | { | ||
459 | #define IXGBE_REGS_LEN 1128 | ||
460 | return IXGBE_REGS_LEN * sizeof(u32); | ||
461 | } | ||
462 | |||
463 | #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ | ||
464 | |||
465 | static void ixgbe_get_regs(struct net_device *netdev, | ||
466 | struct ethtool_regs *regs, void *p) | ||
467 | { | ||
468 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
469 | struct ixgbe_hw *hw = &adapter->hw; | ||
470 | u32 *regs_buff = p; | ||
471 | u8 i; | ||
472 | |||
473 | memset(p, 0, IXGBE_REGS_LEN * sizeof(u32)); | ||
474 | |||
475 | regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id; | ||
476 | |||
477 | /* General Registers */ | ||
478 | regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL); | ||
479 | regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS); | ||
480 | regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); | ||
481 | regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP); | ||
482 | regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP); | ||
483 | regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL); | ||
484 | regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER); | ||
485 | regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER); | ||
486 | |||
487 | /* NVM Register */ | ||
488 | regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC); | ||
489 | regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD); | ||
490 | regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA); | ||
491 | regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL); | ||
492 | regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA); | ||
493 | regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL); | ||
494 | regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA); | ||
495 | regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT); | ||
496 | regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP); | ||
497 | regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC); | ||
498 | |||
499 | /* Interrupt */ | ||
500 | /* don't read EICR because it can clear interrupt causes, instead | ||
501 | * read EICS which is a shadow but doesn't clear EICR */ | ||
502 | regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS); | ||
503 | regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS); | ||
504 | regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS); | ||
505 | regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC); | ||
506 | regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC); | ||
507 | regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM); | ||
508 | regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0)); | ||
509 | regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0)); | ||
510 | regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT); | ||
511 | regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA); | ||
512 | regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0)); | ||
513 | regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE); | ||
514 | |||
515 | /* Flow Control */ | ||
516 | regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP); | ||
517 | regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0)); | ||
518 | regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1)); | ||
519 | regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2)); | ||
520 | regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3)); | ||
521 | for (i = 0; i < 8; i++) { | ||
522 | switch (hw->mac.type) { | ||
523 | case ixgbe_mac_82598EB: | ||
524 | regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i)); | ||
525 | regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i)); | ||
526 | break; | ||
527 | case ixgbe_mac_82599EB: | ||
528 | regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i)); | ||
529 | regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i)); | ||
530 | break; | ||
531 | default: | ||
532 | break; | ||
533 | } | ||
534 | } | ||
535 | regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV); | ||
536 | regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS); | ||
537 | |||
538 | /* Receive DMA */ | ||
539 | for (i = 0; i < 64; i++) | ||
540 | regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); | ||
541 | for (i = 0; i < 64; i++) | ||
542 | regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); | ||
543 | for (i = 0; i < 64; i++) | ||
544 | regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); | ||
545 | for (i = 0; i < 64; i++) | ||
546 | regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); | ||
547 | for (i = 0; i < 64; i++) | ||
548 | regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); | ||
549 | for (i = 0; i < 64; i++) | ||
550 | regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); | ||
551 | for (i = 0; i < 16; i++) | ||
552 | regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); | ||
553 | for (i = 0; i < 16; i++) | ||
554 | regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); | ||
555 | regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); | ||
556 | for (i = 0; i < 8; i++) | ||
557 | regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)); | ||
558 | regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL); | ||
559 | regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN); | ||
560 | |||
561 | /* Receive */ | ||
562 | regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM); | ||
563 | regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL); | ||
564 | for (i = 0; i < 16; i++) | ||
565 | regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i)); | ||
566 | for (i = 0; i < 16; i++) | ||
567 | regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i)); | ||
568 | regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0)); | ||
569 | regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL); | ||
570 | regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); | ||
571 | regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL); | ||
572 | regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC); | ||
573 | regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); | ||
574 | for (i = 0; i < 8; i++) | ||
575 | regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i)); | ||
576 | for (i = 0; i < 8; i++) | ||
577 | regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i)); | ||
578 | regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP); | ||
579 | |||
580 | /* Transmit */ | ||
581 | for (i = 0; i < 32; i++) | ||
582 | regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); | ||
583 | for (i = 0; i < 32; i++) | ||
584 | regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); | ||
585 | for (i = 0; i < 32; i++) | ||
586 | regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); | ||
587 | for (i = 0; i < 32; i++) | ||
588 | regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); | ||
589 | for (i = 0; i < 32; i++) | ||
590 | regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); | ||
591 | for (i = 0; i < 32; i++) | ||
592 | regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); | ||
593 | for (i = 0; i < 32; i++) | ||
594 | regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i)); | ||
595 | for (i = 0; i < 32; i++) | ||
596 | regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i)); | ||
597 | regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL); | ||
598 | for (i = 0; i < 16; i++) | ||
599 | regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); | ||
600 | regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG); | ||
601 | for (i = 0; i < 8; i++) | ||
602 | regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i)); | ||
603 | regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP); | ||
604 | |||
605 | /* Wake Up */ | ||
606 | regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC); | ||
607 | regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC); | ||
608 | regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS); | ||
609 | regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV); | ||
610 | regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT); | ||
611 | regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT); | ||
612 | regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL); | ||
613 | regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM); | ||
614 | regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0)); | ||
615 | |||
616 | /* DCB */ | ||
617 | regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); | ||
618 | regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS); | ||
619 | regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); | ||
620 | regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR); | ||
621 | for (i = 0; i < 8; i++) | ||
622 | regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i)); | ||
623 | for (i = 0; i < 8; i++) | ||
624 | regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i)); | ||
625 | for (i = 0; i < 8; i++) | ||
626 | regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i)); | ||
627 | for (i = 0; i < 8; i++) | ||
628 | regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i)); | ||
629 | for (i = 0; i < 8; i++) | ||
630 | regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); | ||
631 | for (i = 0; i < 8; i++) | ||
632 | regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); | ||
633 | |||
634 | /* Statistics */ | ||
635 | regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs); | ||
636 | regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc); | ||
637 | regs_buff[883] = IXGBE_GET_STAT(adapter, errbc); | ||
638 | regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc); | ||
639 | for (i = 0; i < 8; i++) | ||
640 | regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]); | ||
641 | regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc); | ||
642 | regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc); | ||
643 | regs_buff[895] = IXGBE_GET_STAT(adapter, rlec); | ||
644 | regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc); | ||
645 | regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc); | ||
646 | regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc); | ||
647 | regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc); | ||
648 | for (i = 0; i < 8; i++) | ||
649 | regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]); | ||
650 | for (i = 0; i < 8; i++) | ||
651 | regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]); | ||
652 | for (i = 0; i < 8; i++) | ||
653 | regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]); | ||
654 | for (i = 0; i < 8; i++) | ||
655 | regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]); | ||
656 | regs_buff[932] = IXGBE_GET_STAT(adapter, prc64); | ||
657 | regs_buff[933] = IXGBE_GET_STAT(adapter, prc127); | ||
658 | regs_buff[934] = IXGBE_GET_STAT(adapter, prc255); | ||
659 | regs_buff[935] = IXGBE_GET_STAT(adapter, prc511); | ||
660 | regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023); | ||
661 | regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522); | ||
662 | regs_buff[938] = IXGBE_GET_STAT(adapter, gprc); | ||
663 | regs_buff[939] = IXGBE_GET_STAT(adapter, bprc); | ||
664 | regs_buff[940] = IXGBE_GET_STAT(adapter, mprc); | ||
665 | regs_buff[941] = IXGBE_GET_STAT(adapter, gptc); | ||
666 | regs_buff[942] = IXGBE_GET_STAT(adapter, gorc); | ||
667 | regs_buff[944] = IXGBE_GET_STAT(adapter, gotc); | ||
668 | for (i = 0; i < 8; i++) | ||
669 | regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]); | ||
670 | regs_buff[954] = IXGBE_GET_STAT(adapter, ruc); | ||
671 | regs_buff[955] = IXGBE_GET_STAT(adapter, rfc); | ||
672 | regs_buff[956] = IXGBE_GET_STAT(adapter, roc); | ||
673 | regs_buff[957] = IXGBE_GET_STAT(adapter, rjc); | ||
674 | regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc); | ||
675 | regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc); | ||
676 | regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc); | ||
677 | regs_buff[961] = IXGBE_GET_STAT(adapter, tor); | ||
678 | regs_buff[963] = IXGBE_GET_STAT(adapter, tpr); | ||
679 | regs_buff[964] = IXGBE_GET_STAT(adapter, tpt); | ||
680 | regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64); | ||
681 | regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127); | ||
682 | regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255); | ||
683 | regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511); | ||
684 | regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023); | ||
685 | regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522); | ||
686 | regs_buff[971] = IXGBE_GET_STAT(adapter, mptc); | ||
687 | regs_buff[972] = IXGBE_GET_STAT(adapter, bptc); | ||
688 | regs_buff[973] = IXGBE_GET_STAT(adapter, xec); | ||
689 | for (i = 0; i < 16; i++) | ||
690 | regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]); | ||
691 | for (i = 0; i < 16; i++) | ||
692 | regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]); | ||
693 | for (i = 0; i < 16; i++) | ||
694 | regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]); | ||
695 | for (i = 0; i < 16; i++) | ||
696 | regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]); | ||
697 | |||
698 | /* MAC */ | ||
699 | regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG); | ||
700 | regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); | ||
701 | regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); | ||
702 | regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0); | ||
703 | regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1); | ||
704 | regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); | ||
705 | regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); | ||
706 | regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP); | ||
707 | regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP); | ||
708 | regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0); | ||
709 | regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1); | ||
710 | regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP); | ||
711 | regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA); | ||
712 | regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE); | ||
713 | regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD); | ||
714 | regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS); | ||
715 | regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA); | ||
716 | regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD); | ||
717 | regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD); | ||
718 | regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD); | ||
719 | regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG); | ||
720 | regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1); | ||
721 | regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2); | ||
722 | regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS); | ||
723 | regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC); | ||
724 | regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS); | ||
725 | regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC); | ||
726 | regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS); | ||
727 | regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2); | ||
728 | regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3); | ||
729 | regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1); | ||
730 | regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2); | ||
731 | regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); | ||
732 | |||
733 | /* Diagnostic */ | ||
734 | regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL); | ||
735 | for (i = 0; i < 8; i++) | ||
736 | regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i)); | ||
737 | regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN); | ||
738 | for (i = 0; i < 4; i++) | ||
739 | regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i)); | ||
740 | regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE); | ||
741 | regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL); | ||
742 | for (i = 0; i < 8; i++) | ||
743 | regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i)); | ||
744 | regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN); | ||
745 | for (i = 0; i < 4; i++) | ||
746 | regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i)); | ||
747 | regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE); | ||
748 | regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL); | ||
749 | regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0); | ||
750 | regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1); | ||
751 | regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2); | ||
752 | regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3); | ||
753 | regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL); | ||
754 | regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0); | ||
755 | regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1); | ||
756 | regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2); | ||
757 | regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3); | ||
758 | for (i = 0; i < 8; i++) | ||
759 | regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i)); | ||
760 | regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL); | ||
761 | regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1); | ||
762 | regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2); | ||
763 | regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1); | ||
764 | regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2); | ||
765 | regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS); | ||
766 | regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL); | ||
767 | regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC); | ||
768 | regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC); | ||
769 | } | ||
770 | |||
771 | static int ixgbe_get_eeprom_len(struct net_device *netdev) | ||
772 | { | ||
773 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
774 | return adapter->hw.eeprom.word_size * 2; | ||
775 | } | ||
776 | |||
777 | static int ixgbe_get_eeprom(struct net_device *netdev, | ||
778 | struct ethtool_eeprom *eeprom, u8 *bytes) | ||
779 | { | ||
780 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
781 | struct ixgbe_hw *hw = &adapter->hw; | ||
782 | u16 *eeprom_buff; | ||
783 | int first_word, last_word, eeprom_len; | ||
784 | int ret_val = 0; | ||
785 | u16 i; | ||
786 | |||
787 | if (eeprom->len == 0) | ||
788 | return -EINVAL; | ||
789 | |||
790 | eeprom->magic = hw->vendor_id | (hw->device_id << 16); | ||
791 | |||
792 | first_word = eeprom->offset >> 1; | ||
793 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | ||
794 | eeprom_len = last_word - first_word + 1; | ||
795 | |||
796 | eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL); | ||
797 | if (!eeprom_buff) | ||
798 | return -ENOMEM; | ||
799 | |||
800 | ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len, | ||
801 | eeprom_buff); | ||
802 | |||
803 | /* Device's eeprom is always little-endian, word addressable */ | ||
804 | for (i = 0; i < eeprom_len; i++) | ||
805 | le16_to_cpus(&eeprom_buff[i]); | ||
806 | |||
807 | memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); | ||
808 | kfree(eeprom_buff); | ||
809 | |||
810 | return ret_val; | ||
811 | } | ||
812 | |||
813 | static void ixgbe_get_drvinfo(struct net_device *netdev, | ||
814 | struct ethtool_drvinfo *drvinfo) | ||
815 | { | ||
816 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
817 | char firmware_version[32]; | ||
818 | |||
819 | strncpy(drvinfo->driver, ixgbe_driver_name, | ||
820 | sizeof(drvinfo->driver) - 1); | ||
821 | strncpy(drvinfo->version, ixgbe_driver_version, | ||
822 | sizeof(drvinfo->version) - 1); | ||
823 | |||
824 | snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d", | ||
825 | (adapter->eeprom_version & 0xF000) >> 12, | ||
826 | (adapter->eeprom_version & 0x0FF0) >> 4, | ||
827 | adapter->eeprom_version & 0x000F); | ||
828 | |||
829 | strncpy(drvinfo->fw_version, firmware_version, | ||
830 | sizeof(drvinfo->fw_version)); | ||
831 | strncpy(drvinfo->bus_info, pci_name(adapter->pdev), | ||
832 | sizeof(drvinfo->bus_info)); | ||
833 | drvinfo->n_stats = IXGBE_STATS_LEN; | ||
834 | drvinfo->testinfo_len = IXGBE_TEST_LEN; | ||
835 | drvinfo->regdump_len = ixgbe_get_regs_len(netdev); | ||
836 | } | ||
837 | |||
838 | static void ixgbe_get_ringparam(struct net_device *netdev, | ||
839 | struct ethtool_ringparam *ring) | ||
840 | { | ||
841 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
842 | struct ixgbe_ring *tx_ring = adapter->tx_ring[0]; | ||
843 | struct ixgbe_ring *rx_ring = adapter->rx_ring[0]; | ||
844 | |||
845 | ring->rx_max_pending = IXGBE_MAX_RXD; | ||
846 | ring->tx_max_pending = IXGBE_MAX_TXD; | ||
847 | ring->rx_mini_max_pending = 0; | ||
848 | ring->rx_jumbo_max_pending = 0; | ||
849 | ring->rx_pending = rx_ring->count; | ||
850 | ring->tx_pending = tx_ring->count; | ||
851 | ring->rx_mini_pending = 0; | ||
852 | ring->rx_jumbo_pending = 0; | ||
853 | } | ||
854 | |||
855 | static int ixgbe_set_ringparam(struct net_device *netdev, | ||
856 | struct ethtool_ringparam *ring) | ||
857 | { | ||
858 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
859 | struct ixgbe_ring *temp_tx_ring, *temp_rx_ring; | ||
860 | int i, err = 0; | ||
861 | u32 new_rx_count, new_tx_count; | ||
862 | bool need_update = false; | ||
863 | |||
864 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | ||
865 | return -EINVAL; | ||
866 | |||
867 | new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD); | ||
868 | new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD); | ||
869 | new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); | ||
870 | |||
871 | new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD); | ||
872 | new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD); | ||
873 | new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE); | ||
874 | |||
875 | if ((new_tx_count == adapter->tx_ring[0]->count) && | ||
876 | (new_rx_count == adapter->rx_ring[0]->count)) { | ||
877 | /* nothing to do */ | ||
878 | return 0; | ||
879 | } | ||
880 | |||
881 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) | ||
882 | usleep_range(1000, 2000); | ||
883 | |||
884 | if (!netif_running(adapter->netdev)) { | ||
885 | for (i = 0; i < adapter->num_tx_queues; i++) | ||
886 | adapter->tx_ring[i]->count = new_tx_count; | ||
887 | for (i = 0; i < adapter->num_rx_queues; i++) | ||
888 | adapter->rx_ring[i]->count = new_rx_count; | ||
889 | adapter->tx_ring_count = new_tx_count; | ||
890 | adapter->rx_ring_count = new_rx_count; | ||
891 | goto clear_reset; | ||
892 | } | ||
893 | |||
894 | temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring)); | ||
895 | if (!temp_tx_ring) { | ||
896 | err = -ENOMEM; | ||
897 | goto clear_reset; | ||
898 | } | ||
899 | |||
900 | if (new_tx_count != adapter->tx_ring_count) { | ||
901 | for (i = 0; i < adapter->num_tx_queues; i++) { | ||
902 | memcpy(&temp_tx_ring[i], adapter->tx_ring[i], | ||
903 | sizeof(struct ixgbe_ring)); | ||
904 | temp_tx_ring[i].count = new_tx_count; | ||
905 | err = ixgbe_setup_tx_resources(&temp_tx_ring[i]); | ||
906 | if (err) { | ||
907 | while (i) { | ||
908 | i--; | ||
909 | ixgbe_free_tx_resources(&temp_tx_ring[i]); | ||
910 | } | ||
911 | goto clear_reset; | ||
912 | } | ||
913 | } | ||
914 | need_update = true; | ||
915 | } | ||
916 | |||
917 | temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring)); | ||
918 | if (!temp_rx_ring) { | ||
919 | err = -ENOMEM; | ||
920 | goto err_setup; | ||
921 | } | ||
922 | |||
923 | if (new_rx_count != adapter->rx_ring_count) { | ||
924 | for (i = 0; i < adapter->num_rx_queues; i++) { | ||
925 | memcpy(&temp_rx_ring[i], adapter->rx_ring[i], | ||
926 | sizeof(struct ixgbe_ring)); | ||
927 | temp_rx_ring[i].count = new_rx_count; | ||
928 | err = ixgbe_setup_rx_resources(&temp_rx_ring[i]); | ||
929 | if (err) { | ||
930 | while (i) { | ||
931 | i--; | ||
932 | ixgbe_free_rx_resources(&temp_rx_ring[i]); | ||
933 | } | ||
934 | goto err_setup; | ||
935 | } | ||
936 | } | ||
937 | need_update = true; | ||
938 | } | ||
939 | |||
940 | /* if rings need to be updated, here's the place to do it in one shot */ | ||
941 | if (need_update) { | ||
942 | ixgbe_down(adapter); | ||
943 | |||
944 | /* tx */ | ||
945 | if (new_tx_count != adapter->tx_ring_count) { | ||
946 | for (i = 0; i < adapter->num_tx_queues; i++) { | ||
947 | ixgbe_free_tx_resources(adapter->tx_ring[i]); | ||
948 | memcpy(adapter->tx_ring[i], &temp_tx_ring[i], | ||
949 | sizeof(struct ixgbe_ring)); | ||
950 | } | ||
951 | adapter->tx_ring_count = new_tx_count; | ||
952 | } | ||
953 | |||
954 | /* rx */ | ||
955 | if (new_rx_count != adapter->rx_ring_count) { | ||
956 | for (i = 0; i < adapter->num_rx_queues; i++) { | ||
957 | ixgbe_free_rx_resources(adapter->rx_ring[i]); | ||
958 | memcpy(adapter->rx_ring[i], &temp_rx_ring[i], | ||
959 | sizeof(struct ixgbe_ring)); | ||
960 | } | ||
961 | adapter->rx_ring_count = new_rx_count; | ||
962 | } | ||
963 | ixgbe_up(adapter); | ||
964 | } | ||
965 | |||
966 | vfree(temp_rx_ring); | ||
967 | err_setup: | ||
968 | vfree(temp_tx_ring); | ||
969 | clear_reset: | ||
970 | clear_bit(__IXGBE_RESETTING, &adapter->state); | ||
971 | return err; | ||
972 | } | ||
973 | |||
974 | static int ixgbe_get_sset_count(struct net_device *netdev, int sset) | ||
975 | { | ||
976 | switch (sset) { | ||
977 | case ETH_SS_TEST: | ||
978 | return IXGBE_TEST_LEN; | ||
979 | case ETH_SS_STATS: | ||
980 | return IXGBE_STATS_LEN; | ||
981 | default: | ||
982 | return -EOPNOTSUPP; | ||
983 | } | ||
984 | } | ||
985 | |||
986 | static void ixgbe_get_ethtool_stats(struct net_device *netdev, | ||
987 | struct ethtool_stats *stats, u64 *data) | ||
988 | { | ||
989 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
990 | struct rtnl_link_stats64 temp; | ||
991 | const struct rtnl_link_stats64 *net_stats; | ||
992 | unsigned int start; | ||
993 | struct ixgbe_ring *ring; | ||
994 | int i, j; | ||
995 | char *p = NULL; | ||
996 | |||
997 | ixgbe_update_stats(adapter); | ||
998 | net_stats = dev_get_stats(netdev, &temp); | ||
999 | for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { | ||
1000 | switch (ixgbe_gstrings_stats[i].type) { | ||
1001 | case NETDEV_STATS: | ||
1002 | p = (char *) net_stats + | ||
1003 | ixgbe_gstrings_stats[i].stat_offset; | ||
1004 | break; | ||
1005 | case IXGBE_STATS: | ||
1006 | p = (char *) adapter + | ||
1007 | ixgbe_gstrings_stats[i].stat_offset; | ||
1008 | break; | ||
1009 | } | ||
1010 | |||
1011 | data[i] = (ixgbe_gstrings_stats[i].sizeof_stat == | ||
1012 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | ||
1013 | } | ||
1014 | for (j = 0; j < adapter->num_tx_queues; j++) { | ||
1015 | ring = adapter->tx_ring[j]; | ||
1016 | do { | ||
1017 | start = u64_stats_fetch_begin_bh(&ring->syncp); | ||
1018 | data[i] = ring->stats.packets; | ||
1019 | data[i+1] = ring->stats.bytes; | ||
1020 | } while (u64_stats_fetch_retry_bh(&ring->syncp, start)); | ||
1021 | i += 2; | ||
1022 | } | ||
1023 | for (j = 0; j < adapter->num_rx_queues; j++) { | ||
1024 | ring = adapter->rx_ring[j]; | ||
1025 | do { | ||
1026 | start = u64_stats_fetch_begin_bh(&ring->syncp); | ||
1027 | data[i] = ring->stats.packets; | ||
1028 | data[i+1] = ring->stats.bytes; | ||
1029 | } while (u64_stats_fetch_retry_bh(&ring->syncp, start)); | ||
1030 | i += 2; | ||
1031 | } | ||
1032 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | ||
1033 | for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) { | ||
1034 | data[i++] = adapter->stats.pxontxc[j]; | ||
1035 | data[i++] = adapter->stats.pxofftxc[j]; | ||
1036 | } | ||
1037 | for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) { | ||
1038 | data[i++] = adapter->stats.pxonrxc[j]; | ||
1039 | data[i++] = adapter->stats.pxoffrxc[j]; | ||
1040 | } | ||
1041 | } | ||
1042 | } | ||
1043 | |||
1044 | static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, | ||
1045 | u8 *data) | ||
1046 | { | ||
1047 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
1048 | char *p = (char *)data; | ||
1049 | int i; | ||
1050 | |||
1051 | switch (stringset) { | ||
1052 | case ETH_SS_TEST: | ||
1053 | memcpy(data, *ixgbe_gstrings_test, | ||
1054 | IXGBE_TEST_LEN * ETH_GSTRING_LEN); | ||
1055 | break; | ||
1056 | case ETH_SS_STATS: | ||
1057 | for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { | ||
1058 | memcpy(p, ixgbe_gstrings_stats[i].stat_string, | ||
1059 | ETH_GSTRING_LEN); | ||
1060 | p += ETH_GSTRING_LEN; | ||
1061 | } | ||
1062 | for (i = 0; i < adapter->num_tx_queues; i++) { | ||
1063 | sprintf(p, "tx_queue_%u_packets", i); | ||
1064 | p += ETH_GSTRING_LEN; | ||
1065 | sprintf(p, "tx_queue_%u_bytes", i); | ||
1066 | p += ETH_GSTRING_LEN; | ||
1067 | } | ||
1068 | for (i = 0; i < adapter->num_rx_queues; i++) { | ||
1069 | sprintf(p, "rx_queue_%u_packets", i); | ||
1070 | p += ETH_GSTRING_LEN; | ||
1071 | sprintf(p, "rx_queue_%u_bytes", i); | ||
1072 | p += ETH_GSTRING_LEN; | ||
1073 | } | ||
1074 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | ||
1075 | for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) { | ||
1076 | sprintf(p, "tx_pb_%u_pxon", i); | ||
1077 | p += ETH_GSTRING_LEN; | ||
1078 | sprintf(p, "tx_pb_%u_pxoff", i); | ||
1079 | p += ETH_GSTRING_LEN; | ||
1080 | } | ||
1081 | for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) { | ||
1082 | sprintf(p, "rx_pb_%u_pxon", i); | ||
1083 | p += ETH_GSTRING_LEN; | ||
1084 | sprintf(p, "rx_pb_%u_pxoff", i); | ||
1085 | p += ETH_GSTRING_LEN; | ||
1086 | } | ||
1087 | } | ||
1088 | /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */ | ||
1089 | break; | ||
1090 | } | ||
1091 | } | ||
1092 | |||
1093 | static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data) | ||
1094 | { | ||
1095 | struct ixgbe_hw *hw = &adapter->hw; | ||
1096 | bool link_up; | ||
1097 | u32 link_speed = 0; | ||
1098 | *data = 0; | ||
1099 | |||
1100 | hw->mac.ops.check_link(hw, &link_speed, &link_up, true); | ||
1101 | if (link_up) | ||
1102 | return *data; | ||
1103 | else | ||
1104 | *data = 1; | ||
1105 | return *data; | ||
1106 | } | ||
1107 | |||
1108 | /* ethtool register test data */ | ||
1109 | struct ixgbe_reg_test { | ||
1110 | u16 reg; | ||
1111 | u8 array_len; | ||
1112 | u8 test_type; | ||
1113 | u32 mask; | ||
1114 | u32 write; | ||
1115 | }; | ||
1116 | |||
1117 | /* In the hardware, registers are laid out either singly, in arrays | ||
1118 | * spaced 0x40 bytes apart, or in contiguous tables. We assume | ||
1119 | * most tests take place on arrays or single registers (handled | ||
1120 | * as a single-element array) and special-case the tables. | ||
1121 | * Table tests are always pattern tests. | ||
1122 | * | ||
1123 | * We also make provision for some required setup steps by specifying | ||
1124 | * registers to be written without any read-back testing. | ||
1125 | */ | ||
1126 | |||
1127 | #define PATTERN_TEST 1 | ||
1128 | #define SET_READ_TEST 2 | ||
1129 | #define WRITE_NO_TEST 3 | ||
1130 | #define TABLE32_TEST 4 | ||
1131 | #define TABLE64_TEST_LO 5 | ||
1132 | #define TABLE64_TEST_HI 6 | ||
1133 | |||
1134 | /* default 82599 register test */ | ||
1135 | static const struct ixgbe_reg_test reg_test_82599[] = { | ||
1136 | { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, | ||
1137 | { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, | ||
1138 | { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1139 | { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, | ||
1140 | { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 }, | ||
1141 | { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1142 | { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, | ||
1143 | { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, | ||
1144 | { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, | ||
1145 | { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, | ||
1146 | { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, | ||
1147 | { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1148 | { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, | ||
1149 | { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1150 | { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 }, | ||
1151 | { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 }, | ||
1152 | { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1153 | { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF }, | ||
1154 | { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1155 | { 0, 0, 0, 0 } | ||
1156 | }; | ||
1157 | |||
1158 | /* default 82598 register test */ | ||
1159 | static const struct ixgbe_reg_test reg_test_82598[] = { | ||
1160 | { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, | ||
1161 | { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, | ||
1162 | { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1163 | { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, | ||
1164 | { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, | ||
1165 | { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1166 | { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, | ||
1167 | /* Enable all four RX queues before testing. */ | ||
1168 | { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, | ||
1169 | /* RDH is read-only for 82598, only test RDT. */ | ||
1170 | { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, | ||
1171 | { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, | ||
1172 | { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, | ||
1173 | { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1174 | { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF }, | ||
1175 | { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, | ||
1176 | { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1177 | { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, | ||
1178 | { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 }, | ||
1179 | { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 }, | ||
1180 | { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1181 | { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF }, | ||
1182 | { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, | ||
1183 | { 0, 0, 0, 0 } | ||
1184 | }; | ||
1185 | |||
1186 | static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg, | ||
1187 | u32 mask, u32 write) | ||
1188 | { | ||
1189 | u32 pat, val, before; | ||
1190 | static const u32 test_pattern[] = { | ||
1191 | 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; | ||
1192 | |||
1193 | for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) { | ||
1194 | before = readl(adapter->hw.hw_addr + reg); | ||
1195 | writel((test_pattern[pat] & write), | ||
1196 | (adapter->hw.hw_addr + reg)); | ||
1197 | val = readl(adapter->hw.hw_addr + reg); | ||
1198 | if (val != (test_pattern[pat] & write & mask)) { | ||
1199 | e_err(drv, "pattern test reg %04X failed: got " | ||
1200 | "0x%08X expected 0x%08X\n", | ||
1201 | reg, val, (test_pattern[pat] & write & mask)); | ||
1202 | *data = reg; | ||
1203 | writel(before, adapter->hw.hw_addr + reg); | ||
1204 | return 1; | ||
1205 | } | ||
1206 | writel(before, adapter->hw.hw_addr + reg); | ||
1207 | } | ||
1208 | return 0; | ||
1209 | } | ||
1210 | |||
1211 | static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg, | ||
1212 | u32 mask, u32 write) | ||
1213 | { | ||
1214 | u32 val, before; | ||
1215 | before = readl(adapter->hw.hw_addr + reg); | ||
1216 | writel((write & mask), (adapter->hw.hw_addr + reg)); | ||
1217 | val = readl(adapter->hw.hw_addr + reg); | ||
1218 | if ((write & mask) != (val & mask)) { | ||
1219 | e_err(drv, "set/check reg %04X test failed: got 0x%08X " | ||
1220 | "expected 0x%08X\n", reg, (val & mask), (write & mask)); | ||
1221 | *data = reg; | ||
1222 | writel(before, (adapter->hw.hw_addr + reg)); | ||
1223 | return 1; | ||
1224 | } | ||
1225 | writel(before, (adapter->hw.hw_addr + reg)); | ||
1226 | return 0; | ||
1227 | } | ||
1228 | |||
1229 | #define REG_PATTERN_TEST(reg, mask, write) \ | ||
1230 | do { \ | ||
1231 | if (reg_pattern_test(adapter, data, reg, mask, write)) \ | ||
1232 | return 1; \ | ||
1233 | } while (0) \ | ||
1234 | |||
1235 | |||
1236 | #define REG_SET_AND_CHECK(reg, mask, write) \ | ||
1237 | do { \ | ||
1238 | if (reg_set_and_check(adapter, data, reg, mask, write)) \ | ||
1239 | return 1; \ | ||
1240 | } while (0) \ | ||
1241 | |||
1242 | static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) | ||
1243 | { | ||
1244 | const struct ixgbe_reg_test *test; | ||
1245 | u32 value, before, after; | ||
1246 | u32 i, toggle; | ||
1247 | |||
1248 | switch (adapter->hw.mac.type) { | ||
1249 | case ixgbe_mac_82598EB: | ||
1250 | toggle = 0x7FFFF3FF; | ||
1251 | test = reg_test_82598; | ||
1252 | break; | ||
1253 | case ixgbe_mac_82599EB: | ||
1254 | case ixgbe_mac_X540: | ||
1255 | toggle = 0x7FFFF30F; | ||
1256 | test = reg_test_82599; | ||
1257 | break; | ||
1258 | default: | ||
1259 | *data = 1; | ||
1260 | return 1; | ||
1261 | break; | ||
1262 | } | ||
1263 | |||
1264 | /* | ||
1265 | * Because the status register is such a special case, | ||
1266 | * we handle it separately from the rest of the register | ||
1267 | * tests. Some bits are read-only, some toggle, and some | ||
1268 | * are writeable on newer MACs. | ||
1269 | */ | ||
1270 | before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS); | ||
1271 | value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle); | ||
1272 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle); | ||
1273 | after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle; | ||
1274 | if (value != after) { | ||
1275 | e_err(drv, "failed STATUS register test got: 0x%08X " | ||
1276 | "expected: 0x%08X\n", after, value); | ||
1277 | *data = 1; | ||
1278 | return 1; | ||
1279 | } | ||
1280 | /* restore previous status */ | ||
1281 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before); | ||
1282 | |||
1283 | /* | ||
1284 | * Perform the remainder of the register test, looping through | ||
1285 | * the test table until we either fail or reach the null entry. | ||
1286 | */ | ||
1287 | while (test->reg) { | ||
1288 | for (i = 0; i < test->array_len; i++) { | ||
1289 | switch (test->test_type) { | ||
1290 | case PATTERN_TEST: | ||
1291 | REG_PATTERN_TEST(test->reg + (i * 0x40), | ||
1292 | test->mask, | ||
1293 | test->write); | ||
1294 | break; | ||
1295 | case SET_READ_TEST: | ||
1296 | REG_SET_AND_CHECK(test->reg + (i * 0x40), | ||
1297 | test->mask, | ||
1298 | test->write); | ||
1299 | break; | ||
1300 | case WRITE_NO_TEST: | ||
1301 | writel(test->write, | ||
1302 | (adapter->hw.hw_addr + test->reg) | ||
1303 | + (i * 0x40)); | ||
1304 | break; | ||
1305 | case TABLE32_TEST: | ||
1306 | REG_PATTERN_TEST(test->reg + (i * 4), | ||
1307 | test->mask, | ||
1308 | test->write); | ||
1309 | break; | ||
1310 | case TABLE64_TEST_LO: | ||
1311 | REG_PATTERN_TEST(test->reg + (i * 8), | ||
1312 | test->mask, | ||
1313 | test->write); | ||
1314 | break; | ||
1315 | case TABLE64_TEST_HI: | ||
1316 | REG_PATTERN_TEST((test->reg + 4) + (i * 8), | ||
1317 | test->mask, | ||
1318 | test->write); | ||
1319 | break; | ||
1320 | } | ||
1321 | } | ||
1322 | test++; | ||
1323 | } | ||
1324 | |||
1325 | *data = 0; | ||
1326 | return 0; | ||
1327 | } | ||
1328 | |||
1329 | static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data) | ||
1330 | { | ||
1331 | struct ixgbe_hw *hw = &adapter->hw; | ||
1332 | if (hw->eeprom.ops.validate_checksum(hw, NULL)) | ||
1333 | *data = 1; | ||
1334 | else | ||
1335 | *data = 0; | ||
1336 | return *data; | ||
1337 | } | ||
1338 | |||
1339 | static irqreturn_t ixgbe_test_intr(int irq, void *data) | ||
1340 | { | ||
1341 | struct net_device *netdev = (struct net_device *) data; | ||
1342 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
1343 | |||
1344 | adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR); | ||
1345 | |||
1346 | return IRQ_HANDLED; | ||
1347 | } | ||
1348 | |||
1349 | static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) | ||
1350 | { | ||
1351 | struct net_device *netdev = adapter->netdev; | ||
1352 | u32 mask, i = 0, shared_int = true; | ||
1353 | u32 irq = adapter->pdev->irq; | ||
1354 | |||
1355 | *data = 0; | ||
1356 | |||
1357 | /* Hook up test interrupt handler just for this test */ | ||
1358 | if (adapter->msix_entries) { | ||
1359 | /* NOTE: we don't test MSI-X interrupts here, yet */ | ||
1360 | return 0; | ||
1361 | } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { | ||
1362 | shared_int = false; | ||
1363 | if (request_irq(irq, ixgbe_test_intr, 0, netdev->name, | ||
1364 | netdev)) { | ||
1365 | *data = 1; | ||
1366 | return -1; | ||
1367 | } | ||
1368 | } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED, | ||
1369 | netdev->name, netdev)) { | ||
1370 | shared_int = false; | ||
1371 | } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED, | ||
1372 | netdev->name, netdev)) { | ||
1373 | *data = 1; | ||
1374 | return -1; | ||
1375 | } | ||
1376 | e_info(hw, "testing %s interrupt\n", shared_int ? | ||
1377 | "shared" : "unshared"); | ||
1378 | |||
1379 | /* Disable all the interrupts */ | ||
1380 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); | ||
1381 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1382 | usleep_range(10000, 20000); | ||
1383 | |||
1384 | /* Test each interrupt */ | ||
1385 | for (; i < 10; i++) { | ||
1386 | /* Interrupt to test */ | ||
1387 | mask = 1 << i; | ||
1388 | |||
1389 | if (!shared_int) { | ||
1390 | /* | ||
1391 | * Disable the interrupts to be reported in | ||
1392 | * the cause register and then force the same | ||
1393 | * interrupt and see if one gets posted. If | ||
1394 | * an interrupt was posted to the bus, the | ||
1395 | * test failed. | ||
1396 | */ | ||
1397 | adapter->test_icr = 0; | ||
1398 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, | ||
1399 | ~mask & 0x00007FFF); | ||
1400 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, | ||
1401 | ~mask & 0x00007FFF); | ||
1402 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1403 | usleep_range(10000, 20000); | ||
1404 | |||
1405 | if (adapter->test_icr & mask) { | ||
1406 | *data = 3; | ||
1407 | break; | ||
1408 | } | ||
1409 | } | ||
1410 | |||
1411 | /* | ||
1412 | * Enable the interrupt to be reported in the cause | ||
1413 | * register and then force the same interrupt and see | ||
1414 | * if one gets posted. If an interrupt was not posted | ||
1415 | * to the bus, the test failed. | ||
1416 | */ | ||
1417 | adapter->test_icr = 0; | ||
1418 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); | ||
1419 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); | ||
1420 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1421 | usleep_range(10000, 20000); | ||
1422 | |||
1423 | if (!(adapter->test_icr &mask)) { | ||
1424 | *data = 4; | ||
1425 | break; | ||
1426 | } | ||
1427 | |||
1428 | if (!shared_int) { | ||
1429 | /* | ||
1430 | * Disable the other interrupts to be reported in | ||
1431 | * the cause register and then force the other | ||
1432 | * interrupts and see if any get posted. If | ||
1433 | * an interrupt was posted to the bus, the | ||
1434 | * test failed. | ||
1435 | */ | ||
1436 | adapter->test_icr = 0; | ||
1437 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, | ||
1438 | ~mask & 0x00007FFF); | ||
1439 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, | ||
1440 | ~mask & 0x00007FFF); | ||
1441 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1442 | usleep_range(10000, 20000); | ||
1443 | |||
1444 | if (adapter->test_icr) { | ||
1445 | *data = 5; | ||
1446 | break; | ||
1447 | } | ||
1448 | } | ||
1449 | } | ||
1450 | |||
1451 | /* Disable all the interrupts */ | ||
1452 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); | ||
1453 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1454 | usleep_range(10000, 20000); | ||
1455 | |||
1456 | /* Unhook test interrupt handler */ | ||
1457 | free_irq(irq, netdev); | ||
1458 | |||
1459 | return *data; | ||
1460 | } | ||
1461 | |||
1462 | static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) | ||
1463 | { | ||
1464 | struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; | ||
1465 | struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; | ||
1466 | struct ixgbe_hw *hw = &adapter->hw; | ||
1467 | u32 reg_ctl; | ||
1468 | |||
1469 | /* shut down the DMA engines now so they can be reinitialized later */ | ||
1470 | |||
1471 | /* first Rx */ | ||
1472 | reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); | ||
1473 | reg_ctl &= ~IXGBE_RXCTRL_RXEN; | ||
1474 | IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl); | ||
1475 | ixgbe_disable_rx_queue(adapter, rx_ring); | ||
1476 | |||
1477 | /* now Tx */ | ||
1478 | reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx)); | ||
1479 | reg_ctl &= ~IXGBE_TXDCTL_ENABLE; | ||
1480 | IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl); | ||
1481 | |||
1482 | switch (hw->mac.type) { | ||
1483 | case ixgbe_mac_82599EB: | ||
1484 | case ixgbe_mac_X540: | ||
1485 | reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); | ||
1486 | reg_ctl &= ~IXGBE_DMATXCTL_TE; | ||
1487 | IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl); | ||
1488 | break; | ||
1489 | default: | ||
1490 | break; | ||
1491 | } | ||
1492 | |||
1493 | ixgbe_reset(adapter); | ||
1494 | |||
1495 | ixgbe_free_tx_resources(&adapter->test_tx_ring); | ||
1496 | ixgbe_free_rx_resources(&adapter->test_rx_ring); | ||
1497 | } | ||
1498 | |||
1499 | static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) | ||
1500 | { | ||
1501 | struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; | ||
1502 | struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; | ||
1503 | u32 rctl, reg_data; | ||
1504 | int ret_val; | ||
1505 | int err; | ||
1506 | |||
1507 | /* Setup Tx descriptor ring and Tx buffers */ | ||
1508 | tx_ring->count = IXGBE_DEFAULT_TXD; | ||
1509 | tx_ring->queue_index = 0; | ||
1510 | tx_ring->dev = &adapter->pdev->dev; | ||
1511 | tx_ring->netdev = adapter->netdev; | ||
1512 | tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx; | ||
1513 | tx_ring->numa_node = adapter->node; | ||
1514 | |||
1515 | err = ixgbe_setup_tx_resources(tx_ring); | ||
1516 | if (err) | ||
1517 | return 1; | ||
1518 | |||
1519 | switch (adapter->hw.mac.type) { | ||
1520 | case ixgbe_mac_82599EB: | ||
1521 | case ixgbe_mac_X540: | ||
1522 | reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); | ||
1523 | reg_data |= IXGBE_DMATXCTL_TE; | ||
1524 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); | ||
1525 | break; | ||
1526 | default: | ||
1527 | break; | ||
1528 | } | ||
1529 | |||
1530 | ixgbe_configure_tx_ring(adapter, tx_ring); | ||
1531 | |||
1532 | /* Setup Rx Descriptor ring and Rx buffers */ | ||
1533 | rx_ring->count = IXGBE_DEFAULT_RXD; | ||
1534 | rx_ring->queue_index = 0; | ||
1535 | rx_ring->dev = &adapter->pdev->dev; | ||
1536 | rx_ring->netdev = adapter->netdev; | ||
1537 | rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx; | ||
1538 | rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048; | ||
1539 | rx_ring->numa_node = adapter->node; | ||
1540 | |||
1541 | err = ixgbe_setup_rx_resources(rx_ring); | ||
1542 | if (err) { | ||
1543 | ret_val = 4; | ||
1544 | goto err_nomem; | ||
1545 | } | ||
1546 | |||
1547 | rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); | ||
1548 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN); | ||
1549 | |||
1550 | ixgbe_configure_rx_ring(adapter, rx_ring); | ||
1551 | |||
1552 | rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS; | ||
1553 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl); | ||
1554 | |||
1555 | return 0; | ||
1556 | |||
1557 | err_nomem: | ||
1558 | ixgbe_free_desc_rings(adapter); | ||
1559 | return ret_val; | ||
1560 | } | ||
1561 | |||
1562 | static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter) | ||
1563 | { | ||
1564 | struct ixgbe_hw *hw = &adapter->hw; | ||
1565 | u32 reg_data; | ||
1566 | |||
1567 | /* X540 needs to set the MACC.FLU bit to force link up */ | ||
1568 | if (adapter->hw.mac.type == ixgbe_mac_X540) { | ||
1569 | reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_MACC); | ||
1570 | reg_data |= IXGBE_MACC_FLU; | ||
1571 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_MACC, reg_data); | ||
1572 | } | ||
1573 | |||
1574 | /* right now we only support MAC loopback in the driver */ | ||
1575 | reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); | ||
1576 | /* Setup MAC loopback */ | ||
1577 | reg_data |= IXGBE_HLREG0_LPBK; | ||
1578 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); | ||
1579 | |||
1580 | reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL); | ||
1581 | reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; | ||
1582 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data); | ||
1583 | |||
1584 | reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC); | ||
1585 | reg_data &= ~IXGBE_AUTOC_LMS_MASK; | ||
1586 | reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU; | ||
1587 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data); | ||
1588 | IXGBE_WRITE_FLUSH(&adapter->hw); | ||
1589 | usleep_range(10000, 20000); | ||
1590 | |||
1591 | /* Disable Atlas Tx lanes; re-enabled in reset path */ | ||
1592 | if (hw->mac.type == ixgbe_mac_82598EB) { | ||
1593 | u8 atlas; | ||
1594 | |||
1595 | hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas); | ||
1596 | atlas |= IXGBE_ATLAS_PDN_TX_REG_EN; | ||
1597 | hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas); | ||
1598 | |||
1599 | hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas); | ||
1600 | atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL; | ||
1601 | hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas); | ||
1602 | |||
1603 | hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas); | ||
1604 | atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL; | ||
1605 | hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas); | ||
1606 | |||
1607 | hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas); | ||
1608 | atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL; | ||
1609 | hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas); | ||
1610 | } | ||
1611 | |||
1612 | return 0; | ||
1613 | } | ||
1614 | |||
1615 | static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter) | ||
1616 | { | ||
1617 | u32 reg_data; | ||
1618 | |||
1619 | reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); | ||
1620 | reg_data &= ~IXGBE_HLREG0_LPBK; | ||
1621 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); | ||
1622 | } | ||
1623 | |||
1624 | static void ixgbe_create_lbtest_frame(struct sk_buff *skb, | ||
1625 | unsigned int frame_size) | ||
1626 | { | ||
1627 | memset(skb->data, 0xFF, frame_size); | ||
1628 | frame_size &= ~1; | ||
1629 | memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1); | ||
1630 | memset(&skb->data[frame_size / 2 + 10], 0xBE, 1); | ||
1631 | memset(&skb->data[frame_size / 2 + 12], 0xAF, 1); | ||
1632 | } | ||
1633 | |||
1634 | static int ixgbe_check_lbtest_frame(struct sk_buff *skb, | ||
1635 | unsigned int frame_size) | ||
1636 | { | ||
1637 | frame_size &= ~1; | ||
1638 | if (*(skb->data + 3) == 0xFF) { | ||
1639 | if ((*(skb->data + frame_size / 2 + 10) == 0xBE) && | ||
1640 | (*(skb->data + frame_size / 2 + 12) == 0xAF)) { | ||
1641 | return 0; | ||
1642 | } | ||
1643 | } | ||
1644 | return 13; | ||
1645 | } | ||
1646 | |||
1647 | static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, | ||
1648 | struct ixgbe_ring *tx_ring, | ||
1649 | unsigned int size) | ||
1650 | { | ||
1651 | union ixgbe_adv_rx_desc *rx_desc; | ||
1652 | struct ixgbe_rx_buffer *rx_buffer_info; | ||
1653 | struct ixgbe_tx_buffer *tx_buffer_info; | ||
1654 | const int bufsz = rx_ring->rx_buf_len; | ||
1655 | u32 staterr; | ||
1656 | u16 rx_ntc, tx_ntc, count = 0; | ||
1657 | |||
1658 | /* initialize next to clean and descriptor values */ | ||
1659 | rx_ntc = rx_ring->next_to_clean; | ||
1660 | tx_ntc = tx_ring->next_to_clean; | ||
1661 | rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc); | ||
1662 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | ||
1663 | |||
1664 | while (staterr & IXGBE_RXD_STAT_DD) { | ||
1665 | /* check Rx buffer */ | ||
1666 | rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc]; | ||
1667 | |||
1668 | /* unmap Rx buffer, will be remapped by alloc_rx_buffers */ | ||
1669 | dma_unmap_single(rx_ring->dev, | ||
1670 | rx_buffer_info->dma, | ||
1671 | bufsz, | ||
1672 | DMA_FROM_DEVICE); | ||
1673 | rx_buffer_info->dma = 0; | ||
1674 | |||
1675 | /* verify contents of skb */ | ||
1676 | if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size)) | ||
1677 | count++; | ||
1678 | |||
1679 | /* unmap buffer on Tx side */ | ||
1680 | tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc]; | ||
1681 | ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info); | ||
1682 | |||
1683 | /* increment Rx/Tx next to clean counters */ | ||
1684 | rx_ntc++; | ||
1685 | if (rx_ntc == rx_ring->count) | ||
1686 | rx_ntc = 0; | ||
1687 | tx_ntc++; | ||
1688 | if (tx_ntc == tx_ring->count) | ||
1689 | tx_ntc = 0; | ||
1690 | |||
1691 | /* fetch next descriptor */ | ||
1692 | rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc); | ||
1693 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | ||
1694 | } | ||
1695 | |||
1696 | /* re-map buffers to ring, store next to clean values */ | ||
1697 | ixgbe_alloc_rx_buffers(rx_ring, count); | ||
1698 | rx_ring->next_to_clean = rx_ntc; | ||
1699 | tx_ring->next_to_clean = tx_ntc; | ||
1700 | |||
1701 | return count; | ||
1702 | } | ||
1703 | |||
1704 | static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) | ||
1705 | { | ||
1706 | struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; | ||
1707 | struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; | ||
1708 | int i, j, lc, good_cnt, ret_val = 0; | ||
1709 | unsigned int size = 1024; | ||
1710 | netdev_tx_t tx_ret_val; | ||
1711 | struct sk_buff *skb; | ||
1712 | |||
1713 | /* allocate test skb */ | ||
1714 | skb = alloc_skb(size, GFP_KERNEL); | ||
1715 | if (!skb) | ||
1716 | return 11; | ||
1717 | |||
1718 | /* place data into test skb */ | ||
1719 | ixgbe_create_lbtest_frame(skb, size); | ||
1720 | skb_put(skb, size); | ||
1721 | |||
1722 | /* | ||
1723 | * Calculate the loop count based on the largest descriptor ring | ||
1724 | * The idea is to wrap the largest ring a number of times using 64 | ||
1725 | * send/receive pairs during each loop | ||
1726 | */ | ||
1727 | |||
1728 | if (rx_ring->count <= tx_ring->count) | ||
1729 | lc = ((tx_ring->count / 64) * 2) + 1; | ||
1730 | else | ||
1731 | lc = ((rx_ring->count / 64) * 2) + 1; | ||
1732 | |||
1733 | for (j = 0; j <= lc; j++) { | ||
1734 | /* reset count of good packets */ | ||
1735 | good_cnt = 0; | ||
1736 | |||
1737 | /* place 64 packets on the transmit queue*/ | ||
1738 | for (i = 0; i < 64; i++) { | ||
1739 | skb_get(skb); | ||
1740 | tx_ret_val = ixgbe_xmit_frame_ring(skb, | ||
1741 | adapter, | ||
1742 | tx_ring); | ||
1743 | if (tx_ret_val == NETDEV_TX_OK) | ||
1744 | good_cnt++; | ||
1745 | } | ||
1746 | |||
1747 | if (good_cnt != 64) { | ||
1748 | ret_val = 12; | ||
1749 | break; | ||
1750 | } | ||
1751 | |||
1752 | /* allow 200 milliseconds for packets to go from Tx to Rx */ | ||
1753 | msleep(200); | ||
1754 | |||
1755 | good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size); | ||
1756 | if (good_cnt != 64) { | ||
1757 | ret_val = 13; | ||
1758 | break; | ||
1759 | } | ||
1760 | } | ||
1761 | |||
1762 | /* free the original skb */ | ||
1763 | kfree_skb(skb); | ||
1764 | |||
1765 | return ret_val; | ||
1766 | } | ||
1767 | |||
1768 | static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data) | ||
1769 | { | ||
1770 | *data = ixgbe_setup_desc_rings(adapter); | ||
1771 | if (*data) | ||
1772 | goto out; | ||
1773 | *data = ixgbe_setup_loopback_test(adapter); | ||
1774 | if (*data) | ||
1775 | goto err_loopback; | ||
1776 | *data = ixgbe_run_loopback_test(adapter); | ||
1777 | ixgbe_loopback_cleanup(adapter); | ||
1778 | |||
1779 | err_loopback: | ||
1780 | ixgbe_free_desc_rings(adapter); | ||
1781 | out: | ||
1782 | return *data; | ||
1783 | } | ||
1784 | |||
1785 | static void ixgbe_diag_test(struct net_device *netdev, | ||
1786 | struct ethtool_test *eth_test, u64 *data) | ||
1787 | { | ||
1788 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
1789 | bool if_running = netif_running(netdev); | ||
1790 | |||
1791 | set_bit(__IXGBE_TESTING, &adapter->state); | ||
1792 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { | ||
1793 | /* Offline tests */ | ||
1794 | |||
1795 | e_info(hw, "offline testing starting\n"); | ||
1796 | |||
1797 | /* Link test performed before hardware reset so autoneg doesn't | ||
1798 | * interfere with test result */ | ||
1799 | if (ixgbe_link_test(adapter, &data[4])) | ||
1800 | eth_test->flags |= ETH_TEST_FL_FAILED; | ||
1801 | |||
1802 | if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { | ||
1803 | int i; | ||
1804 | for (i = 0; i < adapter->num_vfs; i++) { | ||
1805 | if (adapter->vfinfo[i].clear_to_send) { | ||
1806 | netdev_warn(netdev, "%s", | ||
1807 | "offline diagnostic is not " | ||
1808 | "supported when VFs are " | ||
1809 | "present\n"); | ||
1810 | data[0] = 1; | ||
1811 | data[1] = 1; | ||
1812 | data[2] = 1; | ||
1813 | data[3] = 1; | ||
1814 | eth_test->flags |= ETH_TEST_FL_FAILED; | ||
1815 | clear_bit(__IXGBE_TESTING, | ||
1816 | &adapter->state); | ||
1817 | goto skip_ol_tests; | ||
1818 | } | ||
1819 | } | ||
1820 | } | ||
1821 | |||
1822 | if (if_running) | ||
1823 | /* indicate we're in test mode */ | ||
1824 | dev_close(netdev); | ||
1825 | else | ||
1826 | ixgbe_reset(adapter); | ||
1827 | |||
1828 | e_info(hw, "register testing starting\n"); | ||
1829 | if (ixgbe_reg_test(adapter, &data[0])) | ||
1830 | eth_test->flags |= ETH_TEST_FL_FAILED; | ||
1831 | |||
1832 | ixgbe_reset(adapter); | ||
1833 | e_info(hw, "eeprom testing starting\n"); | ||
1834 | if (ixgbe_eeprom_test(adapter, &data[1])) | ||
1835 | eth_test->flags |= ETH_TEST_FL_FAILED; | ||
1836 | |||
1837 | ixgbe_reset(adapter); | ||
1838 | e_info(hw, "interrupt testing starting\n"); | ||
1839 | if (ixgbe_intr_test(adapter, &data[2])) | ||
1840 | eth_test->flags |= ETH_TEST_FL_FAILED; | ||
1841 | |||
1842 | /* If SRIOV or VMDq is enabled then skip MAC | ||
1843 | * loopback diagnostic. */ | ||
1844 | if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | | ||
1845 | IXGBE_FLAG_VMDQ_ENABLED)) { | ||
1846 | e_info(hw, "Skip MAC loopback diagnostic in VT " | ||
1847 | "mode\n"); | ||
1848 | data[3] = 0; | ||
1849 | goto skip_loopback; | ||
1850 | } | ||
1851 | |||
1852 | ixgbe_reset(adapter); | ||
1853 | e_info(hw, "loopback testing starting\n"); | ||
1854 | if (ixgbe_loopback_test(adapter, &data[3])) | ||
1855 | eth_test->flags |= ETH_TEST_FL_FAILED; | ||
1856 | |||
1857 | skip_loopback: | ||
1858 | ixgbe_reset(adapter); | ||
1859 | |||
1860 | clear_bit(__IXGBE_TESTING, &adapter->state); | ||
1861 | if (if_running) | ||
1862 | dev_open(netdev); | ||
1863 | } else { | ||
1864 | e_info(hw, "online testing starting\n"); | ||
1865 | /* Online tests */ | ||
1866 | if (ixgbe_link_test(adapter, &data[4])) | ||
1867 | eth_test->flags |= ETH_TEST_FL_FAILED; | ||
1868 | |||
1869 | /* Online tests aren't run; pass by default */ | ||
1870 | data[0] = 0; | ||
1871 | data[1] = 0; | ||
1872 | data[2] = 0; | ||
1873 | data[3] = 0; | ||
1874 | |||
1875 | clear_bit(__IXGBE_TESTING, &adapter->state); | ||
1876 | } | ||
1877 | skip_ol_tests: | ||
1878 | msleep_interruptible(4 * 1000); | ||
1879 | } | ||
1880 | |||
1881 | static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter, | ||
1882 | struct ethtool_wolinfo *wol) | ||
1883 | { | ||
1884 | struct ixgbe_hw *hw = &adapter->hw; | ||
1885 | int retval = 1; | ||
1886 | |||
1887 | /* WOL not supported except for the following */ | ||
1888 | switch(hw->device_id) { | ||
1889 | case IXGBE_DEV_ID_82599_SFP: | ||
1890 | /* Only this subdevice supports WOL */ | ||
1891 | if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) { | ||
1892 | wol->supported = 0; | ||
1893 | break; | ||
1894 | } | ||
1895 | retval = 0; | ||
1896 | break; | ||
1897 | case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: | ||
1898 | /* All except this subdevice support WOL */ | ||
1899 | if (hw->subsystem_device_id == | ||
1900 | IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) { | ||
1901 | wol->supported = 0; | ||
1902 | break; | ||
1903 | } | ||
1904 | retval = 0; | ||
1905 | break; | ||
1906 | case IXGBE_DEV_ID_82599_KX4: | ||
1907 | retval = 0; | ||
1908 | break; | ||
1909 | default: | ||
1910 | wol->supported = 0; | ||
1911 | } | ||
1912 | |||
1913 | return retval; | ||
1914 | } | ||
1915 | |||
1916 | static void ixgbe_get_wol(struct net_device *netdev, | ||
1917 | struct ethtool_wolinfo *wol) | ||
1918 | { | ||
1919 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
1920 | |||
1921 | wol->supported = WAKE_UCAST | WAKE_MCAST | | ||
1922 | WAKE_BCAST | WAKE_MAGIC; | ||
1923 | wol->wolopts = 0; | ||
1924 | |||
1925 | if (ixgbe_wol_exclusion(adapter, wol) || | ||
1926 | !device_can_wakeup(&adapter->pdev->dev)) | ||
1927 | return; | ||
1928 | |||
1929 | if (adapter->wol & IXGBE_WUFC_EX) | ||
1930 | wol->wolopts |= WAKE_UCAST; | ||
1931 | if (adapter->wol & IXGBE_WUFC_MC) | ||
1932 | wol->wolopts |= WAKE_MCAST; | ||
1933 | if (adapter->wol & IXGBE_WUFC_BC) | ||
1934 | wol->wolopts |= WAKE_BCAST; | ||
1935 | if (adapter->wol & IXGBE_WUFC_MAG) | ||
1936 | wol->wolopts |= WAKE_MAGIC; | ||
1937 | } | ||
1938 | |||
1939 | static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | ||
1940 | { | ||
1941 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
1942 | |||
1943 | if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE)) | ||
1944 | return -EOPNOTSUPP; | ||
1945 | |||
1946 | if (ixgbe_wol_exclusion(adapter, wol)) | ||
1947 | return wol->wolopts ? -EOPNOTSUPP : 0; | ||
1948 | |||
1949 | adapter->wol = 0; | ||
1950 | |||
1951 | if (wol->wolopts & WAKE_UCAST) | ||
1952 | adapter->wol |= IXGBE_WUFC_EX; | ||
1953 | if (wol->wolopts & WAKE_MCAST) | ||
1954 | adapter->wol |= IXGBE_WUFC_MC; | ||
1955 | if (wol->wolopts & WAKE_BCAST) | ||
1956 | adapter->wol |= IXGBE_WUFC_BC; | ||
1957 | if (wol->wolopts & WAKE_MAGIC) | ||
1958 | adapter->wol |= IXGBE_WUFC_MAG; | ||
1959 | |||
1960 | device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); | ||
1961 | |||
1962 | return 0; | ||
1963 | } | ||
1964 | |||
1965 | static int ixgbe_nway_reset(struct net_device *netdev) | ||
1966 | { | ||
1967 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
1968 | |||
1969 | if (netif_running(netdev)) | ||
1970 | ixgbe_reinit_locked(adapter); | ||
1971 | |||
1972 | return 0; | ||
1973 | } | ||
1974 | |||
1975 | static int ixgbe_set_phys_id(struct net_device *netdev, | ||
1976 | enum ethtool_phys_id_state state) | ||
1977 | { | ||
1978 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
1979 | struct ixgbe_hw *hw = &adapter->hw; | ||
1980 | |||
1981 | switch (state) { | ||
1982 | case ETHTOOL_ID_ACTIVE: | ||
1983 | adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); | ||
1984 | return 2; | ||
1985 | |||
1986 | case ETHTOOL_ID_ON: | ||
1987 | hw->mac.ops.led_on(hw, IXGBE_LED_ON); | ||
1988 | break; | ||
1989 | |||
1990 | case ETHTOOL_ID_OFF: | ||
1991 | hw->mac.ops.led_off(hw, IXGBE_LED_ON); | ||
1992 | break; | ||
1993 | |||
1994 | case ETHTOOL_ID_INACTIVE: | ||
1995 | /* Restore LED settings */ | ||
1996 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg); | ||
1997 | break; | ||
1998 | } | ||
1999 | |||
2000 | return 0; | ||
2001 | } | ||
2002 | |||
2003 | static int ixgbe_get_coalesce(struct net_device *netdev, | ||
2004 | struct ethtool_coalesce *ec) | ||
2005 | { | ||
2006 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
2007 | |||
2008 | ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit; | ||
2009 | |||
2010 | /* only valid if in constant ITR mode */ | ||
2011 | switch (adapter->rx_itr_setting) { | ||
2012 | case 0: | ||
2013 | /* throttling disabled */ | ||
2014 | ec->rx_coalesce_usecs = 0; | ||
2015 | break; | ||
2016 | case 1: | ||
2017 | /* dynamic ITR mode */ | ||
2018 | ec->rx_coalesce_usecs = 1; | ||
2019 | break; | ||
2020 | default: | ||
2021 | /* fixed interrupt rate mode */ | ||
2022 | ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param; | ||
2023 | break; | ||
2024 | } | ||
2025 | |||
2026 | /* if in mixed tx/rx queues per vector mode, report only rx settings */ | ||
2027 | if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) | ||
2028 | return 0; | ||
2029 | |||
2030 | /* only valid if in constant ITR mode */ | ||
2031 | switch (adapter->tx_itr_setting) { | ||
2032 | case 0: | ||
2033 | /* throttling disabled */ | ||
2034 | ec->tx_coalesce_usecs = 0; | ||
2035 | break; | ||
2036 | case 1: | ||
2037 | /* dynamic ITR mode */ | ||
2038 | ec->tx_coalesce_usecs = 1; | ||
2039 | break; | ||
2040 | default: | ||
2041 | ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param; | ||
2042 | break; | ||
2043 | } | ||
2044 | |||
2045 | return 0; | ||
2046 | } | ||
2047 | |||
2048 | /* | ||
2049 | * this function must be called before setting the new value of | ||
2050 | * rx_itr_setting | ||
2051 | */ | ||
2052 | static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter, | ||
2053 | struct ethtool_coalesce *ec) | ||
2054 | { | ||
2055 | struct net_device *netdev = adapter->netdev; | ||
2056 | |||
2057 | if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)) | ||
2058 | return false; | ||
2059 | |||
2060 | /* if interrupt rate is too high then disable RSC */ | ||
2061 | if (ec->rx_coalesce_usecs != 1 && | ||
2062 | ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) { | ||
2063 | if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { | ||
2064 | e_info(probe, "rx-usecs set too low, " | ||
2065 | "disabling RSC\n"); | ||
2066 | adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; | ||
2067 | return true; | ||
2068 | } | ||
2069 | } else { | ||
2070 | /* check the feature flag value and enable RSC if necessary */ | ||
2071 | if ((netdev->features & NETIF_F_LRO) && | ||
2072 | !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { | ||
2073 | e_info(probe, "rx-usecs set to %d, " | ||
2074 | "re-enabling RSC\n", | ||
2075 | ec->rx_coalesce_usecs); | ||
2076 | adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; | ||
2077 | return true; | ||
2078 | } | ||
2079 | } | ||
2080 | return false; | ||
2081 | } | ||
2082 | |||
2083 | static int ixgbe_set_coalesce(struct net_device *netdev, | ||
2084 | struct ethtool_coalesce *ec) | ||
2085 | { | ||
2086 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | ||
2087 | struct ixgbe_q_vector *q_vector; | ||
2088 | int i; | ||
2089 | bool need_reset = false; | ||
2090 | |||
2091 | /* don't accept tx specific changes if we've got mixed RxTx vectors */ | ||
2092 | if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count | ||
2093 | && ec->tx_coalesce_usecs) | ||
2094 | return -EINVAL; | ||
2095 | |||
2096 | if (ec->tx_max_coalesced_frames_irq) | ||
2097 | adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq; | ||
2098 | |||
2099 | if (ec->rx_coalesce_usecs > 1) { | ||
2100 | /* check the limits */ | ||
2101 | if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) || | ||
2102 | (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE)) | ||
2103 | return -EINVAL; | ||
2104 | |||
2105 | /* check the old value and enable RSC if necessary */ | ||
2106 | need_reset = ixgbe_update_rsc(adapter, ec); | ||
2107 | |||
2108 | /* store the value in ints/second */ | ||
2109 | adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs; | ||
2110 | |||
2111 | /* static value of interrupt rate */ | ||
2112 | adapter->rx_itr_setting = adapter->rx_eitr_param; | ||
2113 | /* clear the lower bit as its used for dynamic state */ | ||
2114 | adapter->rx_itr_setting &= ~1; | ||
2115 | } else if (ec->rx_coalesce_usecs == 1) { | ||
2116 | /* check the old value and enable RSC if necessary */ | ||
2117 | need_reset = ixgbe_update_rsc(adapter, ec); | ||
2118 | |||
2119 | /* 1 means dynamic mode */ | ||
2120 | adapter->rx_eitr_param = 20000; | ||
2121 | adapter->rx_itr_setting = 1; | ||
2122 | } else { | ||
2123 | /* check the old value and enable RSC if necessary */ | ||
2124 | need_reset = ixgbe_update_rsc(adapter, ec); | ||
2125 | /* | ||
2126 | * any other value means disable eitr, which is best | ||
2127 | * served by setting the interrupt rate very high | ||
2128 | */ | ||
2129 | adapter->rx_eitr_param = IXGBE_MAX_INT_RATE; | ||
2130 | adapter->rx_itr_setting = 0; | ||
2131 | } | ||
2132 | |||
2133 | if (ec->tx_coalesce_usecs > 1) { | ||
2134 | /* | ||
2135 | * don't have to worry about max_int as above because | ||
2136 | * tx vectors don't do hardware RSC (an rx function) | ||
2137 | */ | ||
2138 | /* check the limits */ | ||
2139 | if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) || | ||
2140 | (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE)) | ||
2141 | return -EINVAL; | ||
2142 | |||
2143 | /* store the value in ints/second */ | ||
2144 | adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs; | ||
2145 | |||
2146 | /* static value of interrupt rate */ | ||
2147 | adapter->tx_itr_setting = adapter->tx_eitr_param; | ||
2148 | |||
2149 | /* clear the lower bit as its used for dynamic state */ | ||
2150 | adapter->tx_itr_setting &= ~1; | ||
2151 | } else if (ec->tx_coalesce_usecs == 1) { | ||
2152 | /* 1 means dynamic mode */ | ||
2153 | adapter->tx_eitr_param = 10000; | ||
2154 | adapter->tx_itr_setting = 1; | ||
2155 | } else { | ||
2156 | adapter->tx_eitr_param = IXGBE_MAX_INT_RATE; | ||
2157 | adapter->tx_itr_setting = 0; | ||
2158 | } | ||
2159 | |||
2160 | /* MSI/MSIx Interrupt Mode */ | ||
2161 | if (adapter->flags & | ||
2162 | (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) { | ||
2163 | int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | ||
2164 | for (i = 0; i < num_vectors; i++) { | ||
2165 | q_vector = adapter->q_vector[i]; | ||
2166 | if (q_vector->tx.count && !q_vector->rx.count) | ||
2167 | /* tx only */ | ||
2168 | q_vector->eitr = adapter->tx_eitr_param; | ||
2169 | else | ||
2170 | /* rx only or mixed */ | ||
2171 | q_vector->eitr = adapter->rx_eitr_param; | ||
2172 | q_vector->tx.work_limit = adapter->tx_work_limit; | ||
2173 | ixgbe_write_eitr(q_vector); | ||
2174 | } | ||
2175 | /* Legacy Interrupt Mode */ | ||
2176 | } else { | ||
2177 | q_vector = adapter->q_vector[0]; | ||
2178 | q_vector->eitr = adapter->rx_eitr_param; | ||
2179 | q_vector->tx.work_limit = adapter->tx_work_limit; | ||
2180 | ixgbe_write_eitr(q_vector); | ||
2181 | } | ||
2182 | |||
2183 | /* | ||
2184 | * do reset here at the end to make sure EITR==0 case is handled | ||
2185 | * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings | ||
2186 | * also locks in RSC enable/disable which requires reset | ||
2187 | */ | ||
2188 | if (need_reset) | ||
2189 | ixgbe_do_reset(netdev); | ||
2190 | |||
2191 | return 0; | ||
2192 | } | ||
2193 | |||
2194 | static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter, | ||
2195 | struct ethtool_rxnfc *cmd) | ||
2196 | { | ||
2197 | union ixgbe_atr_input *mask = &adapter->fdir_mask; | ||
2198 | struct ethtool_rx_flow_spec *fsp = | ||
2199 | (struct ethtool_rx_flow_spec *)&cmd->fs; | ||
2200 | struct hlist_node *node, *node2; | ||
2201 | struct ixgbe_fdir_filter *rule = NULL; | ||
2202 | |||
2203 | /* report total rule count */ | ||
2204 | cmd->data = (1024 << adapter->fdir_pballoc) - 2; | ||
2205 | |||
2206 | hlist_for_each_entry_safe(rule, node, node2, | ||
2207 | &adapter->fdir_filter_list, fdir_node) { | ||
2208 | if (fsp->location <= rule->sw_idx) | ||
2209 | break; | ||
2210 | } | ||
2211 | |||
2212 | if (!rule || fsp->location != rule->sw_idx) | ||
2213 | return -EINVAL; | ||
2214 | |||
2215 | /* fill out the flow spec entry */ | ||
2216 | |||
2217 | /* set flow type field */ | ||
2218 | switch (rule->filter.formatted.flow_type) { | ||
2219 | case IXGBE_ATR_FLOW_TYPE_TCPV4: | ||
2220 | fsp->flow_type = TCP_V4_FLOW; | ||
2221 | break; | ||
2222 | case IXGBE_ATR_FLOW_TYPE_UDPV4: | ||
2223 | fsp->flow_type = UDP_V4_FLOW; | ||
2224 | break; | ||
2225 | case IXGBE_ATR_FLOW_TYPE_SCTPV4: | ||
2226 | fsp->flow_type = SCTP_V4_FLOW; | ||
2227 | break; | ||
2228 | case IXGBE_ATR_FLOW_TYPE_IPV4: | ||
2229 | fsp->flow_type = IP_USER_FLOW; | ||
2230 | fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; | ||
2231 | fsp->h_u.usr_ip4_spec.proto = 0; | ||
2232 | fsp->m_u.usr_ip4_spec.proto = 0; | ||
2233 | break; | ||
2234 | default: | ||
2235 | return -EINVAL; | ||
2236 | } | ||
2237 | |||
2238 | fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port; | ||
2239 | fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port; | ||
2240 | fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port; | ||
2241 | fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port; | ||
2242 | fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0]; | ||
2243 | fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0]; | ||
2244 | fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0]; | ||
2245 | fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0]; | ||
2246 | fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id; | ||
2247 | fsp->m_ext.vlan_tci = mask->formatted.vlan_id; | ||
2248 | fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes; | ||
2249 | fsp->m_ext.vlan_etype = mask->formatted.flex_bytes; | ||
2250 | fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool); | ||
2251 | fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool); | ||
2252 | fsp->flow_type |= FLOW_EXT; | ||
2253 | |||
2254 | /* record action */ | ||
2255 | if (rule->action == IXGBE_FDIR_DROP_QUEUE) | ||
2256 | fsp->ring_cookie = RX_CLS_FLOW_DISC; | ||
2257 | else | ||
2258 | fsp->ring_cookie = rule->action; | ||
2259 | |||
2260 | return 0; | ||
2261 | } | ||
2262 | |||
2263 | static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter, | ||
2264 | struct ethtool_rxnfc *cmd, | ||
2265 | u32 *rule_locs) | ||
2266 | { | ||
2267 | struct hlist_node *node, *node2; | ||
2268 | struct ixgbe_fdir_filter *rule; | ||
2269 | int cnt = 0; | ||
2270 | |||
2271 | /* report total rule count */ | ||
2272 | cmd->data = (1024 << adapter->fdir_pballoc) - 2; | ||
2273 | |||
2274 | hlist_for_each_entry_safe(rule, node, node2, | ||
2275 | &adapter->fdir_filter_list, fdir_node) { | ||
2276 | if (cnt == cmd->rule_cnt) | ||
2277 | return -EMSGSIZE; | ||
2278 | rule_locs[cnt] = rule->sw_idx; | ||
2279 | cnt++; | ||
2280 | } | ||
2281 | |||
2282 | return 0; | ||
2283 | } | ||
2284 | |||
2285 | static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, | ||
2286 | void *rule_locs) | ||
2287 | { | ||
2288 | struct ixgbe_adapter *adapter = netdev_priv(dev); | ||
2289 | int ret = -EOPNOTSUPP; | ||
2290 | |||
2291 | switch (cmd->cmd) { | ||
2292 | case ETHTOOL_GRXRINGS: | ||
2293 | cmd->data = adapter->num_rx_queues; | ||
2294 | ret = 0; | ||
2295 | break; | ||
2296 | case ETHTOOL_GRXCLSRLCNT: | ||
2297 | cmd->rule_cnt = adapter->fdir_filter_count; | ||
2298 | ret = 0; | ||
2299 | break; | ||
2300 | case ETHTOOL_GRXCLSRULE: | ||
2301 | ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd); | ||
2302 | break; | ||
2303 | case ETHTOOL_GRXCLSRLALL: | ||
2304 | ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, | ||
2305 | (u32 *)rule_locs); | ||
2306 | break; | ||
2307 | default: | ||
2308 | break; | ||
2309 | } | ||
2310 | |||
2311 | return ret; | ||
2312 | } | ||
2313 | |||
2314 | static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter, | ||
2315 | struct ixgbe_fdir_filter *input, | ||
2316 | u16 sw_idx) | ||
2317 | { | ||
2318 | struct ixgbe_hw *hw = &adapter->hw; | ||
2319 | struct hlist_node *node, *node2, *parent; | ||
2320 | struct ixgbe_fdir_filter *rule; | ||
2321 | int err = -EINVAL; | ||
2322 | |||
2323 | parent = NULL; | ||
2324 | rule = NULL; | ||
2325 | |||
2326 | hlist_for_each_entry_safe(rule, node, node2, | ||
2327 | &adapter->fdir_filter_list, fdir_node) { | ||
2328 | /* hash found, or no matching entry */ | ||
2329 | if (rule->sw_idx >= sw_idx) | ||
2330 | break; | ||
2331 | parent = node; | ||
2332 | } | ||
2333 | |||
2334 | /* if there is an old rule occupying our place remove it */ | ||
2335 | if (rule && (rule->sw_idx == sw_idx)) { | ||
2336 | if (!input || (rule->filter.formatted.bkt_hash != | ||
2337 | input->filter.formatted.bkt_hash)) { | ||
2338 | err = ixgbe_fdir_erase_perfect_filter_82599(hw, | ||
2339 | &rule->filter, | ||
2340 | sw_idx); | ||
2341 | } | ||
2342 | |||
2343 | hlist_del(&rule->fdir_node); | ||
2344 | kfree(rule); | ||
2345 | adapter->fdir_filter_count--; | ||
2346 | } | ||
2347 | |||
2348 | /* | ||
2349 | * If no input this was a delete, err should be 0 if a rule was | ||
2350 | * successfully found and removed from the list else -EINVAL | ||
2351 | */ | ||
2352 | if (!input) | ||
2353 | return err; | ||
2354 | |||
2355 | /* initialize node and set software index */ | ||
2356 | INIT_HLIST_NODE(&input->fdir_node); | ||
2357 | |||
2358 | /* add filter to the list */ | ||
2359 | if (parent) | ||
2360 | hlist_add_after(parent, &input->fdir_node); | ||
2361 | else | ||
2362 | hlist_add_head(&input->fdir_node, | ||
2363 | &adapter->fdir_filter_list); | ||
2364 | |||
2365 | /* update counts */ | ||
2366 | adapter->fdir_filter_count++; | ||
2367 | |||
2368 | return 0; | ||
2369 | } | ||
2370 | |||
2371 | static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp, | ||
2372 | u8 *flow_type) | ||
2373 | { | ||
2374 | switch (fsp->flow_type & ~FLOW_EXT) { | ||
2375 | case TCP_V4_FLOW: | ||
2376 | *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; | ||
2377 | break; | ||
2378 | case UDP_V4_FLOW: | ||
2379 | *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; | ||
2380 | break; | ||
2381 | case SCTP_V4_FLOW: | ||
2382 | *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; | ||
2383 | break; | ||
2384 | case IP_USER_FLOW: | ||
2385 | switch (fsp->h_u.usr_ip4_spec.proto) { | ||
2386 | case IPPROTO_TCP: | ||
2387 | *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; | ||
2388 | break; | ||
2389 | case IPPROTO_UDP: | ||
2390 | *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; | ||
2391 | break; | ||
2392 | case IPPROTO_SCTP: | ||
2393 | *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; | ||
2394 | break; | ||
2395 | case 0: | ||
2396 | if (!fsp->m_u.usr_ip4_spec.proto) { | ||
2397 | *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4; | ||
2398 | break; | ||
2399 | } | ||
2400 | default: | ||
2401 | return 0; | ||
2402 | } | ||
2403 | break; | ||
2404 | default: | ||
2405 | return 0; | ||
2406 | } | ||
2407 | |||
2408 | return 1; | ||
2409 | } | ||
2410 | |||
2411 | static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter, | ||
2412 | struct ethtool_rxnfc *cmd) | ||
2413 | { | ||
2414 | struct ethtool_rx_flow_spec *fsp = | ||
2415 | (struct ethtool_rx_flow_spec *)&cmd->fs; | ||
2416 | struct ixgbe_hw *hw = &adapter->hw; | ||
2417 | struct ixgbe_fdir_filter *input; | ||
2418 | union ixgbe_atr_input mask; | ||
2419 | int err; | ||
2420 | |||
2421 | if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) | ||
2422 | return -EOPNOTSUPP; | ||
2423 | |||
2424 | /* | ||
2425 | * Don't allow programming if the action is a queue greater than | ||
2426 | * the number of online Rx queues. | ||
2427 | */ | ||
2428 | if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) && | ||
2429 | (fsp->ring_cookie >= adapter->num_rx_queues)) | ||
2430 | return -EINVAL; | ||
2431 | |||
2432 | /* Don't allow indexes to exist outside of available space */ | ||
2433 | if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) { | ||
2434 | e_err(drv, "Location out of range\n"); | ||
2435 | return -EINVAL; | ||
2436 | } | ||
2437 | |||
2438 | input = kzalloc(sizeof(*input), GFP_ATOMIC); | ||
2439 | if (!input) | ||
2440 | return -ENOMEM; | ||
2441 | |||
2442 | memset(&mask, 0, sizeof(union ixgbe_atr_input)); | ||
2443 | |||
2444 | /* set SW index */ | ||
2445 | input->sw_idx = fsp->location; | ||
2446 | |||
2447 | /* record flow type */ | ||
2448 | if (!ixgbe_flowspec_to_flow_type(fsp, | ||
2449 | &input->filter.formatted.flow_type)) { | ||
2450 | e_err(drv, "Unrecognized flow type\n"); | ||
2451 | goto err_out; | ||
2452 | } | ||
2453 | |||
2454 | mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | | ||
2455 | IXGBE_ATR_L4TYPE_MASK; | ||
2456 | |||
2457 | if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) | ||
2458 | mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; | ||
2459 | |||
2460 | /* Copy input into formatted structures */ | ||
2461 | input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src; | ||
2462 | mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src; | ||
2463 | input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst; | ||
2464 | mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst; | ||
2465 | input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc; | ||
2466 | mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc; | ||
2467 | input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst; | ||
2468 | mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst; | ||
2469 | |||
2470 | if (fsp->flow_type & FLOW_EXT) { | ||
2471 | input->filter.formatted.vm_pool = | ||
2472 | (unsigned char)ntohl(fsp->h_ext.data[1]); | ||
2473 | mask.formatted.vm_pool = | ||
2474 | (unsigned char)ntohl(fsp->m_ext.data[1]); | ||
2475 | input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci; | ||
2476 | mask.formatted.vlan_id = fsp->m_ext.vlan_tci; | ||
2477 | input->filter.formatted.flex_bytes = | ||
2478 | fsp->h_ext.vlan_etype; | ||
2479 | mask.formatted.flex_bytes = fsp->m_ext.vlan_etype; | ||
2480 | } | ||
2481 | |||
2482 | /* determine if we need to drop or route the packet */ | ||
2483 | if (fsp->ring_cookie == RX_CLS_FLOW_DISC) | ||
2484 | input->action = IXGBE_FDIR_DROP_QUEUE; | ||
2485 | else | ||
2486 | input->action = fsp->ring_cookie; | ||
2487 | |||
2488 | spin_lock(&adapter->fdir_perfect_lock); | ||
2489 | |||
2490 | if (hlist_empty(&adapter->fdir_filter_list)) { | ||
2491 | /* save mask and program input mask into HW */ | ||
2492 | memcpy(&adapter->fdir_mask, &mask, sizeof(mask)); | ||
2493 | err = ixgbe_fdir_set_input_mask_82599(hw, &mask); | ||
2494 | if (err) { | ||
2495 | e_err(drv, "Error writing mask\n"); | ||
2496 | goto err_out_w_lock; | ||
2497 | } | ||
2498 | } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) { | ||
2499 | e_err(drv, "Only one mask supported per port\n"); | ||
2500 | goto err_out_w_lock; | ||
2501 | } | ||
2502 | |||
2503 | /* apply mask and compute/store hash */ | ||
2504 | ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask); | ||
2505 | |||
2506 | /* program filters to filter memory */ | ||
2507 | err = ixgbe_fdir_write_perfect_filter_82599(hw, | ||
2508 | &input->filter, input->sw_idx, | ||
2509 | (input->action == IXGBE_FDIR_DROP_QUEUE) ? | ||
2510 | IXGBE_FDIR_DROP_QUEUE : | ||
2511 | adapter->rx_ring[input->action]->reg_idx); | ||
2512 | if (err) | ||
2513 | goto err_out_w_lock; | ||
2514 | |||
2515 | ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); | ||
2516 | |||
2517 | spin_unlock(&adapter->fdir_perfect_lock); | ||
2518 | |||
2519 | return err; | ||
2520 | err_out_w_lock: | ||
2521 | spin_unlock(&adapter->fdir_perfect_lock); | ||
2522 | err_out: | ||
2523 | kfree(input); | ||
2524 | return -EINVAL; | ||
2525 | } | ||
2526 | |||
2527 | static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter, | ||
2528 | struct ethtool_rxnfc *cmd) | ||
2529 | { | ||
2530 | struct ethtool_rx_flow_spec *fsp = | ||
2531 | (struct ethtool_rx_flow_spec *)&cmd->fs; | ||
2532 | int err; | ||
2533 | |||
2534 | spin_lock(&adapter->fdir_perfect_lock); | ||
2535 | err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location); | ||
2536 | spin_unlock(&adapter->fdir_perfect_lock); | ||
2537 | |||
2538 | return err; | ||
2539 | } | ||
2540 | |||
2541 | static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) | ||
2542 | { | ||
2543 | struct ixgbe_adapter *adapter = netdev_priv(dev); | ||
2544 | int ret = -EOPNOTSUPP; | ||
2545 | |||
2546 | switch (cmd->cmd) { | ||
2547 | case ETHTOOL_SRXCLSRLINS: | ||
2548 | ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd); | ||
2549 | break; | ||
2550 | case ETHTOOL_SRXCLSRLDEL: | ||
2551 | ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd); | ||
2552 | break; | ||
2553 | default: | ||
2554 | break; | ||
2555 | } | ||
2556 | |||
2557 | return ret; | ||
2558 | } | ||
2559 | |||
2560 | static const struct ethtool_ops ixgbe_ethtool_ops = { | ||
2561 | .get_settings = ixgbe_get_settings, | ||
2562 | .set_settings = ixgbe_set_settings, | ||
2563 | .get_drvinfo = ixgbe_get_drvinfo, | ||
2564 | .get_regs_len = ixgbe_get_regs_len, | ||
2565 | .get_regs = ixgbe_get_regs, | ||
2566 | .get_wol = ixgbe_get_wol, | ||
2567 | .set_wol = ixgbe_set_wol, | ||
2568 | .nway_reset = ixgbe_nway_reset, | ||
2569 | .get_link = ethtool_op_get_link, | ||
2570 | .get_eeprom_len = ixgbe_get_eeprom_len, | ||
2571 | .get_eeprom = ixgbe_get_eeprom, | ||
2572 | .get_ringparam = ixgbe_get_ringparam, | ||
2573 | .set_ringparam = ixgbe_set_ringparam, | ||
2574 | .get_pauseparam = ixgbe_get_pauseparam, | ||
2575 | .set_pauseparam = ixgbe_set_pauseparam, | ||
2576 | .get_msglevel = ixgbe_get_msglevel, | ||
2577 | .set_msglevel = ixgbe_set_msglevel, | ||
2578 | .self_test = ixgbe_diag_test, | ||
2579 | .get_strings = ixgbe_get_strings, | ||
2580 | .set_phys_id = ixgbe_set_phys_id, | ||
2581 | .get_sset_count = ixgbe_get_sset_count, | ||
2582 | .get_ethtool_stats = ixgbe_get_ethtool_stats, | ||
2583 | .get_coalesce = ixgbe_get_coalesce, | ||
2584 | .set_coalesce = ixgbe_set_coalesce, | ||
2585 | .get_rxnfc = ixgbe_get_rxnfc, | ||
2586 | .set_rxnfc = ixgbe_set_rxnfc, | ||
2587 | }; | ||
2588 | |||
2589 | void ixgbe_set_ethtool_ops(struct net_device *netdev) | ||
2590 | { | ||
2591 | SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops); | ||
2592 | } | ||