stmmac: update normal descriptor structure (v2)

This patch updates the normal descriptor structure
to work fine on new GMAC Synopsys chips.

Normal descriptors were designed on the old MAC10/100
databook 1.91 where some bits were reserved: for example
the tx checksum insertion and rx checksum offload.

The patch maintains the back-compatibility with old
MAC devices (tested on STx7109 MAC10/100) and adds new
fields that actually new GMAC devices can use.

For example, STx7109 (MAC10/100) will pass from the platform
  tx_coe = 0, enh_desc = 0, has_gmac = 0.
A platform like Loongson1B (GMAC) will pass:
  tx_coe = 1, enh_desc = 0, has_gmac = 1.

Thanks to Kelvin, he enhanced the normal descriptors for
GMAC (on MIPS Loongson1B platform).

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 18 insertions, 13 deletions

diff --git a/drivers/net/ethernet/stmicro/stmmac/descs.h b/drivers/net/ethernet/stmicro/stmmac/descs.h
index 63a03e26469..9820ec842cc 100644
--- a/drivers/net/ethernet/stmicro/stmmac/descs.h
+++ b/drivers/net/ethernet/stmicro/stmmac/descs.h
@@ -25,33 +25,34 @@ struct dma_desc {
         union {
                 struct {
                         /* RDES0 */
-                        u32 reserved1:1;
+                        u32 payload_csum_error:1;
                         u32 crc_error:1;
                         u32 dribbling:1;
                         u32 mii_error:1;
                         u32 receive_watchdog:1;
                         u32 frame_type:1;
                         u32 collision:1;
-                        u32 frame_too_long:1;
+                        u32 ipc_csum_error:1;
                         u32 last_descriptor:1;
                         u32 first_descriptor:1;
-                        u32 multicast_frame:1;
-                        u32 run_frame:1;
+                        u32 vlan_tag:1;
+                        u32 overflow_error:1;
                         u32 length_error:1;
-                        u32 partial_frame_error:1;
+                        u32 sa_filter_fail:1;
                         u32 descriptor_error:1;
                         u32 error_summary:1;
                         u32 frame_length:14;
-                        u32 filtering_fail:1;
+                        u32 da_filter_fail:1;
                         u32 own:1;
                         /* RDES1 */
                         u32 buffer1_size:11;
                         u32 buffer2_size:11;
-                        u32 reserved2:2;
+                        u32 reserved1:2;
                         u32 second_address_chained:1;
                         u32 end_ring:1;
-                        u32 reserved3:5;
+                        u32 reserved2:5;
                         u32 disable_ic:1;
+
                 } rx;
                 struct {
                         /* RDES0 */
@@ -91,24 +92,28 @@ struct dma_desc {
                         u32 underflow_error:1;
                         u32 excessive_deferral:1;
                         u32 collision_count:4;
-                        u32 heartbeat_fail:1;
+                        u32 vlan_frame:1;
                         u32 excessive_collisions:1;
                         u32 late_collision:1;
                         u32 no_carrier:1;
                         u32 loss_carrier:1;
-                        u32 reserved1:3;
+                        u32 payload_error:1;
+                        u32 frame_flushed:1;
+                        u32 jabber_timeout:1;
                         u32 error_summary:1;
-                        u32 reserved2:15;
+                        u32 ip_header_error:1;
+                        u32 time_stamp_status:1;
+                        u32 reserved1:13;
                         u32 own:1;
                         /* TDES1 */
                         u32 buffer1_size:11;
                         u32 buffer2_size:11;
-                        u32 reserved3:1;
+                        u32 time_stamp_enable:1;
                         u32 disable_padding:1;
                         u32 second_address_chained:1;
                         u32 end_ring:1;
                         u32 crc_disable:1;
-                        u32 reserved4:2;
+                        u32 checksum_insertion:2;
                         u32 first_segment:1;
                         u32 last_segment:1;
                         u32 interrupt:1;