MTD: NAND: ams-delta: use GPIO instead of custom I/O

Don't use Amstrad Delta custom I/O functions for controlling the device,
use GPIO API instead.

While being at it, add missing gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB).

Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Cc: David Woodhouse <dwmw2@infradead.org>
Reviewed-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 52 insertions, 22 deletions

diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c
index 9e6b498c9be..5769bd23428 100644
--- a/drivers/mtd/nand/ams-delta.c
+++ b/drivers/mtd/nand/ams-delta.c
@@ -26,7 +26,7 @@
 #include <asm/io.h>
 #include <mach/hardware.h>
 #include <asm/sizes.h>
-#include <asm/gpio.h>
+#include <linux/gpio.h>
 #include <plat/board-ams-delta.h>
 
 /*
@@ -34,8 +34,6 @@
  */
 static struct mtd_info *ams_delta_mtd = NULL;
 
-#define NAND_MASK (AMS_DELTA_LATCH2_NAND_NRE | AMS_DELTA_LATCH2_NAND_NWE | AMS_DELTA_LATCH2_NAND_CLE | AMS_DELTA_LATCH2_NAND_ALE | AMS_DELTA_LATCH2_NAND_NCE | AMS_DELTA_LATCH2_NAND_NWP)
-
 /*
  * Define partitions for flash devices
  */
@@ -68,10 +66,9 @@ static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
 
         writew(0, io_base + OMAP_MPUIO_IO_CNTL);
         writew(byte, this->IO_ADDR_W);
-        ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0);
+        gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 0);
         ndelay(40);
-        ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE,
-                               AMS_DELTA_LATCH2_NAND_NWE);
+        gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NWE, 1);
 }
 
 static u_char ams_delta_read_byte(struct mtd_info *mtd)
@@ -80,12 +77,11 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd)
         struct nand_chip *this = mtd->priv;
         void __iomem *io_base = this->priv;
 
-        ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0);
+        gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 0);
         ndelay(40);
         writew(~0, io_base + OMAP_MPUIO_IO_CNTL);
         res = readw(this->IO_ADDR_R);
-        ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE,
-                               AMS_DELTA_LATCH2_NAND_NRE);
+        gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NRE, 1);
 
         return res;
 }
@@ -132,15 +128,12 @@ static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd,
 {
 
         if (ctrl & NAND_CTRL_CHANGE) {
-                unsigned long bits;
-
-                bits = (~ctrl & NAND_NCE) ? AMS_DELTA_LATCH2_NAND_NCE : 0;
-                bits |= (ctrl & NAND_CLE) ? AMS_DELTA_LATCH2_NAND_CLE : 0;
-                bits |= (ctrl & NAND_ALE) ? AMS_DELTA_LATCH2_NAND_ALE : 0;
-
-                ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_CLE |
-                                AMS_DELTA_LATCH2_NAND_ALE |
-                                AMS_DELTA_LATCH2_NAND_NCE, bits);
+                gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_NCE,
+                                (ctrl & NAND_NCE) == 0);
+                gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_CLE,
+                                (ctrl & NAND_CLE) != 0);
+                gpio_set_value(AMS_DELTA_GPIO_PIN_NAND_ALE,
+                                (ctrl & NAND_ALE) != 0);
         }
 
         if (cmd != NAND_CMD_NONE)
@@ -152,6 +145,39 @@ static int ams_delta_nand_ready(struct mtd_info *mtd)
         return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB);
 }
 
+static struct gpio _mandatory_gpio[] __initconst_or_module = {
+        {
+                .gpio   = AMS_DELTA_GPIO_PIN_NAND_NCE,
+                .flags  = GPIOF_OUT_INIT_HIGH,
+                .label  = "nand_nce",
+        },
+        {
+                .gpio   = AMS_DELTA_GPIO_PIN_NAND_NRE,
+                .flags  = GPIOF_OUT_INIT_HIGH,
+                .label  = "nand_nre",
+        },
+        {
+                .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWP,
+                .flags  = GPIOF_OUT_INIT_HIGH,
+                .label  = "nand_nwp",
+        },
+        {
+                .gpio   = AMS_DELTA_GPIO_PIN_NAND_NWE,
+                .flags  = GPIOF_OUT_INIT_HIGH,
+                .label  = "nand_nwe",
+        },
+        {
+                .gpio   = AMS_DELTA_GPIO_PIN_NAND_ALE,
+                .flags  = GPIOF_OUT_INIT_LOW,
+                .label  = "nand_ale",
+        },
+        {
+                .gpio   = AMS_DELTA_GPIO_PIN_NAND_CLE,
+                .flags  = GPIOF_OUT_INIT_LOW,
+                .label  = "nand_cle",
+        },
+};
+
 /*
  * Main initialization routine
  */
@@ -223,10 +249,9 @@ static int __devinit ams_delta_init(struct platform_device *pdev)
         platform_set_drvdata(pdev, io_base);
 
         /* Set chip enabled, but  */
-        ams_delta_latch2_write(NAND_MASK, AMS_DELTA_LATCH2_NAND_NRE |
-                                          AMS_DELTA_LATCH2_NAND_NWE |
-                                          AMS_DELTA_LATCH2_NAND_NCE |
-                                          AMS_DELTA_LATCH2_NAND_NWP);
+        err = gpio_request_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
+        if (err)
+                goto out_gpio;
 
         /* Scan to find existence of the device */
         if (nand_scan(ams_delta_mtd, 1)) {
@@ -241,7 +266,10 @@ static int __devinit ams_delta_init(struct platform_device *pdev)
         goto out;
 
  out_mtd:
+        gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
+out_gpio:
         platform_set_drvdata(pdev, NULL);
+        gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
         iounmap(io_base);
 out_release_io:
         release_mem_region(res->start, resource_size(res));
@@ -262,6 +290,8 @@ static int __devexit ams_delta_cleanup(struct platform_device *pdev)
         /* Release resources, unregister device */
         nand_release(ams_delta_mtd);
 
+        gpio_free_array(_mandatory_gpio, ARRAY_SIZE(_mandatory_gpio));
+        gpio_free(AMS_DELTA_GPIO_PIN_NAND_RB);
         iounmap(io_base);
         release_mem_region(res->start, resource_size(res));