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authorJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
committerJonathan Herman <hermanjl@cs.unc.edu>2013-01-17 16:15:55 -0500
commit8dea78da5cee153b8af9c07a2745f6c55057fe12 (patch)
treea8f4d49d63b1ecc92f2fddceba0655b2472c5bd9 /drivers/mtd/devices
parent406089d01562f1e2bf9f089fd7637009ebaad589 (diff)
Patched in Tegra support.
Diffstat (limited to 'drivers/mtd/devices')
-rw-r--r--drivers/mtd/devices/Kconfig49
-rw-r--r--drivers/mtd/devices/Makefile7
-rw-r--r--drivers/mtd/devices/bcm47xxsflash.c105
-rw-r--r--drivers/mtd/devices/block2mtd.c38
-rw-r--r--drivers/mtd/devices/doc2000.c51
-rw-r--r--drivers/mtd/devices/doc2001.c41
-rw-r--r--drivers/mtd/devices/doc2001plus.c56
-rw-r--r--drivers/mtd/devices/docecc.c2
-rw-r--r--drivers/mtd/devices/docg3.c2162
-rw-r--r--drivers/mtd/devices/docg3.h370
-rw-r--r--drivers/mtd/devices/docprobe.c14
-rw-r--r--drivers/mtd/devices/lart.c35
-rw-r--r--drivers/mtd/devices/m25p80.c222
-rw-r--r--drivers/mtd/devices/ms02-nv.c12
-rw-r--r--drivers/mtd/devices/mtd_dataflash.c162
-rw-r--r--drivers/mtd/devices/mtdram.c35
-rw-r--r--drivers/mtd/devices/phram.c76
-rw-r--r--drivers/mtd/devices/pmc551.c100
-rw-r--r--drivers/mtd/devices/slram.c44
-rw-r--r--drivers/mtd/devices/spear_smi.c1101
-rw-r--r--drivers/mtd/devices/sst25l.c95
21 files changed, 672 insertions, 4105 deletions
diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
index 27f80cd8aef..943d90f08c0 100644
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -1,6 +1,5 @@
1menu "Self-contained MTD device drivers" 1menu "Self-contained MTD device drivers"
2 depends on MTD!=n 2 depends on MTD!=n
3 depends on HAS_IOMEM
4 3
5config MTD_PMC551 4config MTD_PMC551
6 tristate "Ramix PMC551 PCI Mezzanine RAM card support" 5 tristate "Ramix PMC551 PCI Mezzanine RAM card support"
@@ -79,6 +78,12 @@ config MTD_DATAFLASH_OTP
79 other key product data. The second half is programmed with a 78 other key product data. The second half is programmed with a
80 unique-to-each-chip bit pattern at the factory. 79 unique-to-each-chip bit pattern at the factory.
81 80
81config MTD_NAND_TEGRA
82 tristate "Support for NAND Controller on NVIDIA Tegra"
83 depends on ARCH_TEGRA
84 help
85 Enables NAND flash support for NVIDIA's Tegra family of chips.
86
82config MTD_M25P80 87config MTD_M25P80
83 tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)" 88 tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)"
84 depends on SPI_MASTER && EXPERIMENTAL 89 depends on SPI_MASTER && EXPERIMENTAL
@@ -97,19 +102,12 @@ config MTD_M25P80
97 doesn't support the JEDEC ID instruction. 102 doesn't support the JEDEC ID instruction.
98 103
99config M25PXX_USE_FAST_READ 104config M25PXX_USE_FAST_READ
100 bool "Use FAST_READ OPCode allowing SPI CLK >= 50MHz" 105 bool "Use FAST_READ OPCode allowing SPI CLK <= 50MHz"
101 depends on MTD_M25P80 106 depends on MTD_M25P80
102 default y 107 default y
103 help 108 help
104 This option enables FAST_READ access supported by ST M25Pxx. 109 This option enables FAST_READ access supported by ST M25Pxx.
105 110
106config MTD_SPEAR_SMI
107 tristate "SPEAR MTD NOR Support through SMI controller"
108 depends on PLAT_SPEAR
109 default y
110 help
111 This enable SNOR support on SPEAR platforms using SMI controller
112
113config MTD_SST25L 111config MTD_SST25L
114 tristate "Support SST25L (non JEDEC) SPI Flash chips" 112 tristate "Support SST25L (non JEDEC) SPI Flash chips"
115 depends on SPI_MASTER 113 depends on SPI_MASTER
@@ -120,14 +118,6 @@ config MTD_SST25L
120 Set up your spi devices with the right board-specific platform data, 118 Set up your spi devices with the right board-specific platform data,
121 if you want to specify device partitioning. 119 if you want to specify device partitioning.
122 120
123config MTD_BCM47XXSFLASH
124 tristate "R/O support for serial flash on BCMA bus"
125 depends on BCMA_SFLASH
126 help
127 BCMA bus can have various flash memories attached, they are
128 registered by bcma as platform devices. This enables driver for
129 serial flash memories (only read-only mode is implemented).
130
131config MTD_SLRAM 121config MTD_SLRAM
132 tristate "Uncached system RAM" 122 tristate "Uncached system RAM"
133 help 123 help
@@ -207,7 +197,6 @@ comment "Disk-On-Chip Device Drivers"
207 197
208config MTD_DOC2000 198config MTD_DOC2000
209 tristate "M-Systems Disk-On-Chip 2000 and Millennium (DEPRECATED)" 199 tristate "M-Systems Disk-On-Chip 2000 and Millennium (DEPRECATED)"
210 depends on MTD_NAND
211 select MTD_DOCPROBE 200 select MTD_DOCPROBE
212 select MTD_NAND_IDS 201 select MTD_NAND_IDS
213 ---help--- 202 ---help---
@@ -230,7 +219,6 @@ config MTD_DOC2000
230 219
231config MTD_DOC2001 220config MTD_DOC2001
232 tristate "M-Systems Disk-On-Chip Millennium-only alternative driver (DEPRECATED)" 221 tristate "M-Systems Disk-On-Chip Millennium-only alternative driver (DEPRECATED)"
233 depends on MTD_NAND
234 select MTD_DOCPROBE 222 select MTD_DOCPROBE
235 select MTD_NAND_IDS 223 select MTD_NAND_IDS
236 ---help--- 224 ---help---
@@ -252,7 +240,6 @@ config MTD_DOC2001
252 240
253config MTD_DOC2001PLUS 241config MTD_DOC2001PLUS
254 tristate "M-Systems Disk-On-Chip Millennium Plus" 242 tristate "M-Systems Disk-On-Chip Millennium Plus"
255 depends on MTD_NAND
256 select MTD_DOCPROBE 243 select MTD_DOCPROBE
257 select MTD_NAND_IDS 244 select MTD_NAND_IDS
258 ---help--- 245 ---help---
@@ -268,25 +255,6 @@ config MTD_DOC2001PLUS
268 under "NAND Flash Device Drivers" (currently that driver does not 255 under "NAND Flash Device Drivers" (currently that driver does not
269 support all Millennium Plus devices). 256 support all Millennium Plus devices).
270 257
271config MTD_DOCG3
272 tristate "M-Systems Disk-On-Chip G3"
273 select BCH
274 select BCH_CONST_PARAMS
275 ---help---
276 This provides an MTD device driver for the M-Systems DiskOnChip
277 G3 devices.
278
279 The driver provides access to G3 DiskOnChip, distributed by
280 M-Systems and now Sandisk. The support is very experimental,
281 and doesn't give access to any write operations.
282
283if MTD_DOCG3
284config BCH_CONST_M
285 default 14
286config BCH_CONST_T
287 default 4
288endif
289
290config MTD_DOCPROBE 258config MTD_DOCPROBE
291 tristate 259 tristate
292 select MTD_DOCECC 260 select MTD_DOCECC
@@ -306,7 +274,8 @@ config MTD_DOCPROBE_ADVANCED
306config MTD_DOCPROBE_ADDRESS 274config MTD_DOCPROBE_ADDRESS
307 hex "Physical address of DiskOnChip" if MTD_DOCPROBE_ADVANCED 275 hex "Physical address of DiskOnChip" if MTD_DOCPROBE_ADVANCED
308 depends on MTD_DOCPROBE 276 depends on MTD_DOCPROBE
309 default "0x0" 277 default "0x0000" if MTD_DOCPROBE_ADVANCED
278 default "0" if !MTD_DOCPROBE_ADVANCED
310 ---help--- 279 ---help---
311 By default, the probe for DiskOnChip devices will look for a 280 By default, the probe for DiskOnChip devices will look for a
312 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. 281 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
index 395733a30ef..67345a00a5a 100644
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -1,11 +1,11 @@
1# 1#
2# linux/drivers/mtd/devices/Makefile 2# linux/drivers/mtd/devices/Makefile
3# 3#
4GCOV_PROFILE := y
4 5
5obj-$(CONFIG_MTD_DOC2000) += doc2000.o 6obj-$(CONFIG_MTD_DOC2000) += doc2000.o
6obj-$(CONFIG_MTD_DOC2001) += doc2001.o 7obj-$(CONFIG_MTD_DOC2001) += doc2001.o
7obj-$(CONFIG_MTD_DOC2001PLUS) += doc2001plus.o 8obj-$(CONFIG_MTD_DOC2001PLUS) += doc2001plus.o
8obj-$(CONFIG_MTD_DOCG3) += docg3.o
9obj-$(CONFIG_MTD_DOCPROBE) += docprobe.o 9obj-$(CONFIG_MTD_DOCPROBE) += docprobe.o
10obj-$(CONFIG_MTD_DOCECC) += docecc.o 10obj-$(CONFIG_MTD_DOCECC) += docecc.o
11obj-$(CONFIG_MTD_SLRAM) += slram.o 11obj-$(CONFIG_MTD_SLRAM) += slram.o
@@ -17,8 +17,5 @@ obj-$(CONFIG_MTD_LART) += lart.o
17obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o 17obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
18obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o 18obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
19obj-$(CONFIG_MTD_M25P80) += m25p80.o 19obj-$(CONFIG_MTD_M25P80) += m25p80.o
20obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o
21obj-$(CONFIG_MTD_SST25L) += sst25l.o 20obj-$(CONFIG_MTD_SST25L) += sst25l.o
22obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o 21obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_nand.o
23
24CFLAGS_docg3.o += -I$(src) \ No newline at end of file
diff --git a/drivers/mtd/devices/bcm47xxsflash.c b/drivers/mtd/devices/bcm47xxsflash.c
deleted file mode 100644
index 4714584aa99..00000000000
--- a/drivers/mtd/devices/bcm47xxsflash.c
+++ /dev/null
@@ -1,105 +0,0 @@
1#include <linux/kernel.h>
2#include <linux/module.h>
3#include <linux/slab.h>
4#include <linux/mtd/mtd.h>
5#include <linux/platform_device.h>
6#include <linux/bcma/bcma.h>
7
8MODULE_LICENSE("GPL");
9MODULE_DESCRIPTION("Serial flash driver for BCMA bus");
10
11static const char *probes[] = { "bcm47xxpart", NULL };
12
13static int bcm47xxsflash_read(struct mtd_info *mtd, loff_t from, size_t len,
14 size_t *retlen, u_char *buf)
15{
16 struct bcma_sflash *sflash = mtd->priv;
17
18 /* Check address range */
19 if ((from + len) > mtd->size)
20 return -EINVAL;
21
22 memcpy_fromio(buf, (void __iomem *)KSEG0ADDR(sflash->window + from),
23 len);
24
25 return len;
26}
27
28static void bcm47xxsflash_fill_mtd(struct bcma_sflash *sflash,
29 struct mtd_info *mtd)
30{
31 mtd->priv = sflash;
32 mtd->name = "bcm47xxsflash";
33 mtd->owner = THIS_MODULE;
34 mtd->type = MTD_ROM;
35 mtd->size = sflash->size;
36 mtd->_read = bcm47xxsflash_read;
37
38 /* TODO: implement writing support and verify/change following code */
39 mtd->flags = MTD_CAP_ROM;
40 mtd->writebufsize = mtd->writesize = 1;
41}
42
43static int bcm47xxsflash_probe(struct platform_device *pdev)
44{
45 struct bcma_sflash *sflash = dev_get_platdata(&pdev->dev);
46 int err;
47
48 sflash->mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
49 if (!sflash->mtd) {
50 err = -ENOMEM;
51 goto out;
52 }
53 bcm47xxsflash_fill_mtd(sflash, sflash->mtd);
54
55 err = mtd_device_parse_register(sflash->mtd, probes, NULL, NULL, 0);
56 if (err) {
57 pr_err("Failed to register MTD device: %d\n", err);
58 goto err_dev_reg;
59 }
60
61 return 0;
62
63err_dev_reg:
64 kfree(sflash->mtd);
65out:
66 return err;
67}
68
69static int bcm47xxsflash_remove(struct platform_device *pdev)
70{
71 struct bcma_sflash *sflash = dev_get_platdata(&pdev->dev);
72
73 mtd_device_unregister(sflash->mtd);
74 kfree(sflash->mtd);
75
76 return 0;
77}
78
79static struct platform_driver bcma_sflash_driver = {
80 .remove = bcm47xxsflash_remove,
81 .driver = {
82 .name = "bcma_sflash",
83 .owner = THIS_MODULE,
84 },
85};
86
87static int __init bcm47xxsflash_init(void)
88{
89 int err;
90
91 err = platform_driver_probe(&bcma_sflash_driver, bcm47xxsflash_probe);
92 if (err)
93 pr_err("Failed to register BCMA serial flash driver: %d\n",
94 err);
95
96 return err;
97}
98
99static void __exit bcm47xxsflash_exit(void)
100{
101 platform_driver_unregister(&bcma_sflash_driver);
102}
103
104module_init(bcm47xxsflash_init);
105module_exit(bcm47xxsflash_exit);
diff --git a/drivers/mtd/devices/block2mtd.c b/drivers/mtd/devices/block2mtd.c
index e081bfeaaf7..b78f23169d4 100644
--- a/drivers/mtd/devices/block2mtd.c
+++ b/drivers/mtd/devices/block2mtd.c
@@ -14,6 +14,7 @@
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/mtd/mtd.h> 16#include <linux/mtd/mtd.h>
17#include <linux/buffer_head.h>
17#include <linux/mutex.h> 18#include <linux/mutex.h>
18#include <linux/mount.h> 19#include <linux/mount.h>
19#include <linux/slab.h> 20#include <linux/slab.h>
@@ -52,6 +53,8 @@ static int _block2mtd_erase(struct block2mtd_dev *dev, loff_t to, size_t len)
52 53
53 while (pages) { 54 while (pages) {
54 page = page_read(mapping, index); 55 page = page_read(mapping, index);
56 if (!page)
57 return -ENOMEM;
55 if (IS_ERR(page)) 58 if (IS_ERR(page))
56 return PTR_ERR(page); 59 return PTR_ERR(page);
57 60
@@ -62,7 +65,6 @@ static int _block2mtd_erase(struct block2mtd_dev *dev, loff_t to, size_t len)
62 memset(page_address(page), 0xff, PAGE_SIZE); 65 memset(page_address(page), 0xff, PAGE_SIZE);
63 set_page_dirty(page); 66 set_page_dirty(page);
64 unlock_page(page); 67 unlock_page(page);
65 balance_dirty_pages_ratelimited(mapping);
66 break; 68 break;
67 } 69 }
68 70
@@ -103,6 +105,14 @@ static int block2mtd_read(struct mtd_info *mtd, loff_t from, size_t len,
103 int offset = from & (PAGE_SIZE-1); 105 int offset = from & (PAGE_SIZE-1);
104 int cpylen; 106 int cpylen;
105 107
108 if (from > mtd->size)
109 return -EINVAL;
110 if (from + len > mtd->size)
111 len = mtd->size - from;
112
113 if (retlen)
114 *retlen = 0;
115
106 while (len) { 116 while (len) {
107 if ((offset + len) > PAGE_SIZE) 117 if ((offset + len) > PAGE_SIZE)
108 cpylen = PAGE_SIZE - offset; // multiple pages 118 cpylen = PAGE_SIZE - offset; // multiple pages
@@ -111,6 +121,8 @@ static int block2mtd_read(struct mtd_info *mtd, loff_t from, size_t len,
111 len = len - cpylen; 121 len = len - cpylen;
112 122
113 page = page_read(dev->blkdev->bd_inode->i_mapping, index); 123 page = page_read(dev->blkdev->bd_inode->i_mapping, index);
124 if (!page)
125 return -ENOMEM;
114 if (IS_ERR(page)) 126 if (IS_ERR(page))
115 return PTR_ERR(page); 127 return PTR_ERR(page);
116 128
@@ -137,6 +149,8 @@ static int _block2mtd_write(struct block2mtd_dev *dev, const u_char *buf,
137 int offset = to & ~PAGE_MASK; // page offset 149 int offset = to & ~PAGE_MASK; // page offset
138 int cpylen; 150 int cpylen;
139 151
152 if (retlen)
153 *retlen = 0;
140 while (len) { 154 while (len) {
141 if ((offset+len) > PAGE_SIZE) 155 if ((offset+len) > PAGE_SIZE)
142 cpylen = PAGE_SIZE - offset; // multiple pages 156 cpylen = PAGE_SIZE - offset; // multiple pages
@@ -145,6 +159,8 @@ static int _block2mtd_write(struct block2mtd_dev *dev, const u_char *buf,
145 len = len - cpylen; 159 len = len - cpylen;
146 160
147 page = page_read(mapping, index); 161 page = page_read(mapping, index);
162 if (!page)
163 return -ENOMEM;
148 if (IS_ERR(page)) 164 if (IS_ERR(page))
149 return PTR_ERR(page); 165 return PTR_ERR(page);
150 166
@@ -153,7 +169,6 @@ static int _block2mtd_write(struct block2mtd_dev *dev, const u_char *buf,
153 memcpy(page_address(page) + offset, buf, cpylen); 169 memcpy(page_address(page) + offset, buf, cpylen);
154 set_page_dirty(page); 170 set_page_dirty(page);
155 unlock_page(page); 171 unlock_page(page);
156 balance_dirty_pages_ratelimited(mapping);
157 } 172 }
158 page_cache_release(page); 173 page_cache_release(page);
159 174
@@ -174,6 +189,13 @@ static int block2mtd_write(struct mtd_info *mtd, loff_t to, size_t len,
174 struct block2mtd_dev *dev = mtd->priv; 189 struct block2mtd_dev *dev = mtd->priv;
175 int err; 190 int err;
176 191
192 if (!len)
193 return 0;
194 if (to >= mtd->size)
195 return -ENOSPC;
196 if (to + len > mtd->size)
197 len = mtd->size - to;
198
177 mutex_lock(&dev->write_mutex); 199 mutex_lock(&dev->write_mutex);
178 err = _block2mtd_write(dev, buf, to, len, retlen); 200 err = _block2mtd_write(dev, buf, to, len, retlen);
179 mutex_unlock(&dev->write_mutex); 201 mutex_unlock(&dev->write_mutex);
@@ -262,13 +284,13 @@ static struct block2mtd_dev *add_device(char *devname, int erase_size)
262 dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK; 284 dev->mtd.size = dev->blkdev->bd_inode->i_size & PAGE_MASK;
263 dev->mtd.erasesize = erase_size; 285 dev->mtd.erasesize = erase_size;
264 dev->mtd.writesize = 1; 286 dev->mtd.writesize = 1;
265 dev->mtd.writebufsize = PAGE_SIZE;
266 dev->mtd.type = MTD_RAM; 287 dev->mtd.type = MTD_RAM;
267 dev->mtd.flags = MTD_CAP_RAM; 288 dev->mtd.flags = MTD_CAP_RAM;
268 dev->mtd._erase = block2mtd_erase; 289 dev->mtd.erase = block2mtd_erase;
269 dev->mtd._write = block2mtd_write; 290 dev->mtd.write = block2mtd_write;
270 dev->mtd._sync = block2mtd_sync; 291 dev->mtd.writev = default_mtd_writev;
271 dev->mtd._read = block2mtd_read; 292 dev->mtd.sync = block2mtd_sync;
293 dev->mtd.read = block2mtd_read;
272 dev->mtd.priv = dev; 294 dev->mtd.priv = dev;
273 dev->mtd.owner = THIS_MODULE; 295 dev->mtd.owner = THIS_MODULE;
274 296
@@ -435,7 +457,7 @@ static int __init block2mtd_init(void)
435} 457}
436 458
437 459
438static void block2mtd_exit(void) 460static void __devexit block2mtd_exit(void)
439{ 461{
440 struct list_head *pos, *next; 462 struct list_head *pos, *next;
441 463
diff --git a/drivers/mtd/devices/doc2000.c b/drivers/mtd/devices/doc2000.c
index a4eb8b5b85e..f7fbf6025ef 100644
--- a/drivers/mtd/devices/doc2000.c
+++ b/drivers/mtd/devices/doc2000.c
@@ -82,7 +82,8 @@ static int _DoC_WaitReady(struct DiskOnChip *doc)
82 void __iomem *docptr = doc->virtadr; 82 void __iomem *docptr = doc->virtadr;
83 unsigned long timeo = jiffies + (HZ * 10); 83 unsigned long timeo = jiffies + (HZ * 10);
84 84
85 pr_debug("_DoC_WaitReady called for out-of-line wait\n"); 85 DEBUG(MTD_DEBUG_LEVEL3,
86 "_DoC_WaitReady called for out-of-line wait\n");
86 87
87 /* Out-of-line routine to wait for chip response */ 88 /* Out-of-line routine to wait for chip response */
88 while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) { 89 while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
@@ -91,7 +92,7 @@ static int _DoC_WaitReady(struct DiskOnChip *doc)
91 DoC_Delay(doc, 2); 92 DoC_Delay(doc, 2);
92 93
93 if (time_after(jiffies, timeo)) { 94 if (time_after(jiffies, timeo)) {
94 pr_debug("_DoC_WaitReady timed out.\n"); 95 DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
95 return -EIO; 96 return -EIO;
96 } 97 }
97 udelay(1); 98 udelay(1);
@@ -322,7 +323,8 @@ static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
322 323
323 /* Reset the chip */ 324 /* Reset the chip */
324 if (DoC_Command(doc, NAND_CMD_RESET, CDSN_CTRL_WP)) { 325 if (DoC_Command(doc, NAND_CMD_RESET, CDSN_CTRL_WP)) {
325 pr_debug("DoC_Command (reset) for %d,%d returned true\n", 326 DEBUG(MTD_DEBUG_LEVEL2,
327 "DoC_Command (reset) for %d,%d returned true\n",
326 floor, chip); 328 floor, chip);
327 return 0; 329 return 0;
328 } 330 }
@@ -330,7 +332,8 @@ static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
330 332
331 /* Read the NAND chip ID: 1. Send ReadID command */ 333 /* Read the NAND chip ID: 1. Send ReadID command */
332 if (DoC_Command(doc, NAND_CMD_READID, CDSN_CTRL_WP)) { 334 if (DoC_Command(doc, NAND_CMD_READID, CDSN_CTRL_WP)) {
333 pr_debug("DoC_Command (ReadID) for %d,%d returned true\n", 335 DEBUG(MTD_DEBUG_LEVEL2,
336 "DoC_Command (ReadID) for %d,%d returned true\n",
334 floor, chip); 337 floor, chip);
335 return 0; 338 return 0;
336 } 339 }
@@ -562,15 +565,23 @@ void DoC2k_init(struct mtd_info *mtd)
562 565
563 mtd->type = MTD_NANDFLASH; 566 mtd->type = MTD_NANDFLASH;
564 mtd->flags = MTD_CAP_NANDFLASH; 567 mtd->flags = MTD_CAP_NANDFLASH;
565 mtd->writebufsize = mtd->writesize = 512; 568 mtd->size = 0;
569 mtd->erasesize = 0;
570 mtd->writesize = 512;
566 mtd->oobsize = 16; 571 mtd->oobsize = 16;
567 mtd->ecc_strength = 2;
568 mtd->owner = THIS_MODULE; 572 mtd->owner = THIS_MODULE;
569 mtd->_erase = doc_erase; 573 mtd->erase = doc_erase;
570 mtd->_read = doc_read; 574 mtd->point = NULL;
571 mtd->_write = doc_write; 575 mtd->unpoint = NULL;
572 mtd->_read_oob = doc_read_oob; 576 mtd->read = doc_read;
573 mtd->_write_oob = doc_write_oob; 577 mtd->write = doc_write;
578 mtd->read_oob = doc_read_oob;
579 mtd->write_oob = doc_write_oob;
580 mtd->sync = NULL;
581
582 this->totlen = 0;
583 this->numchips = 0;
584
574 this->curfloor = -1; 585 this->curfloor = -1;
575 this->curchip = -1; 586 this->curchip = -1;
576 mutex_init(&this->lock); 587 mutex_init(&this->lock);
@@ -603,7 +614,13 @@ static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
603 int i, len256 = 0, ret=0; 614 int i, len256 = 0, ret=0;
604 size_t left = len; 615 size_t left = len;
605 616
617 /* Don't allow read past end of device */
618 if (from >= this->totlen)
619 return -EINVAL;
620
606 mutex_lock(&this->lock); 621 mutex_lock(&this->lock);
622
623 *retlen = 0;
607 while (left) { 624 while (left) {
608 len = left; 625 len = left;
609 626
@@ -682,7 +699,7 @@ static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
682#ifdef ECC_DEBUG 699#ifdef ECC_DEBUG
683 printk(KERN_ERR "DiskOnChip ECC Error: Read at %lx\n", (long)from); 700 printk(KERN_ERR "DiskOnChip ECC Error: Read at %lx\n", (long)from);
684#endif 701#endif
685 /* Read the ECC syndrome through the DiskOnChip ECC 702 /* Read the ECC syndrom through the DiskOnChip ECC
686 logic. These syndrome will be all ZERO when there 703 logic. These syndrome will be all ZERO when there
687 is no error */ 704 is no error */
688 for (i = 0; i < 6; i++) { 705 for (i = 0; i < 6; i++) {
@@ -743,7 +760,13 @@ static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
743 size_t left = len; 760 size_t left = len;
744 int status; 761 int status;
745 762
763 /* Don't allow write past end of device */
764 if (to >= this->totlen)
765 return -EINVAL;
766
746 mutex_lock(&this->lock); 767 mutex_lock(&this->lock);
768
769 *retlen = 0;
747 while (left) { 770 while (left) {
748 len = left; 771 len = left;
749 772
@@ -907,7 +930,7 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
907 uint8_t *buf = ops->oobbuf; 930 uint8_t *buf = ops->oobbuf;
908 size_t len = ops->len; 931 size_t len = ops->len;
909 932
910 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); 933 BUG_ON(ops->mode != MTD_OOB_PLACE);
911 934
912 ofs += ops->ooboffs; 935 ofs += ops->ooboffs;
913 936
@@ -1071,7 +1094,7 @@ static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
1071 struct DiskOnChip *this = mtd->priv; 1094 struct DiskOnChip *this = mtd->priv;
1072 int ret; 1095 int ret;
1073 1096
1074 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); 1097 BUG_ON(ops->mode != MTD_OOB_PLACE);
1075 1098
1076 mutex_lock(&this->lock); 1099 mutex_lock(&this->lock);
1077 ret = doc_write_oob_nolock(mtd, ofs + ops->ooboffs, ops->len, 1100 ret = doc_write_oob_nolock(mtd, ofs + ops->ooboffs, ops->len,
diff --git a/drivers/mtd/devices/doc2001.c b/drivers/mtd/devices/doc2001.c
index f6927955dab..241192f05bc 100644
--- a/drivers/mtd/devices/doc2001.c
+++ b/drivers/mtd/devices/doc2001.c
@@ -55,14 +55,15 @@ static int _DoC_WaitReady(void __iomem * docptr)
55{ 55{
56 unsigned short c = 0xffff; 56 unsigned short c = 0xffff;
57 57
58 pr_debug("_DoC_WaitReady called for out-of-line wait\n"); 58 DEBUG(MTD_DEBUG_LEVEL3,
59 "_DoC_WaitReady called for out-of-line wait\n");
59 60
60 /* Out-of-line routine to wait for chip response */ 61 /* Out-of-line routine to wait for chip response */
61 while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c) 62 while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
62 ; 63 ;
63 64
64 if (c == 0) 65 if (c == 0)
65 pr_debug("_DoC_WaitReady timed out.\n"); 66 DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
66 67
67 return (c == 0); 68 return (c == 0);
68} 69}
@@ -343,18 +344,25 @@ void DoCMil_init(struct mtd_info *mtd)
343 344
344 mtd->type = MTD_NANDFLASH; 345 mtd->type = MTD_NANDFLASH;
345 mtd->flags = MTD_CAP_NANDFLASH; 346 mtd->flags = MTD_CAP_NANDFLASH;
347 mtd->size = 0;
346 348
347 /* FIXME: erase size is not always 8KiB */ 349 /* FIXME: erase size is not always 8KiB */
348 mtd->erasesize = 0x2000; 350 mtd->erasesize = 0x2000;
349 mtd->writebufsize = mtd->writesize = 512; 351
352 mtd->writesize = 512;
350 mtd->oobsize = 16; 353 mtd->oobsize = 16;
351 mtd->ecc_strength = 2;
352 mtd->owner = THIS_MODULE; 354 mtd->owner = THIS_MODULE;
353 mtd->_erase = doc_erase; 355 mtd->erase = doc_erase;
354 mtd->_read = doc_read; 356 mtd->point = NULL;
355 mtd->_write = doc_write; 357 mtd->unpoint = NULL;
356 mtd->_read_oob = doc_read_oob; 358 mtd->read = doc_read;
357 mtd->_write_oob = doc_write_oob; 359 mtd->write = doc_write;
360 mtd->read_oob = doc_read_oob;
361 mtd->write_oob = doc_write_oob;
362 mtd->sync = NULL;
363
364 this->totlen = 0;
365 this->numchips = 0;
358 this->curfloor = -1; 366 this->curfloor = -1;
359 this->curchip = -1; 367 this->curchip = -1;
360 368
@@ -384,6 +392,10 @@ static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
384 void __iomem *docptr = this->virtadr; 392 void __iomem *docptr = this->virtadr;
385 struct Nand *mychip = &this->chips[from >> (this->chipshift)]; 393 struct Nand *mychip = &this->chips[from >> (this->chipshift)];
386 394
395 /* Don't allow read past end of device */
396 if (from >= this->totlen)
397 return -EINVAL;
398
387 /* Don't allow a single read to cross a 512-byte block boundary */ 399 /* Don't allow a single read to cross a 512-byte block boundary */
388 if (from + len > ((from | 0x1ff) + 1)) 400 if (from + len > ((from | 0x1ff) + 1))
389 len = ((from | 0x1ff) + 1) - from; 401 len = ((from | 0x1ff) + 1) - from;
@@ -452,7 +464,7 @@ static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
452#ifdef ECC_DEBUG 464#ifdef ECC_DEBUG
453 printk("DiskOnChip ECC Error: Read at %lx\n", (long)from); 465 printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
454#endif 466#endif
455 /* Read the ECC syndrome through the DiskOnChip ECC logic. 467 /* Read the ECC syndrom through the DiskOnChip ECC logic.
456 These syndrome will be all ZERO when there is no error */ 468 These syndrome will be all ZERO when there is no error */
457 for (i = 0; i < 6; i++) { 469 for (i = 0; i < 6; i++) {
458 syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i); 470 syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i);
@@ -491,6 +503,10 @@ static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
491 void __iomem *docptr = this->virtadr; 503 void __iomem *docptr = this->virtadr;
492 struct Nand *mychip = &this->chips[to >> (this->chipshift)]; 504 struct Nand *mychip = &this->chips[to >> (this->chipshift)];
493 505
506 /* Don't allow write past end of device */
507 if (to >= this->totlen)
508 return -EINVAL;
509
494#if 0 510#if 0
495 /* Don't allow a single write to cross a 512-byte block boundary */ 511 /* Don't allow a single write to cross a 512-byte block boundary */
496 if (to + len > ( (to | 0x1ff) + 1)) 512 if (to + len > ( (to | 0x1ff) + 1))
@@ -592,6 +608,7 @@ static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
592 printk("Error programming flash\n"); 608 printk("Error programming flash\n");
593 /* Error in programming 609 /* Error in programming
594 FIXME: implement Bad Block Replacement (in nftl.c ??) */ 610 FIXME: implement Bad Block Replacement (in nftl.c ??) */
611 *retlen = 0;
595 ret = -EIO; 612 ret = -EIO;
596 } 613 }
597 dummy = ReadDOC(docptr, LastDataRead); 614 dummy = ReadDOC(docptr, LastDataRead);
@@ -615,7 +632,7 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
615 uint8_t *buf = ops->oobbuf; 632 uint8_t *buf = ops->oobbuf;
616 size_t len = ops->len; 633 size_t len = ops->len;
617 634
618 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); 635 BUG_ON(ops->mode != MTD_OOB_PLACE);
619 636
620 ofs += ops->ooboffs; 637 ofs += ops->ooboffs;
621 638
@@ -673,7 +690,7 @@ static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
673 uint8_t *buf = ops->oobbuf; 690 uint8_t *buf = ops->oobbuf;
674 size_t len = ops->len; 691 size_t len = ops->len;
675 692
676 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); 693 BUG_ON(ops->mode != MTD_OOB_PLACE);
677 694
678 ofs += ops->ooboffs; 695 ofs += ops->ooboffs;
679 696
diff --git a/drivers/mtd/devices/doc2001plus.c b/drivers/mtd/devices/doc2001plus.c
index 4f2220ad892..09ae0adc3ad 100644
--- a/drivers/mtd/devices/doc2001plus.c
+++ b/drivers/mtd/devices/doc2001plus.c
@@ -61,14 +61,15 @@ static int _DoC_WaitReady(void __iomem * docptr)
61{ 61{
62 unsigned int c = 0xffff; 62 unsigned int c = 0xffff;
63 63
64 pr_debug("_DoC_WaitReady called for out-of-line wait\n"); 64 DEBUG(MTD_DEBUG_LEVEL3,
65 "_DoC_WaitReady called for out-of-line wait\n");
65 66
66 /* Out-of-line routine to wait for chip response */ 67 /* Out-of-line routine to wait for chip response */
67 while (((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) && --c) 68 while (((ReadDOC(docptr, Mplus_FlashControl) & CDSN_CTRL_FR_B_MASK) != CDSN_CTRL_FR_B_MASK) && --c)
68 ; 69 ;
69 70
70 if (c == 0) 71 if (c == 0)
71 pr_debug("_DoC_WaitReady timed out.\n"); 72 DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
72 73
73 return (c == 0); 74 return (c == 0);
74} 75}
@@ -467,15 +468,23 @@ void DoCMilPlus_init(struct mtd_info *mtd)
467 468
468 mtd->type = MTD_NANDFLASH; 469 mtd->type = MTD_NANDFLASH;
469 mtd->flags = MTD_CAP_NANDFLASH; 470 mtd->flags = MTD_CAP_NANDFLASH;
470 mtd->writebufsize = mtd->writesize = 512; 471 mtd->size = 0;
472
473 mtd->erasesize = 0;
474 mtd->writesize = 512;
471 mtd->oobsize = 16; 475 mtd->oobsize = 16;
472 mtd->ecc_strength = 2;
473 mtd->owner = THIS_MODULE; 476 mtd->owner = THIS_MODULE;
474 mtd->_erase = doc_erase; 477 mtd->erase = doc_erase;
475 mtd->_read = doc_read; 478 mtd->point = NULL;
476 mtd->_write = doc_write; 479 mtd->unpoint = NULL;
477 mtd->_read_oob = doc_read_oob; 480 mtd->read = doc_read;
478 mtd->_write_oob = doc_write_oob; 481 mtd->write = doc_write;
482 mtd->read_oob = doc_read_oob;
483 mtd->write_oob = doc_write_oob;
484 mtd->sync = NULL;
485
486 this->totlen = 0;
487 this->numchips = 0;
479 this->curfloor = -1; 488 this->curfloor = -1;
480 this->curchip = -1; 489 this->curchip = -1;
481 490
@@ -582,6 +591,10 @@ static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
582 void __iomem * docptr = this->virtadr; 591 void __iomem * docptr = this->virtadr;
583 struct Nand *mychip = &this->chips[from >> (this->chipshift)]; 592 struct Nand *mychip = &this->chips[from >> (this->chipshift)];
584 593
594 /* Don't allow read past end of device */
595 if (from >= this->totlen)
596 return -EINVAL;
597
585 /* Don't allow a single read to cross a 512-byte block boundary */ 598 /* Don't allow a single read to cross a 512-byte block boundary */
586 if (from + len > ((from | 0x1ff) + 1)) 599 if (from + len > ((from | 0x1ff) + 1))
587 len = ((from | 0x1ff) + 1) - from; 600 len = ((from | 0x1ff) + 1) - from;
@@ -642,7 +655,7 @@ static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
642#ifdef ECC_DEBUG 655#ifdef ECC_DEBUG
643 printk("DiskOnChip ECC Error: Read at %lx\n", (long)from); 656 printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
644#endif 657#endif
645 /* Read the ECC syndrome through the DiskOnChip ECC logic. 658 /* Read the ECC syndrom through the DiskOnChip ECC logic.
646 These syndrome will be all ZERO when there is no error */ 659 These syndrome will be all ZERO when there is no error */
647 for (i = 0; i < 6; i++) 660 for (i = 0; i < 6; i++)
648 syndrome[i] = ReadDOC(docptr, Mplus_ECCSyndrome0 + i); 661 syndrome[i] = ReadDOC(docptr, Mplus_ECCSyndrome0 + i);
@@ -659,15 +672,23 @@ static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
659#ifdef ECC_DEBUG 672#ifdef ECC_DEBUG
660 printk("%s(%d): Millennium Plus ECC error (from=0x%x:\n", 673 printk("%s(%d): Millennium Plus ECC error (from=0x%x:\n",
661 __FILE__, __LINE__, (int)from); 674 __FILE__, __LINE__, (int)from);
662 printk(" syndrome= %*phC\n", 6, syndrome); 675 printk(" syndrome= %02x:%02x:%02x:%02x:%02x:"
663 printk(" eccbuf= %*phC\n", 6, eccbuf); 676 "%02x\n",
677 syndrome[0], syndrome[1], syndrome[2],
678 syndrome[3], syndrome[4], syndrome[5]);
679 printk(" eccbuf= %02x:%02x:%02x:%02x:%02x:"
680 "%02x\n",
681 eccbuf[0], eccbuf[1], eccbuf[2],
682 eccbuf[3], eccbuf[4], eccbuf[5]);
664#endif 683#endif
665 ret = -EIO; 684 ret = -EIO;
666 } 685 }
667 } 686 }
668 687
669#ifdef PSYCHO_DEBUG 688#ifdef PSYCHO_DEBUG
670 printk("ECC DATA at %lx: %*ph\n", (long)from, 6, eccbuf); 689 printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
690 (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
691 eccbuf[4], eccbuf[5]);
671#endif 692#endif
672 /* disable the ECC engine */ 693 /* disable the ECC engine */
673 WriteDOC(DOC_ECC_DIS, docptr , Mplus_ECCConf); 694 WriteDOC(DOC_ECC_DIS, docptr , Mplus_ECCConf);
@@ -689,6 +710,10 @@ static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
689 void __iomem * docptr = this->virtadr; 710 void __iomem * docptr = this->virtadr;
690 struct Nand *mychip = &this->chips[to >> (this->chipshift)]; 711 struct Nand *mychip = &this->chips[to >> (this->chipshift)];
691 712
713 /* Don't allow write past end of device */
714 if (to >= this->totlen)
715 return -EINVAL;
716
692 /* Don't allow writes which aren't exactly one block (512 bytes) */ 717 /* Don't allow writes which aren't exactly one block (512 bytes) */
693 if ((to & 0x1ff) || (len != 0x200)) 718 if ((to & 0x1ff) || (len != 0x200))
694 return -EINVAL; 719 return -EINVAL;
@@ -785,6 +810,7 @@ static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
785 printk("MTD: Error 0x%x programming at 0x%x\n", dummy, (int)to); 810 printk("MTD: Error 0x%x programming at 0x%x\n", dummy, (int)to);
786 /* Error in programming 811 /* Error in programming
787 FIXME: implement Bad Block Replacement (in nftl.c ??) */ 812 FIXME: implement Bad Block Replacement (in nftl.c ??) */
813 *retlen = 0;
788 ret = -EIO; 814 ret = -EIO;
789 } 815 }
790 dummy = ReadDOC(docptr, Mplus_LastDataRead); 816 dummy = ReadDOC(docptr, Mplus_LastDataRead);
@@ -809,7 +835,7 @@ static int doc_read_oob(struct mtd_info *mtd, loff_t ofs,
809 uint8_t *buf = ops->oobbuf; 835 uint8_t *buf = ops->oobbuf;
810 size_t len = ops->len; 836 size_t len = ops->len;
811 837
812 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); 838 BUG_ON(ops->mode != MTD_OOB_PLACE);
813 839
814 ofs += ops->ooboffs; 840 ofs += ops->ooboffs;
815 841
@@ -894,7 +920,7 @@ static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
894 uint8_t *buf = ops->oobbuf; 920 uint8_t *buf = ops->oobbuf;
895 size_t len = ops->len; 921 size_t len = ops->len;
896 922
897 BUG_ON(ops->mode != MTD_OPS_PLACE_OOB); 923 BUG_ON(ops->mode != MTD_OOB_PLACE);
898 924
899 ofs += ops->ooboffs; 925 ofs += ops->ooboffs;
900 926
diff --git a/drivers/mtd/devices/docecc.c b/drivers/mtd/devices/docecc.c
index 4a1c39b6f37..37ef29a73ee 100644
--- a/drivers/mtd/devices/docecc.c
+++ b/drivers/mtd/devices/docecc.c
@@ -2,7 +2,7 @@
2 * ECC algorithm for M-systems disk on chip. We use the excellent Reed 2 * ECC algorithm for M-systems disk on chip. We use the excellent Reed
3 * Solmon code of Phil Karn (karn@ka9q.ampr.org) available under the 3 * Solmon code of Phil Karn (karn@ka9q.ampr.org) available under the
4 * GNU GPL License. The rest is simply to convert the disk on chip 4 * GNU GPL License. The rest is simply to convert the disk on chip
5 * syndrome into a standard syndome. 5 * syndrom into a standard syndom.
6 * 6 *
7 * Author: Fabrice Bellard (fabrice.bellard@netgem.com) 7 * Author: Fabrice Bellard (fabrice.bellard@netgem.com)
8 * Copyright (C) 2000 Netgem S.A. 8 * Copyright (C) 2000 Netgem S.A.
diff --git a/drivers/mtd/devices/docg3.c b/drivers/mtd/devices/docg3.c
deleted file mode 100644
index 8510ccb9c6f..00000000000
--- a/drivers/mtd/devices/docg3.c
+++ /dev/null
@@ -1,2162 +0,0 @@
1/*
2 * Handles the M-Systems DiskOnChip G3 chip
3 *
4 * Copyright (C) 2011 Robert Jarzmik
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/errno.h>
25#include <linux/platform_device.h>
26#include <linux/string.h>
27#include <linux/slab.h>
28#include <linux/io.h>
29#include <linux/delay.h>
30#include <linux/mtd/mtd.h>
31#include <linux/mtd/partitions.h>
32#include <linux/bitmap.h>
33#include <linux/bitrev.h>
34#include <linux/bch.h>
35
36#include <linux/debugfs.h>
37#include <linux/seq_file.h>
38
39#define CREATE_TRACE_POINTS
40#include "docg3.h"
41
42/*
43 * This driver handles the DiskOnChip G3 flash memory.
44 *
45 * As no specification is available from M-Systems/Sandisk, this drivers lacks
46 * several functions available on the chip, as :
47 * - IPL write
48 *
49 * The bus data width (8bits versus 16bits) is not handled (if_cfg flag), and
50 * the driver assumes a 16bits data bus.
51 *
52 * DocG3 relies on 2 ECC algorithms, which are handled in hardware :
53 * - a 1 byte Hamming code stored in the OOB for each page
54 * - a 7 bytes BCH code stored in the OOB for each page
55 * The BCH ECC is :
56 * - BCH is in GF(2^14)
57 * - BCH is over data of 520 bytes (512 page + 7 page_info bytes
58 * + 1 hamming byte)
59 * - BCH can correct up to 4 bits (t = 4)
60 * - BCH syndroms are calculated in hardware, and checked in hardware as well
61 *
62 */
63
64static unsigned int reliable_mode;
65module_param(reliable_mode, uint, 0);
66MODULE_PARM_DESC(reliable_mode, "Set the docg3 mode (0=normal MLC, 1=fast, "
67 "2=reliable) : MLC normal operations are in normal mode");
68
69/**
70 * struct docg3_oobinfo - DiskOnChip G3 OOB layout
71 * @eccbytes: 8 bytes are used (1 for Hamming ECC, 7 for BCH ECC)
72 * @eccpos: ecc positions (byte 7 is Hamming ECC, byte 8-14 are BCH ECC)
73 * @oobfree: free pageinfo bytes (byte 0 until byte 6, byte 15
74 * @oobavail: 8 available bytes remaining after ECC toll
75 */
76static struct nand_ecclayout docg3_oobinfo = {
77 .eccbytes = 8,
78 .eccpos = {7, 8, 9, 10, 11, 12, 13, 14},
79 .oobfree = {{0, 7}, {15, 1} },
80 .oobavail = 8,
81};
82
83static inline u8 doc_readb(struct docg3 *docg3, u16 reg)
84{
85 u8 val = readb(docg3->cascade->base + reg);
86
87 trace_docg3_io(0, 8, reg, (int)val);
88 return val;
89}
90
91static inline u16 doc_readw(struct docg3 *docg3, u16 reg)
92{
93 u16 val = readw(docg3->cascade->base + reg);
94
95 trace_docg3_io(0, 16, reg, (int)val);
96 return val;
97}
98
99static inline void doc_writeb(struct docg3 *docg3, u8 val, u16 reg)
100{
101 writeb(val, docg3->cascade->base + reg);
102 trace_docg3_io(1, 8, reg, val);
103}
104
105static inline void doc_writew(struct docg3 *docg3, u16 val, u16 reg)
106{
107 writew(val, docg3->cascade->base + reg);
108 trace_docg3_io(1, 16, reg, val);
109}
110
111static inline void doc_flash_command(struct docg3 *docg3, u8 cmd)
112{
113 doc_writeb(docg3, cmd, DOC_FLASHCOMMAND);
114}
115
116static inline void doc_flash_sequence(struct docg3 *docg3, u8 seq)
117{
118 doc_writeb(docg3, seq, DOC_FLASHSEQUENCE);
119}
120
121static inline void doc_flash_address(struct docg3 *docg3, u8 addr)
122{
123 doc_writeb(docg3, addr, DOC_FLASHADDRESS);
124}
125
126static char const *part_probes[] = { "cmdlinepart", "saftlpart", NULL };
127
128static int doc_register_readb(struct docg3 *docg3, int reg)
129{
130 u8 val;
131
132 doc_writew(docg3, reg, DOC_READADDRESS);
133 val = doc_readb(docg3, reg);
134 doc_vdbg("Read register %04x : %02x\n", reg, val);
135 return val;
136}
137
138static int doc_register_readw(struct docg3 *docg3, int reg)
139{
140 u16 val;
141
142 doc_writew(docg3, reg, DOC_READADDRESS);
143 val = doc_readw(docg3, reg);
144 doc_vdbg("Read register %04x : %04x\n", reg, val);
145 return val;
146}
147
148/**
149 * doc_delay - delay docg3 operations
150 * @docg3: the device
151 * @nbNOPs: the number of NOPs to issue
152 *
153 * As no specification is available, the right timings between chip commands are
154 * unknown. The only available piece of information are the observed nops on a
155 * working docg3 chip.
156 * Therefore, doc_delay relies on a busy loop of NOPs, instead of scheduler
157 * friendlier msleep() functions or blocking mdelay().
158 */
159static void doc_delay(struct docg3 *docg3, int nbNOPs)
160{
161 int i;
162
163 doc_vdbg("NOP x %d\n", nbNOPs);
164 for (i = 0; i < nbNOPs; i++)
165 doc_writeb(docg3, 0, DOC_NOP);
166}
167
168static int is_prot_seq_error(struct docg3 *docg3)
169{
170 int ctrl;
171
172 ctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
173 return ctrl & (DOC_CTRL_PROTECTION_ERROR | DOC_CTRL_SEQUENCE_ERROR);
174}
175
176static int doc_is_ready(struct docg3 *docg3)
177{
178 int ctrl;
179
180 ctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
181 return ctrl & DOC_CTRL_FLASHREADY;
182}
183
184static int doc_wait_ready(struct docg3 *docg3)
185{
186 int maxWaitCycles = 100;
187
188 do {
189 doc_delay(docg3, 4);
190 cpu_relax();
191 } while (!doc_is_ready(docg3) && maxWaitCycles--);
192 doc_delay(docg3, 2);
193 if (maxWaitCycles > 0)
194 return 0;
195 else
196 return -EIO;
197}
198
199static int doc_reset_seq(struct docg3 *docg3)
200{
201 int ret;
202
203 doc_writeb(docg3, 0x10, DOC_FLASHCONTROL);
204 doc_flash_sequence(docg3, DOC_SEQ_RESET);
205 doc_flash_command(docg3, DOC_CMD_RESET);
206 doc_delay(docg3, 2);
207 ret = doc_wait_ready(docg3);
208
209 doc_dbg("doc_reset_seq() -> isReady=%s\n", ret ? "false" : "true");
210 return ret;
211}
212
213/**
214 * doc_read_data_area - Read data from data area
215 * @docg3: the device
216 * @buf: the buffer to fill in (might be NULL is dummy reads)
217 * @len: the length to read
218 * @first: first time read, DOC_READADDRESS should be set
219 *
220 * Reads bytes from flash data. Handles the single byte / even bytes reads.
221 */
222static void doc_read_data_area(struct docg3 *docg3, void *buf, int len,
223 int first)
224{
225 int i, cdr, len4;
226 u16 data16, *dst16;
227 u8 data8, *dst8;
228
229 doc_dbg("doc_read_data_area(buf=%p, len=%d)\n", buf, len);
230 cdr = len & 0x1;
231 len4 = len - cdr;
232
233 if (first)
234 doc_writew(docg3, DOC_IOSPACE_DATA, DOC_READADDRESS);
235 dst16 = buf;
236 for (i = 0; i < len4; i += 2) {
237 data16 = doc_readw(docg3, DOC_IOSPACE_DATA);
238 if (dst16) {
239 *dst16 = data16;
240 dst16++;
241 }
242 }
243
244 if (cdr) {
245 doc_writew(docg3, DOC_IOSPACE_DATA | DOC_READADDR_ONE_BYTE,
246 DOC_READADDRESS);
247 doc_delay(docg3, 1);
248 dst8 = (u8 *)dst16;
249 for (i = 0; i < cdr; i++) {
250 data8 = doc_readb(docg3, DOC_IOSPACE_DATA);
251 if (dst8) {
252 *dst8 = data8;
253 dst8++;
254 }
255 }
256 }
257}
258
259/**
260 * doc_write_data_area - Write data into data area
261 * @docg3: the device
262 * @buf: the buffer to get input bytes from
263 * @len: the length to write
264 *
265 * Writes bytes into flash data. Handles the single byte / even bytes writes.
266 */
267static void doc_write_data_area(struct docg3 *docg3, const void *buf, int len)
268{
269 int i, cdr, len4;
270 u16 *src16;
271 u8 *src8;
272
273 doc_dbg("doc_write_data_area(buf=%p, len=%d)\n", buf, len);
274 cdr = len & 0x3;
275 len4 = len - cdr;
276
277 doc_writew(docg3, DOC_IOSPACE_DATA, DOC_READADDRESS);
278 src16 = (u16 *)buf;
279 for (i = 0; i < len4; i += 2) {
280 doc_writew(docg3, *src16, DOC_IOSPACE_DATA);
281 src16++;
282 }
283
284 src8 = (u8 *)src16;
285 for (i = 0; i < cdr; i++) {
286 doc_writew(docg3, DOC_IOSPACE_DATA | DOC_READADDR_ONE_BYTE,
287 DOC_READADDRESS);
288 doc_writeb(docg3, *src8, DOC_IOSPACE_DATA);
289 src8++;
290 }
291}
292
293/**
294 * doc_set_data_mode - Sets the flash to normal or reliable data mode
295 * @docg3: the device
296 *
297 * The reliable data mode is a bit slower than the fast mode, but less errors
298 * occur. Entering the reliable mode cannot be done without entering the fast
299 * mode first.
300 *
301 * In reliable mode, pages 2*n and 2*n+1 are clones. Writing to page 0 of blocks
302 * (4,5) make the hardware write also to page 1 of blocks blocks(4,5). Reading
303 * from page 0 of blocks (4,5) or from page 1 of blocks (4,5) gives the same
304 * result, which is a logical and between bytes from page 0 and page 1 (which is
305 * consistent with the fact that writing to a page is _clearing_ bits of that
306 * page).
307 */
308static void doc_set_reliable_mode(struct docg3 *docg3)
309{
310 static char *strmode[] = { "normal", "fast", "reliable", "invalid" };
311
312 doc_dbg("doc_set_reliable_mode(%s)\n", strmode[docg3->reliable]);
313 switch (docg3->reliable) {
314 case 0:
315 break;
316 case 1:
317 doc_flash_sequence(docg3, DOC_SEQ_SET_FASTMODE);
318 doc_flash_command(docg3, DOC_CMD_FAST_MODE);
319 break;
320 case 2:
321 doc_flash_sequence(docg3, DOC_SEQ_SET_RELIABLEMODE);
322 doc_flash_command(docg3, DOC_CMD_FAST_MODE);
323 doc_flash_command(docg3, DOC_CMD_RELIABLE_MODE);
324 break;
325 default:
326 doc_err("doc_set_reliable_mode(): invalid mode\n");
327 break;
328 }
329 doc_delay(docg3, 2);
330}
331
332/**
333 * doc_set_asic_mode - Set the ASIC mode
334 * @docg3: the device
335 * @mode: the mode
336 *
337 * The ASIC can work in 3 modes :
338 * - RESET: all registers are zeroed
339 * - NORMAL: receives and handles commands
340 * - POWERDOWN: minimal poweruse, flash parts shut off
341 */
342static void doc_set_asic_mode(struct docg3 *docg3, u8 mode)
343{
344 int i;
345
346 for (i = 0; i < 12; i++)
347 doc_readb(docg3, DOC_IOSPACE_IPL);
348
349 mode |= DOC_ASICMODE_MDWREN;
350 doc_dbg("doc_set_asic_mode(%02x)\n", mode);
351 doc_writeb(docg3, mode, DOC_ASICMODE);
352 doc_writeb(docg3, ~mode, DOC_ASICMODECONFIRM);
353 doc_delay(docg3, 1);
354}
355
356/**
357 * doc_set_device_id - Sets the devices id for cascaded G3 chips
358 * @docg3: the device
359 * @id: the chip to select (amongst 0, 1, 2, 3)
360 *
361 * There can be 4 cascaded G3 chips. This function selects the one which will
362 * should be the active one.
363 */
364static void doc_set_device_id(struct docg3 *docg3, int id)
365{
366 u8 ctrl;
367
368 doc_dbg("doc_set_device_id(%d)\n", id);
369 doc_writeb(docg3, id, DOC_DEVICESELECT);
370 ctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
371
372 ctrl &= ~DOC_CTRL_VIOLATION;
373 ctrl |= DOC_CTRL_CE;
374 doc_writeb(docg3, ctrl, DOC_FLASHCONTROL);
375}
376
377/**
378 * doc_set_extra_page_mode - Change flash page layout
379 * @docg3: the device
380 *
381 * Normally, the flash page is split into the data (512 bytes) and the out of
382 * band data (16 bytes). For each, 4 more bytes can be accessed, where the wear
383 * leveling counters are stored. To access this last area of 4 bytes, a special
384 * mode must be input to the flash ASIC.
385 *
386 * Returns 0 if no error occurred, -EIO else.
387 */
388static int doc_set_extra_page_mode(struct docg3 *docg3)
389{
390 int fctrl;
391
392 doc_dbg("doc_set_extra_page_mode()\n");
393 doc_flash_sequence(docg3, DOC_SEQ_PAGE_SIZE_532);
394 doc_flash_command(docg3, DOC_CMD_PAGE_SIZE_532);
395 doc_delay(docg3, 2);
396
397 fctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
398 if (fctrl & (DOC_CTRL_PROTECTION_ERROR | DOC_CTRL_SEQUENCE_ERROR))
399 return -EIO;
400 else
401 return 0;
402}
403
404/**
405 * doc_setup_addr_sector - Setup blocks/page/ofs address for one plane
406 * @docg3: the device
407 * @sector: the sector
408 */
409static void doc_setup_addr_sector(struct docg3 *docg3, int sector)
410{
411 doc_delay(docg3, 1);
412 doc_flash_address(docg3, sector & 0xff);
413 doc_flash_address(docg3, (sector >> 8) & 0xff);
414 doc_flash_address(docg3, (sector >> 16) & 0xff);
415 doc_delay(docg3, 1);
416}
417
418/**
419 * doc_setup_writeaddr_sector - Setup blocks/page/ofs address for one plane
420 * @docg3: the device
421 * @sector: the sector
422 * @ofs: the offset in the page, between 0 and (512 + 16 + 512)
423 */
424static void doc_setup_writeaddr_sector(struct docg3 *docg3, int sector, int ofs)
425{
426 ofs = ofs >> 2;
427 doc_delay(docg3, 1);
428 doc_flash_address(docg3, ofs & 0xff);
429 doc_flash_address(docg3, sector & 0xff);
430 doc_flash_address(docg3, (sector >> 8) & 0xff);
431 doc_flash_address(docg3, (sector >> 16) & 0xff);
432 doc_delay(docg3, 1);
433}
434
435/**
436 * doc_seek - Set both flash planes to the specified block, page for reading
437 * @docg3: the device
438 * @block0: the first plane block index
439 * @block1: the second plane block index
440 * @page: the page index within the block
441 * @wear: if true, read will occur on the 4 extra bytes of the wear area
442 * @ofs: offset in page to read
443 *
444 * Programs the flash even and odd planes to the specific block and page.
445 * Alternatively, programs the flash to the wear area of the specified page.
446 */
447static int doc_read_seek(struct docg3 *docg3, int block0, int block1, int page,
448 int wear, int ofs)
449{
450 int sector, ret = 0;
451
452 doc_dbg("doc_seek(blocks=(%d,%d), page=%d, ofs=%d, wear=%d)\n",
453 block0, block1, page, ofs, wear);
454
455 if (!wear && (ofs < 2 * DOC_LAYOUT_PAGE_SIZE)) {
456 doc_flash_sequence(docg3, DOC_SEQ_SET_PLANE1);
457 doc_flash_command(docg3, DOC_CMD_READ_PLANE1);
458 doc_delay(docg3, 2);
459 } else {
460 doc_flash_sequence(docg3, DOC_SEQ_SET_PLANE2);
461 doc_flash_command(docg3, DOC_CMD_READ_PLANE2);
462 doc_delay(docg3, 2);
463 }
464
465 doc_set_reliable_mode(docg3);
466 if (wear)
467 ret = doc_set_extra_page_mode(docg3);
468 if (ret)
469 goto out;
470
471 doc_flash_sequence(docg3, DOC_SEQ_READ);
472 sector = (block0 << DOC_ADDR_BLOCK_SHIFT) + (page & DOC_ADDR_PAGE_MASK);
473 doc_flash_command(docg3, DOC_CMD_PROG_BLOCK_ADDR);
474 doc_setup_addr_sector(docg3, sector);
475
476 sector = (block1 << DOC_ADDR_BLOCK_SHIFT) + (page & DOC_ADDR_PAGE_MASK);
477 doc_flash_command(docg3, DOC_CMD_PROG_BLOCK_ADDR);
478 doc_setup_addr_sector(docg3, sector);
479 doc_delay(docg3, 1);
480
481out:
482 return ret;
483}
484
485/**
486 * doc_write_seek - Set both flash planes to the specified block, page for writing
487 * @docg3: the device
488 * @block0: the first plane block index
489 * @block1: the second plane block index
490 * @page: the page index within the block
491 * @ofs: offset in page to write
492 *
493 * Programs the flash even and odd planes to the specific block and page.
494 * Alternatively, programs the flash to the wear area of the specified page.
495 */
496static int doc_write_seek(struct docg3 *docg3, int block0, int block1, int page,
497 int ofs)
498{
499 int ret = 0, sector;
500
501 doc_dbg("doc_write_seek(blocks=(%d,%d), page=%d, ofs=%d)\n",
502 block0, block1, page, ofs);
503
504 doc_set_reliable_mode(docg3);
505
506 if (ofs < 2 * DOC_LAYOUT_PAGE_SIZE) {
507 doc_flash_sequence(docg3, DOC_SEQ_SET_PLANE1);
508 doc_flash_command(docg3, DOC_CMD_READ_PLANE1);
509 doc_delay(docg3, 2);
510 } else {
511 doc_flash_sequence(docg3, DOC_SEQ_SET_PLANE2);
512 doc_flash_command(docg3, DOC_CMD_READ_PLANE2);
513 doc_delay(docg3, 2);
514 }
515
516 doc_flash_sequence(docg3, DOC_SEQ_PAGE_SETUP);
517 doc_flash_command(docg3, DOC_CMD_PROG_CYCLE1);
518
519 sector = (block0 << DOC_ADDR_BLOCK_SHIFT) + (page & DOC_ADDR_PAGE_MASK);
520 doc_setup_writeaddr_sector(docg3, sector, ofs);
521
522 doc_flash_command(docg3, DOC_CMD_PROG_CYCLE3);
523 doc_delay(docg3, 2);
524 ret = doc_wait_ready(docg3);
525 if (ret)
526 goto out;
527
528 doc_flash_command(docg3, DOC_CMD_PROG_CYCLE1);
529 sector = (block1 << DOC_ADDR_BLOCK_SHIFT) + (page & DOC_ADDR_PAGE_MASK);
530 doc_setup_writeaddr_sector(docg3, sector, ofs);
531 doc_delay(docg3, 1);
532
533out:
534 return ret;
535}
536
537
538/**
539 * doc_read_page_ecc_init - Initialize hardware ECC engine
540 * @docg3: the device
541 * @len: the number of bytes covered by the ECC (BCH covered)
542 *
543 * The function does initialize the hardware ECC engine to compute the Hamming
544 * ECC (on 1 byte) and the BCH hardware ECC (on 7 bytes).
545 *
546 * Return 0 if succeeded, -EIO on error
547 */
548static int doc_read_page_ecc_init(struct docg3 *docg3, int len)
549{
550 doc_writew(docg3, DOC_ECCCONF0_READ_MODE
551 | DOC_ECCCONF0_BCH_ENABLE | DOC_ECCCONF0_HAMMING_ENABLE
552 | (len & DOC_ECCCONF0_DATA_BYTES_MASK),
553 DOC_ECCCONF0);
554 doc_delay(docg3, 4);
555 doc_register_readb(docg3, DOC_FLASHCONTROL);
556 return doc_wait_ready(docg3);
557}
558
559/**
560 * doc_write_page_ecc_init - Initialize hardware BCH ECC engine
561 * @docg3: the device
562 * @len: the number of bytes covered by the ECC (BCH covered)
563 *
564 * The function does initialize the hardware ECC engine to compute the Hamming
565 * ECC (on 1 byte) and the BCH hardware ECC (on 7 bytes).
566 *
567 * Return 0 if succeeded, -EIO on error
568 */
569static int doc_write_page_ecc_init(struct docg3 *docg3, int len)
570{
571 doc_writew(docg3, DOC_ECCCONF0_WRITE_MODE
572 | DOC_ECCCONF0_BCH_ENABLE | DOC_ECCCONF0_HAMMING_ENABLE
573 | (len & DOC_ECCCONF0_DATA_BYTES_MASK),
574 DOC_ECCCONF0);
575 doc_delay(docg3, 4);
576 doc_register_readb(docg3, DOC_FLASHCONTROL);
577 return doc_wait_ready(docg3);
578}
579
580/**
581 * doc_ecc_disable - Disable Hamming and BCH ECC hardware calculator
582 * @docg3: the device
583 *
584 * Disables the hardware ECC generator and checker, for unchecked reads (as when
585 * reading OOB only or write status byte).
586 */
587static void doc_ecc_disable(struct docg3 *docg3)
588{
589 doc_writew(docg3, DOC_ECCCONF0_READ_MODE, DOC_ECCCONF0);
590 doc_delay(docg3, 4);
591}
592
593/**
594 * doc_hamming_ecc_init - Initialize hardware Hamming ECC engine
595 * @docg3: the device
596 * @nb_bytes: the number of bytes covered by the ECC (Hamming covered)
597 *
598 * This function programs the ECC hardware to compute the hamming code on the
599 * last provided N bytes to the hardware generator.
600 */
601static void doc_hamming_ecc_init(struct docg3 *docg3, int nb_bytes)
602{
603 u8 ecc_conf1;
604
605 ecc_conf1 = doc_register_readb(docg3, DOC_ECCCONF1);
606 ecc_conf1 &= ~DOC_ECCCONF1_HAMMING_BITS_MASK;
607 ecc_conf1 |= (nb_bytes & DOC_ECCCONF1_HAMMING_BITS_MASK);
608 doc_writeb(docg3, ecc_conf1, DOC_ECCCONF1);
609}
610
611/**
612 * doc_ecc_bch_fix_data - Fix if need be read data from flash
613 * @docg3: the device
614 * @buf: the buffer of read data (512 + 7 + 1 bytes)
615 * @hwecc: the hardware calculated ECC.
616 * It's in fact recv_ecc ^ calc_ecc, where recv_ecc was read from OOB
617 * area data, and calc_ecc the ECC calculated by the hardware generator.
618 *
619 * Checks if the received data matches the ECC, and if an error is detected,
620 * tries to fix the bit flips (at most 4) in the buffer buf. As the docg3
621 * understands the (data, ecc, syndroms) in an inverted order in comparison to
622 * the BCH library, the function reverses the order of bits (ie. bit7 and bit0,
623 * bit6 and bit 1, ...) for all ECC data.
624 *
625 * The hardware ecc unit produces oob_ecc ^ calc_ecc. The kernel's bch
626 * algorithm is used to decode this. However the hw operates on page
627 * data in a bit order that is the reverse of that of the bch alg,
628 * requiring that the bits be reversed on the result. Thanks to Ivan
629 * Djelic for his analysis.
630 *
631 * Returns number of fixed bits (0, 1, 2, 3, 4) or -EBADMSG if too many bit
632 * errors were detected and cannot be fixed.
633 */
634static int doc_ecc_bch_fix_data(struct docg3 *docg3, void *buf, u8 *hwecc)
635{
636 u8 ecc[DOC_ECC_BCH_SIZE];
637 int errorpos[DOC_ECC_BCH_T], i, numerrs;
638
639 for (i = 0; i < DOC_ECC_BCH_SIZE; i++)
640 ecc[i] = bitrev8(hwecc[i]);
641 numerrs = decode_bch(docg3->cascade->bch, NULL,
642 DOC_ECC_BCH_COVERED_BYTES,
643 NULL, ecc, NULL, errorpos);
644 BUG_ON(numerrs == -EINVAL);
645 if (numerrs < 0)
646 goto out;
647
648 for (i = 0; i < numerrs; i++)
649 errorpos[i] = (errorpos[i] & ~7) | (7 - (errorpos[i] & 7));
650 for (i = 0; i < numerrs; i++)
651 if (errorpos[i] < DOC_ECC_BCH_COVERED_BYTES*8)
652 /* error is located in data, correct it */
653 change_bit(errorpos[i], buf);
654out:
655 doc_dbg("doc_ecc_bch_fix_data: flipped %d bits\n", numerrs);
656 return numerrs;
657}
658
659
660/**
661 * doc_read_page_prepare - Prepares reading data from a flash page
662 * @docg3: the device
663 * @block0: the first plane block index on flash memory
664 * @block1: the second plane block index on flash memory
665 * @page: the page index in the block
666 * @offset: the offset in the page (must be a multiple of 4)
667 *
668 * Prepares the page to be read in the flash memory :
669 * - tell ASIC to map the flash pages
670 * - tell ASIC to be in read mode
671 *
672 * After a call to this method, a call to doc_read_page_finish is mandatory,
673 * to end the read cycle of the flash.
674 *
675 * Read data from a flash page. The length to be read must be between 0 and
676 * (page_size + oob_size + wear_size), ie. 532, and a multiple of 4 (because
677 * the extra bytes reading is not implemented).
678 *
679 * As pages are grouped by 2 (in 2 planes), reading from a page must be done
680 * in two steps:
681 * - one read of 512 bytes at offset 0
682 * - one read of 512 bytes at offset 512 + 16
683 *
684 * Returns 0 if successful, -EIO if a read error occurred.
685 */
686static int doc_read_page_prepare(struct docg3 *docg3, int block0, int block1,
687 int page, int offset)
688{
689 int wear_area = 0, ret = 0;
690
691 doc_dbg("doc_read_page_prepare(blocks=(%d,%d), page=%d, ofsInPage=%d)\n",
692 block0, block1, page, offset);
693 if (offset >= DOC_LAYOUT_WEAR_OFFSET)
694 wear_area = 1;
695 if (!wear_area && offset > (DOC_LAYOUT_PAGE_OOB_SIZE * 2))
696 return -EINVAL;
697
698 doc_set_device_id(docg3, docg3->device_id);
699 ret = doc_reset_seq(docg3);
700 if (ret)
701 goto err;
702
703 /* Program the flash address block and page */
704 ret = doc_read_seek(docg3, block0, block1, page, wear_area, offset);
705 if (ret)
706 goto err;
707
708 doc_flash_command(docg3, DOC_CMD_READ_ALL_PLANES);
709 doc_delay(docg3, 2);
710 doc_wait_ready(docg3);
711
712 doc_flash_command(docg3, DOC_CMD_SET_ADDR_READ);
713 doc_delay(docg3, 1);
714 if (offset >= DOC_LAYOUT_PAGE_SIZE * 2)
715 offset -= 2 * DOC_LAYOUT_PAGE_SIZE;
716 doc_flash_address(docg3, offset >> 2);
717 doc_delay(docg3, 1);
718 doc_wait_ready(docg3);
719
720 doc_flash_command(docg3, DOC_CMD_READ_FLASH);
721
722 return 0;
723err:
724 doc_writeb(docg3, 0, DOC_DATAEND);
725 doc_delay(docg3, 2);
726 return -EIO;
727}
728
729/**
730 * doc_read_page_getbytes - Reads bytes from a prepared page
731 * @docg3: the device
732 * @len: the number of bytes to be read (must be a multiple of 4)
733 * @buf: the buffer to be filled in (or NULL is forget bytes)
734 * @first: 1 if first time read, DOC_READADDRESS should be set
735 * @last_odd: 1 if last read ended up on an odd byte
736 *
737 * Reads bytes from a prepared page. There is a trickery here : if the last read
738 * ended up on an odd offset in the 1024 bytes double page, ie. between the 2
739 * planes, the first byte must be read apart. If a word (16bit) read was used,
740 * the read would return the byte of plane 2 as low *and* high endian, which
741 * will mess the read.
742 *
743 */
744static int doc_read_page_getbytes(struct docg3 *docg3, int len, u_char *buf,
745 int first, int last_odd)
746{
747 if (last_odd && len > 0) {
748 doc_read_data_area(docg3, buf, 1, first);
749 doc_read_data_area(docg3, buf ? buf + 1 : buf, len - 1, 0);
750 } else {
751 doc_read_data_area(docg3, buf, len, first);
752 }
753 doc_delay(docg3, 2);
754 return len;
755}
756
757/**
758 * doc_write_page_putbytes - Writes bytes into a prepared page
759 * @docg3: the device
760 * @len: the number of bytes to be written
761 * @buf: the buffer of input bytes
762 *
763 */
764static void doc_write_page_putbytes(struct docg3 *docg3, int len,
765 const u_char *buf)
766{
767 doc_write_data_area(docg3, buf, len);
768 doc_delay(docg3, 2);
769}
770
771/**
772 * doc_get_bch_hw_ecc - Get hardware calculated BCH ECC
773 * @docg3: the device
774 * @hwecc: the array of 7 integers where the hardware ecc will be stored
775 */
776static void doc_get_bch_hw_ecc(struct docg3 *docg3, u8 *hwecc)
777{
778 int i;
779
780 for (i = 0; i < DOC_ECC_BCH_SIZE; i++)
781 hwecc[i] = doc_register_readb(docg3, DOC_BCH_HW_ECC(i));
782}
783
784/**
785 * doc_page_finish - Ends reading/writing of a flash page
786 * @docg3: the device
787 */
788static void doc_page_finish(struct docg3 *docg3)
789{
790 doc_writeb(docg3, 0, DOC_DATAEND);
791 doc_delay(docg3, 2);
792}
793
794/**
795 * doc_read_page_finish - Ends reading of a flash page
796 * @docg3: the device
797 *
798 * As a side effect, resets the chip selector to 0. This ensures that after each
799 * read operation, the floor 0 is selected. Therefore, if the systems halts, the
800 * reboot will boot on floor 0, where the IPL is.
801 */
802static void doc_read_page_finish(struct docg3 *docg3)
803{
804 doc_page_finish(docg3);
805 doc_set_device_id(docg3, 0);
806}
807
808/**
809 * calc_block_sector - Calculate blocks, pages and ofs.
810
811 * @from: offset in flash
812 * @block0: first plane block index calculated
813 * @block1: second plane block index calculated
814 * @page: page calculated
815 * @ofs: offset in page
816 * @reliable: 0 if docg3 in normal mode, 1 if docg3 in fast mode, 2 if docg3 in
817 * reliable mode.
818 *
819 * The calculation is based on the reliable/normal mode. In normal mode, the 64
820 * pages of a block are available. In reliable mode, as pages 2*n and 2*n+1 are
821 * clones, only 32 pages per block are available.
822 */
823static void calc_block_sector(loff_t from, int *block0, int *block1, int *page,
824 int *ofs, int reliable)
825{
826 uint sector, pages_biblock;
827
828 pages_biblock = DOC_LAYOUT_PAGES_PER_BLOCK * DOC_LAYOUT_NBPLANES;
829 if (reliable == 1 || reliable == 2)
830 pages_biblock /= 2;
831
832 sector = from / DOC_LAYOUT_PAGE_SIZE;
833 *block0 = sector / pages_biblock * DOC_LAYOUT_NBPLANES;
834 *block1 = *block0 + 1;
835 *page = sector % pages_biblock;
836 *page /= DOC_LAYOUT_NBPLANES;
837 if (reliable == 1 || reliable == 2)
838 *page *= 2;
839 if (sector % 2)
840 *ofs = DOC_LAYOUT_PAGE_OOB_SIZE;
841 else
842 *ofs = 0;
843}
844
845/**
846 * doc_read_oob - Read out of band bytes from flash
847 * @mtd: the device
848 * @from: the offset from first block and first page, in bytes, aligned on page
849 * size
850 * @ops: the mtd oob structure
851 *
852 * Reads flash memory OOB area of pages.
853 *
854 * Returns 0 if read successful, of -EIO, -EINVAL if an error occurred
855 */
856static int doc_read_oob(struct mtd_info *mtd, loff_t from,
857 struct mtd_oob_ops *ops)
858{
859 struct docg3 *docg3 = mtd->priv;
860 int block0, block1, page, ret, skip, ofs = 0;
861 u8 *oobbuf = ops->oobbuf;
862 u8 *buf = ops->datbuf;
863 size_t len, ooblen, nbdata, nboob;
864 u8 hwecc[DOC_ECC_BCH_SIZE], eccconf1;
865 int max_bitflips = 0;
866
867 if (buf)
868 len = ops->len;
869 else
870 len = 0;
871 if (oobbuf)
872 ooblen = ops->ooblen;
873 else
874 ooblen = 0;
875
876 if (oobbuf && ops->mode == MTD_OPS_PLACE_OOB)
877 oobbuf += ops->ooboffs;
878
879 doc_dbg("doc_read_oob(from=%lld, mode=%d, data=(%p:%zu), oob=(%p:%zu))\n",
880 from, ops->mode, buf, len, oobbuf, ooblen);
881 if (ooblen % DOC_LAYOUT_OOB_SIZE)
882 return -EINVAL;
883
884 if (from + len > mtd->size)
885 return -EINVAL;
886
887 ops->oobretlen = 0;
888 ops->retlen = 0;
889 ret = 0;
890 skip = from % DOC_LAYOUT_PAGE_SIZE;
891 mutex_lock(&docg3->cascade->lock);
892 while (ret >= 0 && (len > 0 || ooblen > 0)) {
893 calc_block_sector(from - skip, &block0, &block1, &page, &ofs,
894 docg3->reliable);
895 nbdata = min_t(size_t, len, DOC_LAYOUT_PAGE_SIZE - skip);
896 nboob = min_t(size_t, ooblen, (size_t)DOC_LAYOUT_OOB_SIZE);
897 ret = doc_read_page_prepare(docg3, block0, block1, page, ofs);
898 if (ret < 0)
899 goto out;
900 ret = doc_read_page_ecc_init(docg3, DOC_ECC_BCH_TOTAL_BYTES);
901 if (ret < 0)
902 goto err_in_read;
903 ret = doc_read_page_getbytes(docg3, skip, NULL, 1, 0);
904 if (ret < skip)
905 goto err_in_read;
906 ret = doc_read_page_getbytes(docg3, nbdata, buf, 0, skip % 2);
907 if (ret < nbdata)
908 goto err_in_read;
909 doc_read_page_getbytes(docg3,
910 DOC_LAYOUT_PAGE_SIZE - nbdata - skip,
911 NULL, 0, (skip + nbdata) % 2);
912 ret = doc_read_page_getbytes(docg3, nboob, oobbuf, 0, 0);
913 if (ret < nboob)
914 goto err_in_read;
915 doc_read_page_getbytes(docg3, DOC_LAYOUT_OOB_SIZE - nboob,
916 NULL, 0, nboob % 2);
917
918 doc_get_bch_hw_ecc(docg3, hwecc);
919 eccconf1 = doc_register_readb(docg3, DOC_ECCCONF1);
920
921 if (nboob >= DOC_LAYOUT_OOB_SIZE) {
922 doc_dbg("OOB - INFO: %*phC\n", 7, oobbuf);
923 doc_dbg("OOB - HAMMING: %02x\n", oobbuf[7]);
924 doc_dbg("OOB - BCH_ECC: %*phC\n", 7, oobbuf + 8);
925 doc_dbg("OOB - UNUSED: %02x\n", oobbuf[15]);
926 }
927 doc_dbg("ECC checks: ECCConf1=%x\n", eccconf1);
928 doc_dbg("ECC HW_ECC: %*phC\n", 7, hwecc);
929
930 ret = -EIO;
931 if (is_prot_seq_error(docg3))
932 goto err_in_read;
933 ret = 0;
934 if ((block0 >= DOC_LAYOUT_BLOCK_FIRST_DATA) &&
935 (eccconf1 & DOC_ECCCONF1_BCH_SYNDROM_ERR) &&
936 (eccconf1 & DOC_ECCCONF1_PAGE_IS_WRITTEN) &&
937 (ops->mode != MTD_OPS_RAW) &&
938 (nbdata == DOC_LAYOUT_PAGE_SIZE)) {
939 ret = doc_ecc_bch_fix_data(docg3, buf, hwecc);
940 if (ret < 0) {
941 mtd->ecc_stats.failed++;
942 ret = -EBADMSG;
943 }
944 if (ret > 0) {
945 mtd->ecc_stats.corrected += ret;
946 max_bitflips = max(max_bitflips, ret);
947 ret = max_bitflips;
948 }
949 }
950
951 doc_read_page_finish(docg3);
952 ops->retlen += nbdata;
953 ops->oobretlen += nboob;
954 buf += nbdata;
955 oobbuf += nboob;
956 len -= nbdata;
957 ooblen -= nboob;
958 from += DOC_LAYOUT_PAGE_SIZE;
959 skip = 0;
960 }
961
962out:
963 mutex_unlock(&docg3->cascade->lock);
964 return ret;
965err_in_read:
966 doc_read_page_finish(docg3);
967 goto out;
968}
969
970/**
971 * doc_read - Read bytes from flash
972 * @mtd: the device
973 * @from: the offset from first block and first page, in bytes, aligned on page
974 * size
975 * @len: the number of bytes to read (must be a multiple of 4)
976 * @retlen: the number of bytes actually read
977 * @buf: the filled in buffer
978 *
979 * Reads flash memory pages. This function does not read the OOB chunk, but only
980 * the page data.
981 *
982 * Returns 0 if read successful, of -EIO, -EINVAL if an error occurred
983 */
984static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
985 size_t *retlen, u_char *buf)
986{
987 struct mtd_oob_ops ops;
988 size_t ret;
989
990 memset(&ops, 0, sizeof(ops));
991 ops.datbuf = buf;
992 ops.len = len;
993 ops.mode = MTD_OPS_AUTO_OOB;
994
995 ret = doc_read_oob(mtd, from, &ops);
996 *retlen = ops.retlen;
997 return ret;
998}
999
1000static int doc_reload_bbt(struct docg3 *docg3)
1001{
1002 int block = DOC_LAYOUT_BLOCK_BBT;
1003 int ret = 0, nbpages, page;
1004 u_char *buf = docg3->bbt;
1005
1006 nbpages = DIV_ROUND_UP(docg3->max_block + 1, 8 * DOC_LAYOUT_PAGE_SIZE);
1007 for (page = 0; !ret && (page < nbpages); page++) {
1008 ret = doc_read_page_prepare(docg3, block, block + 1,
1009 page + DOC_LAYOUT_PAGE_BBT, 0);
1010 if (!ret)
1011 ret = doc_read_page_ecc_init(docg3,
1012 DOC_LAYOUT_PAGE_SIZE);
1013 if (!ret)
1014 doc_read_page_getbytes(docg3, DOC_LAYOUT_PAGE_SIZE,
1015 buf, 1, 0);
1016 buf += DOC_LAYOUT_PAGE_SIZE;
1017 }
1018 doc_read_page_finish(docg3);
1019 return ret;
1020}
1021
1022/**
1023 * doc_block_isbad - Checks whether a block is good or not
1024 * @mtd: the device
1025 * @from: the offset to find the correct block
1026 *
1027 * Returns 1 if block is bad, 0 if block is good
1028 */
1029static int doc_block_isbad(struct mtd_info *mtd, loff_t from)
1030{
1031 struct docg3 *docg3 = mtd->priv;
1032 int block0, block1, page, ofs, is_good;
1033
1034 calc_block_sector(from, &block0, &block1, &page, &ofs,
1035 docg3->reliable);
1036 doc_dbg("doc_block_isbad(from=%lld) => block=(%d,%d), page=%d, ofs=%d\n",
1037 from, block0, block1, page, ofs);
1038
1039 if (block0 < DOC_LAYOUT_BLOCK_FIRST_DATA)
1040 return 0;
1041 if (block1 > docg3->max_block)
1042 return -EINVAL;
1043
1044 is_good = docg3->bbt[block0 >> 3] & (1 << (block0 & 0x7));
1045 return !is_good;
1046}
1047
1048#if 0
1049/**
1050 * doc_get_erase_count - Get block erase count
1051 * @docg3: the device
1052 * @from: the offset in which the block is.
1053 *
1054 * Get the number of times a block was erased. The number is the maximum of
1055 * erase times between first and second plane (which should be equal normally).
1056 *
1057 * Returns The number of erases, or -EINVAL or -EIO on error.
1058 */
1059static int doc_get_erase_count(struct docg3 *docg3, loff_t from)
1060{
1061 u8 buf[DOC_LAYOUT_WEAR_SIZE];
1062 int ret, plane1_erase_count, plane2_erase_count;
1063 int block0, block1, page, ofs;
1064
1065 doc_dbg("doc_get_erase_count(from=%lld, buf=%p)\n", from, buf);
1066 if (from % DOC_LAYOUT_PAGE_SIZE)
1067 return -EINVAL;
1068 calc_block_sector(from, &block0, &block1, &page, &ofs, docg3->reliable);
1069 if (block1 > docg3->max_block)
1070 return -EINVAL;
1071
1072 ret = doc_reset_seq(docg3);
1073 if (!ret)
1074 ret = doc_read_page_prepare(docg3, block0, block1, page,
1075 ofs + DOC_LAYOUT_WEAR_OFFSET, 0);
1076 if (!ret)
1077 ret = doc_read_page_getbytes(docg3, DOC_LAYOUT_WEAR_SIZE,
1078 buf, 1, 0);
1079 doc_read_page_finish(docg3);
1080
1081 if (ret || (buf[0] != DOC_ERASE_MARK) || (buf[2] != DOC_ERASE_MARK))
1082 return -EIO;
1083 plane1_erase_count = (u8)(~buf[1]) | ((u8)(~buf[4]) << 8)
1084 | ((u8)(~buf[5]) << 16);
1085 plane2_erase_count = (u8)(~buf[3]) | ((u8)(~buf[6]) << 8)
1086 | ((u8)(~buf[7]) << 16);
1087
1088 return max(plane1_erase_count, plane2_erase_count);
1089}
1090#endif
1091
1092/**
1093 * doc_get_op_status - get erase/write operation status
1094 * @docg3: the device
1095 *
1096 * Queries the status from the chip, and returns it
1097 *
1098 * Returns the status (bits DOC_PLANES_STATUS_*)
1099 */
1100static int doc_get_op_status(struct docg3 *docg3)
1101{
1102 u8 status;
1103
1104 doc_flash_sequence(docg3, DOC_SEQ_PLANES_STATUS);
1105 doc_flash_command(docg3, DOC_CMD_PLANES_STATUS);
1106 doc_delay(docg3, 5);
1107
1108 doc_ecc_disable(docg3);
1109 doc_read_data_area(docg3, &status, 1, 1);
1110 return status;
1111}
1112
1113/**
1114 * doc_write_erase_wait_status - wait for write or erase completion
1115 * @docg3: the device
1116 *
1117 * Wait for the chip to be ready again after erase or write operation, and check
1118 * erase/write status.
1119 *
1120 * Returns 0 if erase successful, -EIO if erase/write issue, -ETIMEOUT if
1121 * timeout
1122 */
1123static int doc_write_erase_wait_status(struct docg3 *docg3)
1124{
1125 int i, status, ret = 0;
1126
1127 for (i = 0; !doc_is_ready(docg3) && i < 5; i++)
1128 msleep(20);
1129 if (!doc_is_ready(docg3)) {
1130 doc_dbg("Timeout reached and the chip is still not ready\n");
1131 ret = -EAGAIN;
1132 goto out;
1133 }
1134
1135 status = doc_get_op_status(docg3);
1136 if (status & DOC_PLANES_STATUS_FAIL) {
1137 doc_dbg("Erase/Write failed on (a) plane(s), status = %x\n",
1138 status);
1139 ret = -EIO;
1140 }
1141
1142out:
1143 doc_page_finish(docg3);
1144 return ret;
1145}
1146
1147/**
1148 * doc_erase_block - Erase a couple of blocks
1149 * @docg3: the device
1150 * @block0: the first block to erase (leftmost plane)
1151 * @block1: the second block to erase (rightmost plane)
1152 *
1153 * Erase both blocks, and return operation status
1154 *
1155 * Returns 0 if erase successful, -EIO if erase issue, -ETIMEOUT if chip not
1156 * ready for too long
1157 */
1158static int doc_erase_block(struct docg3 *docg3, int block0, int block1)
1159{
1160 int ret, sector;
1161
1162 doc_dbg("doc_erase_block(blocks=(%d,%d))\n", block0, block1);
1163 ret = doc_reset_seq(docg3);
1164 if (ret)
1165 return -EIO;
1166
1167 doc_set_reliable_mode(docg3);
1168 doc_flash_sequence(docg3, DOC_SEQ_ERASE);
1169
1170 sector = block0 << DOC_ADDR_BLOCK_SHIFT;
1171 doc_flash_command(docg3, DOC_CMD_PROG_BLOCK_ADDR);
1172 doc_setup_addr_sector(docg3, sector);
1173 sector = block1 << DOC_ADDR_BLOCK_SHIFT;
1174 doc_flash_command(docg3, DOC_CMD_PROG_BLOCK_ADDR);
1175 doc_setup_addr_sector(docg3, sector);
1176 doc_delay(docg3, 1);
1177
1178 doc_flash_command(docg3, DOC_CMD_ERASECYCLE2);
1179 doc_delay(docg3, 2);
1180
1181 if (is_prot_seq_error(docg3)) {
1182 doc_err("Erase blocks %d,%d error\n", block0, block1);
1183 return -EIO;
1184 }
1185
1186 return doc_write_erase_wait_status(docg3);
1187}
1188
1189/**
1190 * doc_erase - Erase a portion of the chip
1191 * @mtd: the device
1192 * @info: the erase info
1193 *
1194 * Erase a bunch of contiguous blocks, by pairs, as a "mtd" page of 1024 is
1195 * split into 2 pages of 512 bytes on 2 contiguous blocks.
1196 *
1197 * Returns 0 if erase successful, -EINVAL if addressing error, -EIO if erase
1198 * issue
1199 */
1200static int doc_erase(struct mtd_info *mtd, struct erase_info *info)
1201{
1202 struct docg3 *docg3 = mtd->priv;
1203 uint64_t len;
1204 int block0, block1, page, ret, ofs = 0;
1205
1206 doc_dbg("doc_erase(from=%lld, len=%lld\n", info->addr, info->len);
1207
1208 info->state = MTD_ERASE_PENDING;
1209 calc_block_sector(info->addr + info->len, &block0, &block1, &page,
1210 &ofs, docg3->reliable);
1211 ret = -EINVAL;
1212 if (info->addr + info->len > mtd->size || page || ofs)
1213 goto reset_err;
1214
1215 ret = 0;
1216 calc_block_sector(info->addr, &block0, &block1, &page, &ofs,
1217 docg3->reliable);
1218 mutex_lock(&docg3->cascade->lock);
1219 doc_set_device_id(docg3, docg3->device_id);
1220 doc_set_reliable_mode(docg3);
1221 for (len = info->len; !ret && len > 0; len -= mtd->erasesize) {
1222 info->state = MTD_ERASING;
1223 ret = doc_erase_block(docg3, block0, block1);
1224 block0 += 2;
1225 block1 += 2;
1226 }
1227 mutex_unlock(&docg3->cascade->lock);
1228
1229 if (ret)
1230 goto reset_err;
1231
1232 info->state = MTD_ERASE_DONE;
1233 return 0;
1234
1235reset_err:
1236 info->state = MTD_ERASE_FAILED;
1237 return ret;
1238}
1239
1240/**
1241 * doc_write_page - Write a single page to the chip
1242 * @docg3: the device
1243 * @to: the offset from first block and first page, in bytes, aligned on page
1244 * size
1245 * @buf: buffer to get bytes from
1246 * @oob: buffer to get out of band bytes from (can be NULL if no OOB should be
1247 * written)
1248 * @autoecc: if 0, all 16 bytes from OOB are taken, regardless of HW Hamming or
1249 * BCH computations. If 1, only bytes 0-7 and byte 15 are taken,
1250 * remaining ones are filled with hardware Hamming and BCH
1251 * computations. Its value is not meaningfull is oob == NULL.
1252 *
1253 * Write one full page (ie. 1 page split on two planes), of 512 bytes, with the
1254 * OOB data. The OOB ECC is automatically computed by the hardware Hamming and
1255 * BCH generator if autoecc is not null.
1256 *
1257 * Returns 0 if write successful, -EIO if write error, -EAGAIN if timeout
1258 */
1259static int doc_write_page(struct docg3 *docg3, loff_t to, const u_char *buf,
1260 const u_char *oob, int autoecc)
1261{
1262 int block0, block1, page, ret, ofs = 0;
1263 u8 hwecc[DOC_ECC_BCH_SIZE], hamming;
1264
1265 doc_dbg("doc_write_page(to=%lld)\n", to);
1266 calc_block_sector(to, &block0, &block1, &page, &ofs, docg3->reliable);
1267
1268 doc_set_device_id(docg3, docg3->device_id);
1269 ret = doc_reset_seq(docg3);
1270 if (ret)
1271 goto err;
1272
1273 /* Program the flash address block and page */
1274 ret = doc_write_seek(docg3, block0, block1, page, ofs);
1275 if (ret)
1276 goto err;
1277
1278 doc_write_page_ecc_init(docg3, DOC_ECC_BCH_TOTAL_BYTES);
1279 doc_delay(docg3, 2);
1280 doc_write_page_putbytes(docg3, DOC_LAYOUT_PAGE_SIZE, buf);
1281
1282 if (oob && autoecc) {
1283 doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_PAGEINFO_SZ, oob);
1284 doc_delay(docg3, 2);
1285 oob += DOC_LAYOUT_OOB_UNUSED_OFS;
1286
1287 hamming = doc_register_readb(docg3, DOC_HAMMINGPARITY);
1288 doc_delay(docg3, 2);
1289 doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_HAMMING_SZ,
1290 &hamming);
1291 doc_delay(docg3, 2);
1292
1293 doc_get_bch_hw_ecc(docg3, hwecc);
1294 doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_BCH_SZ, hwecc);
1295 doc_delay(docg3, 2);
1296
1297 doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_UNUSED_SZ, oob);
1298 }
1299 if (oob && !autoecc)
1300 doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_SIZE, oob);
1301
1302 doc_delay(docg3, 2);
1303 doc_page_finish(docg3);
1304 doc_delay(docg3, 2);
1305 doc_flash_command(docg3, DOC_CMD_PROG_CYCLE2);
1306 doc_delay(docg3, 2);
1307
1308 /*
1309 * The wait status will perform another doc_page_finish() call, but that
1310 * seems to please the docg3, so leave it.
1311 */
1312 ret = doc_write_erase_wait_status(docg3);
1313 return ret;
1314err:
1315 doc_read_page_finish(docg3);
1316 return ret;
1317}
1318
1319/**
1320 * doc_guess_autoecc - Guess autoecc mode from mbd_oob_ops
1321 * @ops: the oob operations
1322 *
1323 * Returns 0 or 1 if success, -EINVAL if invalid oob mode
1324 */
1325static int doc_guess_autoecc(struct mtd_oob_ops *ops)
1326{
1327 int autoecc;
1328
1329 switch (ops->mode) {
1330 case MTD_OPS_PLACE_OOB:
1331 case MTD_OPS_AUTO_OOB:
1332 autoecc = 1;
1333 break;
1334 case MTD_OPS_RAW:
1335 autoecc = 0;
1336 break;
1337 default:
1338 autoecc = -EINVAL;
1339 }
1340 return autoecc;
1341}
1342
1343/**
1344 * doc_fill_autooob - Fill a 16 bytes OOB from 8 non-ECC bytes
1345 * @dst: the target 16 bytes OOB buffer
1346 * @oobsrc: the source 8 bytes non-ECC OOB buffer
1347 *
1348 */
1349static void doc_fill_autooob(u8 *dst, u8 *oobsrc)
1350{
1351 memcpy(dst, oobsrc, DOC_LAYOUT_OOB_PAGEINFO_SZ);
1352 dst[DOC_LAYOUT_OOB_UNUSED_OFS] = oobsrc[DOC_LAYOUT_OOB_PAGEINFO_SZ];
1353}
1354
1355/**
1356 * doc_backup_oob - Backup OOB into docg3 structure
1357 * @docg3: the device
1358 * @to: the page offset in the chip
1359 * @ops: the OOB size and buffer
1360 *
1361 * As the docg3 should write a page with its OOB in one pass, and some userland
1362 * applications do write_oob() to setup the OOB and then write(), store the OOB
1363 * into a temporary storage. This is very dangerous, as 2 concurrent
1364 * applications could store an OOB, and then write their pages (which will
1365 * result into one having its OOB corrupted).
1366 *
1367 * The only reliable way would be for userland to call doc_write_oob() with both
1368 * the page data _and_ the OOB area.
1369 *
1370 * Returns 0 if success, -EINVAL if ops content invalid
1371 */
1372static int doc_backup_oob(struct docg3 *docg3, loff_t to,
1373 struct mtd_oob_ops *ops)
1374{
1375 int ooblen = ops->ooblen, autoecc;
1376
1377 if (ooblen != DOC_LAYOUT_OOB_SIZE)
1378 return -EINVAL;
1379 autoecc = doc_guess_autoecc(ops);
1380 if (autoecc < 0)
1381 return autoecc;
1382
1383 docg3->oob_write_ofs = to;
1384 docg3->oob_autoecc = autoecc;
1385 if (ops->mode == MTD_OPS_AUTO_OOB) {
1386 doc_fill_autooob(docg3->oob_write_buf, ops->oobbuf);
1387 ops->oobretlen = 8;
1388 } else {
1389 memcpy(docg3->oob_write_buf, ops->oobbuf, DOC_LAYOUT_OOB_SIZE);
1390 ops->oobretlen = DOC_LAYOUT_OOB_SIZE;
1391 }
1392 return 0;
1393}
1394
1395/**
1396 * doc_write_oob - Write out of band bytes to flash
1397 * @mtd: the device
1398 * @ofs: the offset from first block and first page, in bytes, aligned on page
1399 * size
1400 * @ops: the mtd oob structure
1401 *
1402 * Either write OOB data into a temporary buffer, for the subsequent write
1403 * page. The provided OOB should be 16 bytes long. If a data buffer is provided
1404 * as well, issue the page write.
1405 * Or provide data without OOB, and then a all zeroed OOB will be used (ECC will
1406 * still be filled in if asked for).
1407 *
1408 * Returns 0 is successful, EINVAL if length is not 14 bytes
1409 */
1410static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
1411 struct mtd_oob_ops *ops)
1412{
1413 struct docg3 *docg3 = mtd->priv;
1414 int ret, autoecc, oobdelta;
1415 u8 *oobbuf = ops->oobbuf;
1416 u8 *buf = ops->datbuf;
1417 size_t len, ooblen;
1418 u8 oob[DOC_LAYOUT_OOB_SIZE];
1419
1420 if (buf)
1421 len = ops->len;
1422 else
1423 len = 0;
1424 if (oobbuf)
1425 ooblen = ops->ooblen;
1426 else
1427 ooblen = 0;
1428
1429 if (oobbuf && ops->mode == MTD_OPS_PLACE_OOB)
1430 oobbuf += ops->ooboffs;
1431
1432 doc_dbg("doc_write_oob(from=%lld, mode=%d, data=(%p:%zu), oob=(%p:%zu))\n",
1433 ofs, ops->mode, buf, len, oobbuf, ooblen);
1434 switch (ops->mode) {
1435 case MTD_OPS_PLACE_OOB:
1436 case MTD_OPS_RAW:
1437 oobdelta = mtd->oobsize;
1438 break;
1439 case MTD_OPS_AUTO_OOB:
1440 oobdelta = mtd->ecclayout->oobavail;
1441 break;
1442 default:
1443 return -EINVAL;
1444 }
1445 if ((len % DOC_LAYOUT_PAGE_SIZE) || (ooblen % oobdelta) ||
1446 (ofs % DOC_LAYOUT_PAGE_SIZE))
1447 return -EINVAL;
1448 if (len && ooblen &&
1449 (len / DOC_LAYOUT_PAGE_SIZE) != (ooblen / oobdelta))
1450 return -EINVAL;
1451 if (ofs + len > mtd->size)
1452 return -EINVAL;
1453
1454 ops->oobretlen = 0;
1455 ops->retlen = 0;
1456 ret = 0;
1457 if (len == 0 && ooblen == 0)
1458 return -EINVAL;
1459 if (len == 0 && ooblen > 0)
1460 return doc_backup_oob(docg3, ofs, ops);
1461
1462 autoecc = doc_guess_autoecc(ops);
1463 if (autoecc < 0)
1464 return autoecc;
1465
1466 mutex_lock(&docg3->cascade->lock);
1467 while (!ret && len > 0) {
1468 memset(oob, 0, sizeof(oob));
1469 if (ofs == docg3->oob_write_ofs)
1470 memcpy(oob, docg3->oob_write_buf, DOC_LAYOUT_OOB_SIZE);
1471 else if (ooblen > 0 && ops->mode == MTD_OPS_AUTO_OOB)
1472 doc_fill_autooob(oob, oobbuf);
1473 else if (ooblen > 0)
1474 memcpy(oob, oobbuf, DOC_LAYOUT_OOB_SIZE);
1475 ret = doc_write_page(docg3, ofs, buf, oob, autoecc);
1476
1477 ofs += DOC_LAYOUT_PAGE_SIZE;
1478 len -= DOC_LAYOUT_PAGE_SIZE;
1479 buf += DOC_LAYOUT_PAGE_SIZE;
1480 if (ooblen) {
1481 oobbuf += oobdelta;
1482 ooblen -= oobdelta;
1483 ops->oobretlen += oobdelta;
1484 }
1485 ops->retlen += DOC_LAYOUT_PAGE_SIZE;
1486 }
1487
1488 doc_set_device_id(docg3, 0);
1489 mutex_unlock(&docg3->cascade->lock);
1490 return ret;
1491}
1492
1493/**
1494 * doc_write - Write a buffer to the chip
1495 * @mtd: the device
1496 * @to: the offset from first block and first page, in bytes, aligned on page
1497 * size
1498 * @len: the number of bytes to write (must be a full page size, ie. 512)
1499 * @retlen: the number of bytes actually written (0 or 512)
1500 * @buf: the buffer to get bytes from
1501 *
1502 * Writes data to the chip.
1503 *
1504 * Returns 0 if write successful, -EIO if write error
1505 */
1506static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
1507 size_t *retlen, const u_char *buf)
1508{
1509 struct docg3 *docg3 = mtd->priv;
1510 int ret;
1511 struct mtd_oob_ops ops;
1512
1513 doc_dbg("doc_write(to=%lld, len=%zu)\n", to, len);
1514 ops.datbuf = (char *)buf;
1515 ops.len = len;
1516 ops.mode = MTD_OPS_PLACE_OOB;
1517 ops.oobbuf = NULL;
1518 ops.ooblen = 0;
1519 ops.ooboffs = 0;
1520
1521 ret = doc_write_oob(mtd, to, &ops);
1522 *retlen = ops.retlen;
1523 return ret;
1524}
1525
1526static struct docg3 *sysfs_dev2docg3(struct device *dev,
1527 struct device_attribute *attr)
1528{
1529 int floor;
1530 struct platform_device *pdev = to_platform_device(dev);
1531 struct mtd_info **docg3_floors = platform_get_drvdata(pdev);
1532
1533 floor = attr->attr.name[1] - '0';
1534 if (floor < 0 || floor >= DOC_MAX_NBFLOORS)
1535 return NULL;
1536 else
1537 return docg3_floors[floor]->priv;
1538}
1539
1540static ssize_t dps0_is_key_locked(struct device *dev,
1541 struct device_attribute *attr, char *buf)
1542{
1543 struct docg3 *docg3 = sysfs_dev2docg3(dev, attr);
1544 int dps0;
1545
1546 mutex_lock(&docg3->cascade->lock);
1547 doc_set_device_id(docg3, docg3->device_id);
1548 dps0 = doc_register_readb(docg3, DOC_DPS0_STATUS);
1549 doc_set_device_id(docg3, 0);
1550 mutex_unlock(&docg3->cascade->lock);
1551
1552 return sprintf(buf, "%d\n", !(dps0 & DOC_DPS_KEY_OK));
1553}
1554
1555static ssize_t dps1_is_key_locked(struct device *dev,
1556 struct device_attribute *attr, char *buf)
1557{
1558 struct docg3 *docg3 = sysfs_dev2docg3(dev, attr);
1559 int dps1;
1560
1561 mutex_lock(&docg3->cascade->lock);
1562 doc_set_device_id(docg3, docg3->device_id);
1563 dps1 = doc_register_readb(docg3, DOC_DPS1_STATUS);
1564 doc_set_device_id(docg3, 0);
1565 mutex_unlock(&docg3->cascade->lock);
1566
1567 return sprintf(buf, "%d\n", !(dps1 & DOC_DPS_KEY_OK));
1568}
1569
1570static ssize_t dps0_insert_key(struct device *dev,
1571 struct device_attribute *attr,
1572 const char *buf, size_t count)
1573{
1574 struct docg3 *docg3 = sysfs_dev2docg3(dev, attr);
1575 int i;
1576
1577 if (count != DOC_LAYOUT_DPS_KEY_LENGTH)
1578 return -EINVAL;
1579
1580 mutex_lock(&docg3->cascade->lock);
1581 doc_set_device_id(docg3, docg3->device_id);
1582 for (i = 0; i < DOC_LAYOUT_DPS_KEY_LENGTH; i++)
1583 doc_writeb(docg3, buf[i], DOC_DPS0_KEY);
1584 doc_set_device_id(docg3, 0);
1585 mutex_unlock(&docg3->cascade->lock);
1586 return count;
1587}
1588
1589static ssize_t dps1_insert_key(struct device *dev,
1590 struct device_attribute *attr,
1591 const char *buf, size_t count)
1592{
1593 struct docg3 *docg3 = sysfs_dev2docg3(dev, attr);
1594 int i;
1595
1596 if (count != DOC_LAYOUT_DPS_KEY_LENGTH)
1597 return -EINVAL;
1598
1599 mutex_lock(&docg3->cascade->lock);
1600 doc_set_device_id(docg3, docg3->device_id);
1601 for (i = 0; i < DOC_LAYOUT_DPS_KEY_LENGTH; i++)
1602 doc_writeb(docg3, buf[i], DOC_DPS1_KEY);
1603 doc_set_device_id(docg3, 0);
1604 mutex_unlock(&docg3->cascade->lock);
1605 return count;
1606}
1607
1608#define FLOOR_SYSFS(id) { \
1609 __ATTR(f##id##_dps0_is_keylocked, S_IRUGO, dps0_is_key_locked, NULL), \
1610 __ATTR(f##id##_dps1_is_keylocked, S_IRUGO, dps1_is_key_locked, NULL), \
1611 __ATTR(f##id##_dps0_protection_key, S_IWUGO, NULL, dps0_insert_key), \
1612 __ATTR(f##id##_dps1_protection_key, S_IWUGO, NULL, dps1_insert_key), \
1613}
1614
1615static struct device_attribute doc_sys_attrs[DOC_MAX_NBFLOORS][4] = {
1616 FLOOR_SYSFS(0), FLOOR_SYSFS(1), FLOOR_SYSFS(2), FLOOR_SYSFS(3)
1617};
1618
1619static int doc_register_sysfs(struct platform_device *pdev,
1620 struct docg3_cascade *cascade)
1621{
1622 int ret = 0, floor, i = 0;
1623 struct device *dev = &pdev->dev;
1624
1625 for (floor = 0; !ret && floor < DOC_MAX_NBFLOORS &&
1626 cascade->floors[floor]; floor++)
1627 for (i = 0; !ret && i < 4; i++)
1628 ret = device_create_file(dev, &doc_sys_attrs[floor][i]);
1629 if (!ret)
1630 return 0;
1631 do {
1632 while (--i >= 0)
1633 device_remove_file(dev, &doc_sys_attrs[floor][i]);
1634 i = 4;
1635 } while (--floor >= 0);
1636 return ret;
1637}
1638
1639static void doc_unregister_sysfs(struct platform_device *pdev,
1640 struct docg3_cascade *cascade)
1641{
1642 struct device *dev = &pdev->dev;
1643 int floor, i;
1644
1645 for (floor = 0; floor < DOC_MAX_NBFLOORS && cascade->floors[floor];
1646 floor++)
1647 for (i = 0; i < 4; i++)
1648 device_remove_file(dev, &doc_sys_attrs[floor][i]);
1649}
1650
1651/*
1652 * Debug sysfs entries
1653 */
1654static int dbg_flashctrl_show(struct seq_file *s, void *p)
1655{
1656 struct docg3 *docg3 = (struct docg3 *)s->private;
1657
1658 int pos = 0;
1659 u8 fctrl;
1660
1661 mutex_lock(&docg3->cascade->lock);
1662 fctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
1663 mutex_unlock(&docg3->cascade->lock);
1664
1665 pos += seq_printf(s,
1666 "FlashControl : 0x%02x (%s,CE# %s,%s,%s,flash %s)\n",
1667 fctrl,
1668 fctrl & DOC_CTRL_VIOLATION ? "protocol violation" : "-",
1669 fctrl & DOC_CTRL_CE ? "active" : "inactive",
1670 fctrl & DOC_CTRL_PROTECTION_ERROR ? "protection error" : "-",
1671 fctrl & DOC_CTRL_SEQUENCE_ERROR ? "sequence error" : "-",
1672 fctrl & DOC_CTRL_FLASHREADY ? "ready" : "not ready");
1673 return pos;
1674}
1675DEBUGFS_RO_ATTR(flashcontrol, dbg_flashctrl_show);
1676
1677static int dbg_asicmode_show(struct seq_file *s, void *p)
1678{
1679 struct docg3 *docg3 = (struct docg3 *)s->private;
1680
1681 int pos = 0, pctrl, mode;
1682
1683 mutex_lock(&docg3->cascade->lock);
1684 pctrl = doc_register_readb(docg3, DOC_ASICMODE);
1685 mode = pctrl & 0x03;
1686 mutex_unlock(&docg3->cascade->lock);
1687
1688 pos += seq_printf(s,
1689 "%04x : RAM_WE=%d,RSTIN_RESET=%d,BDETCT_RESET=%d,WRITE_ENABLE=%d,POWERDOWN=%d,MODE=%d%d (",
1690 pctrl,
1691 pctrl & DOC_ASICMODE_RAM_WE ? 1 : 0,
1692 pctrl & DOC_ASICMODE_RSTIN_RESET ? 1 : 0,
1693 pctrl & DOC_ASICMODE_BDETCT_RESET ? 1 : 0,
1694 pctrl & DOC_ASICMODE_MDWREN ? 1 : 0,
1695 pctrl & DOC_ASICMODE_POWERDOWN ? 1 : 0,
1696 mode >> 1, mode & 0x1);
1697
1698 switch (mode) {
1699 case DOC_ASICMODE_RESET:
1700 pos += seq_printf(s, "reset");
1701 break;
1702 case DOC_ASICMODE_NORMAL:
1703 pos += seq_printf(s, "normal");
1704 break;
1705 case DOC_ASICMODE_POWERDOWN:
1706 pos += seq_printf(s, "powerdown");
1707 break;
1708 }
1709 pos += seq_printf(s, ")\n");
1710 return pos;
1711}
1712DEBUGFS_RO_ATTR(asic_mode, dbg_asicmode_show);
1713
1714static int dbg_device_id_show(struct seq_file *s, void *p)
1715{
1716 struct docg3 *docg3 = (struct docg3 *)s->private;
1717 int pos = 0;
1718 int id;
1719
1720 mutex_lock(&docg3->cascade->lock);
1721 id = doc_register_readb(docg3, DOC_DEVICESELECT);
1722 mutex_unlock(&docg3->cascade->lock);
1723
1724 pos += seq_printf(s, "DeviceId = %d\n", id);
1725 return pos;
1726}
1727DEBUGFS_RO_ATTR(device_id, dbg_device_id_show);
1728
1729static int dbg_protection_show(struct seq_file *s, void *p)
1730{
1731 struct docg3 *docg3 = (struct docg3 *)s->private;
1732 int pos = 0;
1733 int protect, dps0, dps0_low, dps0_high, dps1, dps1_low, dps1_high;
1734
1735 mutex_lock(&docg3->cascade->lock);
1736 protect = doc_register_readb(docg3, DOC_PROTECTION);
1737 dps0 = doc_register_readb(docg3, DOC_DPS0_STATUS);
1738 dps0_low = doc_register_readw(docg3, DOC_DPS0_ADDRLOW);
1739 dps0_high = doc_register_readw(docg3, DOC_DPS0_ADDRHIGH);
1740 dps1 = doc_register_readb(docg3, DOC_DPS1_STATUS);
1741 dps1_low = doc_register_readw(docg3, DOC_DPS1_ADDRLOW);
1742 dps1_high = doc_register_readw(docg3, DOC_DPS1_ADDRHIGH);
1743 mutex_unlock(&docg3->cascade->lock);
1744
1745 pos += seq_printf(s, "Protection = 0x%02x (",
1746 protect);
1747 if (protect & DOC_PROTECT_FOUNDRY_OTP_LOCK)
1748 pos += seq_printf(s, "FOUNDRY_OTP_LOCK,");
1749 if (protect & DOC_PROTECT_CUSTOMER_OTP_LOCK)
1750 pos += seq_printf(s, "CUSTOMER_OTP_LOCK,");
1751 if (protect & DOC_PROTECT_LOCK_INPUT)
1752 pos += seq_printf(s, "LOCK_INPUT,");
1753 if (protect & DOC_PROTECT_STICKY_LOCK)
1754 pos += seq_printf(s, "STICKY_LOCK,");
1755 if (protect & DOC_PROTECT_PROTECTION_ENABLED)
1756 pos += seq_printf(s, "PROTECTION ON,");
1757 if (protect & DOC_PROTECT_IPL_DOWNLOAD_LOCK)
1758 pos += seq_printf(s, "IPL_DOWNLOAD_LOCK,");
1759 if (protect & DOC_PROTECT_PROTECTION_ERROR)
1760 pos += seq_printf(s, "PROTECT_ERR,");
1761 else
1762 pos += seq_printf(s, "NO_PROTECT_ERR");
1763 pos += seq_printf(s, ")\n");
1764
1765 pos += seq_printf(s, "DPS0 = 0x%02x : "
1766 "Protected area [0x%x - 0x%x] : OTP=%d, READ=%d, "
1767 "WRITE=%d, HW_LOCK=%d, KEY_OK=%d\n",
1768 dps0, dps0_low, dps0_high,
1769 !!(dps0 & DOC_DPS_OTP_PROTECTED),
1770 !!(dps0 & DOC_DPS_READ_PROTECTED),
1771 !!(dps0 & DOC_DPS_WRITE_PROTECTED),
1772 !!(dps0 & DOC_DPS_HW_LOCK_ENABLED),
1773 !!(dps0 & DOC_DPS_KEY_OK));
1774 pos += seq_printf(s, "DPS1 = 0x%02x : "
1775 "Protected area [0x%x - 0x%x] : OTP=%d, READ=%d, "
1776 "WRITE=%d, HW_LOCK=%d, KEY_OK=%d\n",
1777 dps1, dps1_low, dps1_high,
1778 !!(dps1 & DOC_DPS_OTP_PROTECTED),
1779 !!(dps1 & DOC_DPS_READ_PROTECTED),
1780 !!(dps1 & DOC_DPS_WRITE_PROTECTED),
1781 !!(dps1 & DOC_DPS_HW_LOCK_ENABLED),
1782 !!(dps1 & DOC_DPS_KEY_OK));
1783 return pos;
1784}
1785DEBUGFS_RO_ATTR(protection, dbg_protection_show);
1786
1787static int __init doc_dbg_register(struct docg3 *docg3)
1788{
1789 struct dentry *root, *entry;
1790
1791 root = debugfs_create_dir("docg3", NULL);
1792 if (!root)
1793 return -ENOMEM;
1794
1795 entry = debugfs_create_file("flashcontrol", S_IRUSR, root, docg3,
1796 &flashcontrol_fops);
1797 if (entry)
1798 entry = debugfs_create_file("asic_mode", S_IRUSR, root,
1799 docg3, &asic_mode_fops);
1800 if (entry)
1801 entry = debugfs_create_file("device_id", S_IRUSR, root,
1802 docg3, &device_id_fops);
1803 if (entry)
1804 entry = debugfs_create_file("protection", S_IRUSR, root,
1805 docg3, &protection_fops);
1806 if (entry) {
1807 docg3->debugfs_root = root;
1808 return 0;
1809 } else {
1810 debugfs_remove_recursive(root);
1811 return -ENOMEM;
1812 }
1813}
1814
1815static void __exit doc_dbg_unregister(struct docg3 *docg3)
1816{
1817 debugfs_remove_recursive(docg3->debugfs_root);
1818}
1819
1820/**
1821 * doc_set_driver_info - Fill the mtd_info structure and docg3 structure
1822 * @chip_id: The chip ID of the supported chip
1823 * @mtd: The structure to fill
1824 */
1825static void __init doc_set_driver_info(int chip_id, struct mtd_info *mtd)
1826{
1827 struct docg3 *docg3 = mtd->priv;
1828 int cfg;
1829
1830 cfg = doc_register_readb(docg3, DOC_CONFIGURATION);
1831 docg3->if_cfg = (cfg & DOC_CONF_IF_CFG ? 1 : 0);
1832 docg3->reliable = reliable_mode;
1833
1834 switch (chip_id) {
1835 case DOC_CHIPID_G3:
1836 mtd->name = kasprintf(GFP_KERNEL, "docg3.%d",
1837 docg3->device_id);
1838 docg3->max_block = 2047;
1839 break;
1840 }
1841 mtd->type = MTD_NANDFLASH;
1842 mtd->flags = MTD_CAP_NANDFLASH;
1843 mtd->size = (docg3->max_block + 1) * DOC_LAYOUT_BLOCK_SIZE;
1844 if (docg3->reliable == 2)
1845 mtd->size /= 2;
1846 mtd->erasesize = DOC_LAYOUT_BLOCK_SIZE * DOC_LAYOUT_NBPLANES;
1847 if (docg3->reliable == 2)
1848 mtd->erasesize /= 2;
1849 mtd->writebufsize = mtd->writesize = DOC_LAYOUT_PAGE_SIZE;
1850 mtd->oobsize = DOC_LAYOUT_OOB_SIZE;
1851 mtd->owner = THIS_MODULE;
1852 mtd->_erase = doc_erase;
1853 mtd->_read = doc_read;
1854 mtd->_write = doc_write;
1855 mtd->_read_oob = doc_read_oob;
1856 mtd->_write_oob = doc_write_oob;
1857 mtd->_block_isbad = doc_block_isbad;
1858 mtd->ecclayout = &docg3_oobinfo;
1859 mtd->ecc_strength = DOC_ECC_BCH_T;
1860}
1861
1862/**
1863 * doc_probe_device - Check if a device is available
1864 * @base: the io space where the device is probed
1865 * @floor: the floor of the probed device
1866 * @dev: the device
1867 * @cascade: the cascade of chips this devices will belong to
1868 *
1869 * Checks whether a device at the specified IO range, and floor is available.
1870 *
1871 * Returns a mtd_info struct if there is a device, ENODEV if none found, ENOMEM
1872 * if a memory allocation failed. If floor 0 is checked, a reset of the ASIC is
1873 * launched.
1874 */
1875static struct mtd_info * __init
1876doc_probe_device(struct docg3_cascade *cascade, int floor, struct device *dev)
1877{
1878 int ret, bbt_nbpages;
1879 u16 chip_id, chip_id_inv;
1880 struct docg3 *docg3;
1881 struct mtd_info *mtd;
1882
1883 ret = -ENOMEM;
1884 docg3 = kzalloc(sizeof(struct docg3), GFP_KERNEL);
1885 if (!docg3)
1886 goto nomem1;
1887 mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
1888 if (!mtd)
1889 goto nomem2;
1890 mtd->priv = docg3;
1891 bbt_nbpages = DIV_ROUND_UP(docg3->max_block + 1,
1892 8 * DOC_LAYOUT_PAGE_SIZE);
1893 docg3->bbt = kzalloc(bbt_nbpages * DOC_LAYOUT_PAGE_SIZE, GFP_KERNEL);
1894 if (!docg3->bbt)
1895 goto nomem3;
1896
1897 docg3->dev = dev;
1898 docg3->device_id = floor;
1899 docg3->cascade = cascade;
1900 doc_set_device_id(docg3, docg3->device_id);
1901 if (!floor)
1902 doc_set_asic_mode(docg3, DOC_ASICMODE_RESET);
1903 doc_set_asic_mode(docg3, DOC_ASICMODE_NORMAL);
1904
1905 chip_id = doc_register_readw(docg3, DOC_CHIPID);
1906 chip_id_inv = doc_register_readw(docg3, DOC_CHIPID_INV);
1907
1908 ret = 0;
1909 if (chip_id != (u16)(~chip_id_inv)) {
1910 goto nomem3;
1911 }
1912
1913 switch (chip_id) {
1914 case DOC_CHIPID_G3:
1915 doc_info("Found a G3 DiskOnChip at addr %p, floor %d\n",
1916 docg3->cascade->base, floor);
1917 break;
1918 default:
1919 doc_err("Chip id %04x is not a DiskOnChip G3 chip\n", chip_id);
1920 goto nomem3;
1921 }
1922
1923 doc_set_driver_info(chip_id, mtd);
1924
1925 doc_hamming_ecc_init(docg3, DOC_LAYOUT_OOB_PAGEINFO_SZ);
1926 doc_reload_bbt(docg3);
1927 return mtd;
1928
1929nomem3:
1930 kfree(mtd);
1931nomem2:
1932 kfree(docg3);
1933nomem1:
1934 return ERR_PTR(ret);
1935}
1936
1937/**
1938 * doc_release_device - Release a docg3 floor
1939 * @mtd: the device
1940 */
1941static void doc_release_device(struct mtd_info *mtd)
1942{
1943 struct docg3 *docg3 = mtd->priv;
1944
1945 mtd_device_unregister(mtd);
1946 kfree(docg3->bbt);
1947 kfree(docg3);
1948 kfree(mtd->name);
1949 kfree(mtd);
1950}
1951
1952/**
1953 * docg3_resume - Awakens docg3 floor
1954 * @pdev: platfrom device
1955 *
1956 * Returns 0 (always successful)
1957 */
1958static int docg3_resume(struct platform_device *pdev)
1959{
1960 int i;
1961 struct docg3_cascade *cascade;
1962 struct mtd_info **docg3_floors, *mtd;
1963 struct docg3 *docg3;
1964
1965 cascade = platform_get_drvdata(pdev);
1966 docg3_floors = cascade->floors;
1967 mtd = docg3_floors[0];
1968 docg3 = mtd->priv;
1969
1970 doc_dbg("docg3_resume()\n");
1971 for (i = 0; i < 12; i++)
1972 doc_readb(docg3, DOC_IOSPACE_IPL);
1973 return 0;
1974}
1975
1976/**
1977 * docg3_suspend - Put in low power mode the docg3 floor
1978 * @pdev: platform device
1979 * @state: power state
1980 *
1981 * Shuts off most of docg3 circuitery to lower power consumption.
1982 *
1983 * Returns 0 if suspend succeeded, -EIO if chip refused suspend
1984 */
1985static int docg3_suspend(struct platform_device *pdev, pm_message_t state)
1986{
1987 int floor, i;
1988 struct docg3_cascade *cascade;
1989 struct mtd_info **docg3_floors, *mtd;
1990 struct docg3 *docg3;
1991 u8 ctrl, pwr_down;
1992
1993 cascade = platform_get_drvdata(pdev);
1994 docg3_floors = cascade->floors;
1995 for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++) {
1996 mtd = docg3_floors[floor];
1997 if (!mtd)
1998 continue;
1999 docg3 = mtd->priv;
2000
2001 doc_writeb(docg3, floor, DOC_DEVICESELECT);
2002 ctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
2003 ctrl &= ~DOC_CTRL_VIOLATION & ~DOC_CTRL_CE;
2004 doc_writeb(docg3, ctrl, DOC_FLASHCONTROL);
2005
2006 for (i = 0; i < 10; i++) {
2007 usleep_range(3000, 4000);
2008 pwr_down = doc_register_readb(docg3, DOC_POWERMODE);
2009 if (pwr_down & DOC_POWERDOWN_READY)
2010 break;
2011 }
2012 if (pwr_down & DOC_POWERDOWN_READY) {
2013 doc_dbg("docg3_suspend(): floor %d powerdown ok\n",
2014 floor);
2015 } else {
2016 doc_err("docg3_suspend(): floor %d powerdown failed\n",
2017 floor);
2018 return -EIO;
2019 }
2020 }
2021
2022 mtd = docg3_floors[0];
2023 docg3 = mtd->priv;
2024 doc_set_asic_mode(docg3, DOC_ASICMODE_POWERDOWN);
2025 return 0;
2026}
2027
2028/**
2029 * doc_probe - Probe the IO space for a DiskOnChip G3 chip
2030 * @pdev: platform device
2031 *
2032 * Probes for a G3 chip at the specified IO space in the platform data
2033 * ressources. The floor 0 must be available.
2034 *
2035 * Returns 0 on success, -ENOMEM, -ENXIO on error
2036 */
2037static int __init docg3_probe(struct platform_device *pdev)
2038{
2039 struct device *dev = &pdev->dev;
2040 struct mtd_info *mtd;
2041 struct resource *ress;
2042 void __iomem *base;
2043 int ret, floor, found = 0;
2044 struct docg3_cascade *cascade;
2045
2046 ret = -ENXIO;
2047 ress = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2048 if (!ress) {
2049 dev_err(dev, "No I/O memory resource defined\n");
2050 goto noress;
2051 }
2052 base = ioremap(ress->start, DOC_IOSPACE_SIZE);
2053
2054 ret = -ENOMEM;
2055 cascade = kzalloc(sizeof(*cascade) * DOC_MAX_NBFLOORS,
2056 GFP_KERNEL);
2057 if (!cascade)
2058 goto nomem1;
2059 cascade->base = base;
2060 mutex_init(&cascade->lock);
2061 cascade->bch = init_bch(DOC_ECC_BCH_M, DOC_ECC_BCH_T,
2062 DOC_ECC_BCH_PRIMPOLY);
2063 if (!cascade->bch)
2064 goto nomem2;
2065
2066 for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++) {
2067 mtd = doc_probe_device(cascade, floor, dev);
2068 if (IS_ERR(mtd)) {
2069 ret = PTR_ERR(mtd);
2070 goto err_probe;
2071 }
2072 if (!mtd) {
2073 if (floor == 0)
2074 goto notfound;
2075 else
2076 continue;
2077 }
2078 cascade->floors[floor] = mtd;
2079 ret = mtd_device_parse_register(mtd, part_probes, NULL, NULL,
2080 0);
2081 if (ret)
2082 goto err_probe;
2083 found++;
2084 }
2085
2086 ret = doc_register_sysfs(pdev, cascade);
2087 if (ret)
2088 goto err_probe;
2089 if (!found)
2090 goto notfound;
2091
2092 platform_set_drvdata(pdev, cascade);
2093 doc_dbg_register(cascade->floors[0]->priv);
2094 return 0;
2095
2096notfound:
2097 ret = -ENODEV;
2098 dev_info(dev, "No supported DiskOnChip found\n");
2099err_probe:
2100 kfree(cascade->bch);
2101 for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++)
2102 if (cascade->floors[floor])
2103 doc_release_device(cascade->floors[floor]);
2104nomem2:
2105 kfree(cascade);
2106nomem1:
2107 iounmap(base);
2108noress:
2109 return ret;
2110}
2111
2112/**
2113 * docg3_release - Release the driver
2114 * @pdev: the platform device
2115 *
2116 * Returns 0
2117 */
2118static int __exit docg3_release(struct platform_device *pdev)
2119{
2120 struct docg3_cascade *cascade = platform_get_drvdata(pdev);
2121 struct docg3 *docg3 = cascade->floors[0]->priv;
2122 void __iomem *base = cascade->base;
2123 int floor;
2124
2125 doc_unregister_sysfs(pdev, cascade);
2126 doc_dbg_unregister(docg3);
2127 for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++)
2128 if (cascade->floors[floor])
2129 doc_release_device(cascade->floors[floor]);
2130
2131 free_bch(docg3->cascade->bch);
2132 kfree(cascade);
2133 iounmap(base);
2134 return 0;
2135}
2136
2137static struct platform_driver g3_driver = {
2138 .driver = {
2139 .name = "docg3",
2140 .owner = THIS_MODULE,
2141 },
2142 .suspend = docg3_suspend,
2143 .resume = docg3_resume,
2144 .remove = __exit_p(docg3_release),
2145};
2146
2147static int __init docg3_init(void)
2148{
2149 return platform_driver_probe(&g3_driver, docg3_probe);
2150}
2151module_init(docg3_init);
2152
2153
2154static void __exit docg3_exit(void)
2155{
2156 platform_driver_unregister(&g3_driver);
2157}
2158module_exit(docg3_exit);
2159
2160MODULE_LICENSE("GPL");
2161MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
2162MODULE_DESCRIPTION("MTD driver for DiskOnChip G3");
diff --git a/drivers/mtd/devices/docg3.h b/drivers/mtd/devices/docg3.h
deleted file mode 100644
index 19fb93f96a3..00000000000
--- a/drivers/mtd/devices/docg3.h
+++ /dev/null
@@ -1,370 +0,0 @@
1/*
2 * Handles the M-Systems DiskOnChip G3 chip
3 *
4 * Copyright (C) 2011 Robert Jarzmik
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#ifndef _MTD_DOCG3_H
23#define _MTD_DOCG3_H
24
25#include <linux/mtd/mtd.h>
26
27/*
28 * Flash memory areas :
29 * - 0x0000 .. 0x07ff : IPL
30 * - 0x0800 .. 0x0fff : Data area
31 * - 0x1000 .. 0x17ff : Registers
32 * - 0x1800 .. 0x1fff : Unknown
33 */
34#define DOC_IOSPACE_IPL 0x0000
35#define DOC_IOSPACE_DATA 0x0800
36#define DOC_IOSPACE_SIZE 0x2000
37
38/*
39 * DOC G3 layout and adressing scheme
40 * A page address for the block "b", plane "P" and page "p":
41 * address = [bbbb bPpp pppp]
42 */
43
44#define DOC_ADDR_PAGE_MASK 0x3f
45#define DOC_ADDR_BLOCK_SHIFT 6
46#define DOC_LAYOUT_NBPLANES 2
47#define DOC_LAYOUT_PAGES_PER_BLOCK 64
48#define DOC_LAYOUT_PAGE_SIZE 512
49#define DOC_LAYOUT_OOB_SIZE 16
50#define DOC_LAYOUT_WEAR_SIZE 8
51#define DOC_LAYOUT_PAGE_OOB_SIZE \
52 (DOC_LAYOUT_PAGE_SIZE + DOC_LAYOUT_OOB_SIZE)
53#define DOC_LAYOUT_WEAR_OFFSET (DOC_LAYOUT_PAGE_OOB_SIZE * 2)
54#define DOC_LAYOUT_BLOCK_SIZE \
55 (DOC_LAYOUT_PAGES_PER_BLOCK * DOC_LAYOUT_PAGE_SIZE)
56
57/*
58 * ECC related constants
59 */
60#define DOC_ECC_BCH_M 14
61#define DOC_ECC_BCH_T 4
62#define DOC_ECC_BCH_PRIMPOLY 0x4443
63#define DOC_ECC_BCH_SIZE 7
64#define DOC_ECC_BCH_COVERED_BYTES \
65 (DOC_LAYOUT_PAGE_SIZE + DOC_LAYOUT_OOB_PAGEINFO_SZ + \
66 DOC_LAYOUT_OOB_HAMMING_SZ)
67#define DOC_ECC_BCH_TOTAL_BYTES \
68 (DOC_ECC_BCH_COVERED_BYTES + DOC_LAYOUT_OOB_BCH_SZ)
69
70/*
71 * Blocks distribution
72 */
73#define DOC_LAYOUT_BLOCK_BBT 0
74#define DOC_LAYOUT_BLOCK_OTP 0
75#define DOC_LAYOUT_BLOCK_FIRST_DATA 6
76
77#define DOC_LAYOUT_PAGE_BBT 4
78
79/*
80 * Extra page OOB (16 bytes wide) layout
81 */
82#define DOC_LAYOUT_OOB_PAGEINFO_OFS 0
83#define DOC_LAYOUT_OOB_HAMMING_OFS 7
84#define DOC_LAYOUT_OOB_BCH_OFS 8
85#define DOC_LAYOUT_OOB_UNUSED_OFS 15
86#define DOC_LAYOUT_OOB_PAGEINFO_SZ 7
87#define DOC_LAYOUT_OOB_HAMMING_SZ 1
88#define DOC_LAYOUT_OOB_BCH_SZ 7
89#define DOC_LAYOUT_OOB_UNUSED_SZ 1
90
91
92#define DOC_CHIPID_G3 0x200
93#define DOC_ERASE_MARK 0xaa
94#define DOC_MAX_NBFLOORS 4
95/*
96 * Flash registers
97 */
98#define DOC_CHIPID 0x1000
99#define DOC_TEST 0x1004
100#define DOC_BUSLOCK 0x1006
101#define DOC_ENDIANCONTROL 0x1008
102#define DOC_DEVICESELECT 0x100a
103#define DOC_ASICMODE 0x100c
104#define DOC_CONFIGURATION 0x100e
105#define DOC_INTERRUPTCONTROL 0x1010
106#define DOC_READADDRESS 0x101a
107#define DOC_DATAEND 0x101e
108#define DOC_INTERRUPTSTATUS 0x1020
109
110#define DOC_FLASHSEQUENCE 0x1032
111#define DOC_FLASHCOMMAND 0x1034
112#define DOC_FLASHADDRESS 0x1036
113#define DOC_FLASHCONTROL 0x1038
114#define DOC_NOP 0x103e
115
116#define DOC_ECCCONF0 0x1040
117#define DOC_ECCCONF1 0x1042
118#define DOC_ECCPRESET 0x1044
119#define DOC_HAMMINGPARITY 0x1046
120#define DOC_BCH_HW_ECC(idx) (0x1048 + idx)
121
122#define DOC_PROTECTION 0x1056
123#define DOC_DPS0_KEY 0x105c
124#define DOC_DPS1_KEY 0x105e
125#define DOC_DPS0_ADDRLOW 0x1060
126#define DOC_DPS0_ADDRHIGH 0x1062
127#define DOC_DPS1_ADDRLOW 0x1064
128#define DOC_DPS1_ADDRHIGH 0x1066
129#define DOC_DPS0_STATUS 0x106c
130#define DOC_DPS1_STATUS 0x106e
131
132#define DOC_ASICMODECONFIRM 0x1072
133#define DOC_CHIPID_INV 0x1074
134#define DOC_POWERMODE 0x107c
135
136/*
137 * Flash sequences
138 * A sequence is preset before one or more commands are input to the chip.
139 */
140#define DOC_SEQ_RESET 0x00
141#define DOC_SEQ_PAGE_SIZE_532 0x03
142#define DOC_SEQ_SET_FASTMODE 0x05
143#define DOC_SEQ_SET_RELIABLEMODE 0x09
144#define DOC_SEQ_READ 0x12
145#define DOC_SEQ_SET_PLANE1 0x0e
146#define DOC_SEQ_SET_PLANE2 0x10
147#define DOC_SEQ_PAGE_SETUP 0x1d
148#define DOC_SEQ_ERASE 0x27
149#define DOC_SEQ_PLANES_STATUS 0x31
150
151/*
152 * Flash commands
153 */
154#define DOC_CMD_READ_PLANE1 0x00
155#define DOC_CMD_SET_ADDR_READ 0x05
156#define DOC_CMD_READ_ALL_PLANES 0x30
157#define DOC_CMD_READ_PLANE2 0x50
158#define DOC_CMD_READ_FLASH 0xe0
159#define DOC_CMD_PAGE_SIZE_532 0x3c
160
161#define DOC_CMD_PROG_BLOCK_ADDR 0x60
162#define DOC_CMD_PROG_CYCLE1 0x80
163#define DOC_CMD_PROG_CYCLE2 0x10
164#define DOC_CMD_PROG_CYCLE3 0x11
165#define DOC_CMD_ERASECYCLE2 0xd0
166#define DOC_CMD_READ_STATUS 0x70
167#define DOC_CMD_PLANES_STATUS 0x71
168
169#define DOC_CMD_RELIABLE_MODE 0x22
170#define DOC_CMD_FAST_MODE 0xa2
171
172#define DOC_CMD_RESET 0xff
173
174/*
175 * Flash register : DOC_FLASHCONTROL
176 */
177#define DOC_CTRL_VIOLATION 0x20
178#define DOC_CTRL_CE 0x10
179#define DOC_CTRL_UNKNOWN_BITS 0x08
180#define DOC_CTRL_PROTECTION_ERROR 0x04
181#define DOC_CTRL_SEQUENCE_ERROR 0x02
182#define DOC_CTRL_FLASHREADY 0x01
183
184/*
185 * Flash register : DOC_ASICMODE
186 */
187#define DOC_ASICMODE_RESET 0x00
188#define DOC_ASICMODE_NORMAL 0x01
189#define DOC_ASICMODE_POWERDOWN 0x02
190#define DOC_ASICMODE_MDWREN 0x04
191#define DOC_ASICMODE_BDETCT_RESET 0x08
192#define DOC_ASICMODE_RSTIN_RESET 0x10
193#define DOC_ASICMODE_RAM_WE 0x20
194
195/*
196 * Flash register : DOC_ECCCONF0
197 */
198#define DOC_ECCCONF0_WRITE_MODE 0x0000
199#define DOC_ECCCONF0_READ_MODE 0x8000
200#define DOC_ECCCONF0_AUTO_ECC_ENABLE 0x4000
201#define DOC_ECCCONF0_HAMMING_ENABLE 0x1000
202#define DOC_ECCCONF0_BCH_ENABLE 0x0800
203#define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff
204
205/*
206 * Flash register : DOC_ECCCONF1
207 */
208#define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80
209#define DOC_ECCCONF1_UNKOWN1 0x40
210#define DOC_ECCCONF1_PAGE_IS_WRITTEN 0x20
211#define DOC_ECCCONF1_UNKOWN3 0x10
212#define DOC_ECCCONF1_HAMMING_BITS_MASK 0x0f
213
214/*
215 * Flash register : DOC_PROTECTION
216 */
217#define DOC_PROTECT_FOUNDRY_OTP_LOCK 0x01
218#define DOC_PROTECT_CUSTOMER_OTP_LOCK 0x02
219#define DOC_PROTECT_LOCK_INPUT 0x04
220#define DOC_PROTECT_STICKY_LOCK 0x08
221#define DOC_PROTECT_PROTECTION_ENABLED 0x10
222#define DOC_PROTECT_IPL_DOWNLOAD_LOCK 0x20
223#define DOC_PROTECT_PROTECTION_ERROR 0x80
224
225/*
226 * Flash register : DOC_DPS0_STATUS and DOC_DPS1_STATUS
227 */
228#define DOC_DPS_OTP_PROTECTED 0x01
229#define DOC_DPS_READ_PROTECTED 0x02
230#define DOC_DPS_WRITE_PROTECTED 0x04
231#define DOC_DPS_HW_LOCK_ENABLED 0x08
232#define DOC_DPS_KEY_OK 0x80
233
234/*
235 * Flash register : DOC_CONFIGURATION
236 */
237#define DOC_CONF_IF_CFG 0x80
238#define DOC_CONF_MAX_ID_MASK 0x30
239#define DOC_CONF_VCCQ_3V 0x01
240
241/*
242 * Flash register : DOC_READADDRESS
243 */
244#define DOC_READADDR_INC 0x8000
245#define DOC_READADDR_ONE_BYTE 0x4000
246#define DOC_READADDR_ADDR_MASK 0x1fff
247
248/*
249 * Flash register : DOC_POWERMODE
250 */
251#define DOC_POWERDOWN_READY 0x80
252
253/*
254 * Status of erase and write operation
255 */
256#define DOC_PLANES_STATUS_FAIL 0x01
257#define DOC_PLANES_STATUS_PLANE0_KO 0x02
258#define DOC_PLANES_STATUS_PLANE1_KO 0x04
259
260/*
261 * DPS key management
262 *
263 * Each floor of docg3 has 2 protection areas: DPS0 and DPS1. These areas span
264 * across block boundaries, and define whether these blocks can be read or
265 * written.
266 * The definition is dynamically stored in page 0 of blocks (2,3) for DPS0, and
267 * page 0 of blocks (4,5) for DPS1.
268 */
269#define DOC_LAYOUT_DPS_KEY_LENGTH 8
270
271/**
272 * struct docg3_cascade - Cascade of 1 to 4 docg3 chips
273 * @floors: floors (ie. one physical docg3 chip is one floor)
274 * @base: IO space to access all chips in the cascade
275 * @bch: the BCH correcting control structure
276 * @lock: lock to protect docg3 IO space from concurrent accesses
277 */
278struct docg3_cascade {
279 struct mtd_info *floors[DOC_MAX_NBFLOORS];
280 void __iomem *base;
281 struct bch_control *bch;
282 struct mutex lock;
283};
284
285/**
286 * struct docg3 - DiskOnChip driver private data
287 * @dev: the device currently under control
288 * @cascade: the cascade this device belongs to
289 * @device_id: number of the cascaded DoCG3 device (0, 1, 2 or 3)
290 * @if_cfg: if true, reads are on 16bits, else reads are on 8bits
291
292 * @reliable: if 0, docg3 in normal mode, if 1 docg3 in fast mode, if 2 in
293 * reliable mode
294 * Fast mode implies more errors than normal mode.
295 * Reliable mode implies that page 2*n and 2*n+1 are clones.
296 * @bbt: bad block table cache
297 * @oob_write_ofs: offset of the MTD where this OOB should belong (ie. in next
298 * page_write)
299 * @oob_autoecc: if 1, use only bytes 0-7, 15, and fill the others with HW ECC
300 * if 0, use all the 16 bytes.
301 * @oob_write_buf: prepared OOB for next page_write
302 * @debugfs_root: debugfs root node
303 */
304struct docg3 {
305 struct device *dev;
306 struct docg3_cascade *cascade;
307 unsigned int device_id:4;
308 unsigned int if_cfg:1;
309 unsigned int reliable:2;
310 int max_block;
311 u8 *bbt;
312 loff_t oob_write_ofs;
313 int oob_autoecc;
314 u8 oob_write_buf[DOC_LAYOUT_OOB_SIZE];
315 struct dentry *debugfs_root;
316};
317
318#define doc_err(fmt, arg...) dev_err(docg3->dev, (fmt), ## arg)
319#define doc_info(fmt, arg...) dev_info(docg3->dev, (fmt), ## arg)
320#define doc_dbg(fmt, arg...) dev_dbg(docg3->dev, (fmt), ## arg)
321#define doc_vdbg(fmt, arg...) dev_vdbg(docg3->dev, (fmt), ## arg)
322
323#define DEBUGFS_RO_ATTR(name, show_fct) \
324 static int name##_open(struct inode *inode, struct file *file) \
325 { return single_open(file, show_fct, inode->i_private); } \
326 static const struct file_operations name##_fops = { \
327 .owner = THIS_MODULE, \
328 .open = name##_open, \
329 .llseek = seq_lseek, \
330 .read = seq_read, \
331 .release = single_release \
332 };
333#endif
334
335/*
336 * Trace events part
337 */
338#undef TRACE_SYSTEM
339#define TRACE_SYSTEM docg3
340
341#if !defined(_MTD_DOCG3_TRACE) || defined(TRACE_HEADER_MULTI_READ)
342#define _MTD_DOCG3_TRACE
343
344#include <linux/tracepoint.h>
345
346TRACE_EVENT(docg3_io,
347 TP_PROTO(int op, int width, u16 reg, int val),
348 TP_ARGS(op, width, reg, val),
349 TP_STRUCT__entry(
350 __field(int, op)
351 __field(unsigned char, width)
352 __field(u16, reg)
353 __field(int, val)),
354 TP_fast_assign(
355 __entry->op = op;
356 __entry->width = width;
357 __entry->reg = reg;
358 __entry->val = val;),
359 TP_printk("docg3: %s%02d reg=%04x, val=%04x",
360 __entry->op ? "write" : "read", __entry->width,
361 __entry->reg, __entry->val)
362 );
363#endif
364
365/* This part must be outside protection */
366#undef TRACE_INCLUDE_PATH
367#undef TRACE_INCLUDE_FILE
368#define TRACE_INCLUDE_PATH .
369#define TRACE_INCLUDE_FILE docg3
370#include <trace/define_trace.h>
diff --git a/drivers/mtd/devices/docprobe.c b/drivers/mtd/devices/docprobe.c
index 88b3fd3e18a..d374603493a 100644
--- a/drivers/mtd/devices/docprobe.c
+++ b/drivers/mtd/devices/docprobe.c
@@ -50,6 +50,11 @@
50#include <linux/mtd/nand.h> 50#include <linux/mtd/nand.h>
51#include <linux/mtd/doc2000.h> 51#include <linux/mtd/doc2000.h>
52 52
53/* Where to look for the devices? */
54#ifndef CONFIG_MTD_DOCPROBE_ADDRESS
55#define CONFIG_MTD_DOCPROBE_ADDRESS 0
56#endif
57
53 58
54static unsigned long doc_config_location = CONFIG_MTD_DOCPROBE_ADDRESS; 59static unsigned long doc_config_location = CONFIG_MTD_DOCPROBE_ADDRESS;
55module_param(doc_config_location, ulong, 0); 60module_param(doc_config_location, ulong, 0);
@@ -70,6 +75,8 @@ static unsigned long __initdata doc_locations[] = {
70 0xe0000, 0xe2000, 0xe4000, 0xe6000, 75 0xe0000, 0xe2000, 0xe4000, 0xe6000,
71 0xe8000, 0xea000, 0xec000, 0xee000, 76 0xe8000, 0xea000, 0xec000, 0xee000,
72#endif /* CONFIG_MTD_DOCPROBE_HIGH */ 77#endif /* CONFIG_MTD_DOCPROBE_HIGH */
78#else
79#warning Unknown architecture for DiskOnChip. No default probe locations defined
73#endif 80#endif
74 0xffffffff }; 81 0xffffffff };
75 82
@@ -239,7 +246,8 @@ static void __init DoC_Probe(unsigned long physadr)
239 return; 246 return;
240 } 247 }
241 docfound = 1; 248 docfound = 1;
242 mtd = kzalloc(sizeof(struct DiskOnChip) + sizeof(struct mtd_info), GFP_KERNEL); 249 mtd = kmalloc(sizeof(struct DiskOnChip) + sizeof(struct mtd_info), GFP_KERNEL);
250
243 if (!mtd) { 251 if (!mtd) {
244 printk(KERN_WARNING "Cannot allocate memory for data structures. Dropping.\n"); 252 printk(KERN_WARNING "Cannot allocate memory for data structures. Dropping.\n");
245 iounmap(docptr); 253 iounmap(docptr);
@@ -247,6 +255,10 @@ static void __init DoC_Probe(unsigned long physadr)
247 } 255 }
248 256
249 this = (struct DiskOnChip *)(&mtd[1]); 257 this = (struct DiskOnChip *)(&mtd[1]);
258
259 memset((char *)mtd,0, sizeof(struct mtd_info));
260 memset((char *)this, 0, sizeof(struct DiskOnChip));
261
250 mtd->priv = this; 262 mtd->priv = this;
251 this->virtadr = docptr; 263 this->virtadr = docptr;
252 this->physadr = physadr; 264 this->physadr = physadr;
diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c
index 82bd00af5cc..772a0ff89e0 100644
--- a/drivers/mtd/devices/lart.c
+++ b/drivers/mtd/devices/lart.c
@@ -34,6 +34,9 @@
34/* debugging */ 34/* debugging */
35//#define LART_DEBUG 35//#define LART_DEBUG
36 36
37/* partition support */
38#define HAVE_PARTITIONS
39
37#include <linux/kernel.h> 40#include <linux/kernel.h>
38#include <linux/module.h> 41#include <linux/module.h>
39#include <linux/types.h> 42#include <linux/types.h>
@@ -41,7 +44,9 @@
41#include <linux/errno.h> 44#include <linux/errno.h>
42#include <linux/string.h> 45#include <linux/string.h>
43#include <linux/mtd/mtd.h> 46#include <linux/mtd/mtd.h>
47#ifdef HAVE_PARTITIONS
44#include <linux/mtd/partitions.h> 48#include <linux/mtd/partitions.h>
49#endif
45 50
46#ifndef CONFIG_SA1100_LART 51#ifndef CONFIG_SA1100_LART
47#error This is for LART architecture only 52#error This is for LART architecture only
@@ -367,6 +372,9 @@ static int flash_erase (struct mtd_info *mtd,struct erase_info *instr)
367 printk (KERN_DEBUG "%s(addr = 0x%.8x, len = %d)\n", __func__, instr->addr, instr->len); 372 printk (KERN_DEBUG "%s(addr = 0x%.8x, len = %d)\n", __func__, instr->addr, instr->len);
368#endif 373#endif
369 374
375 /* sanity checks */
376 if (instr->addr + instr->len > mtd->size) return (-EINVAL);
377
370 /* 378 /*
371 * check that both start and end of the requested erase are 379 * check that both start and end of the requested erase are
372 * aligned with the erasesize at the appropriate addresses. 380 * aligned with the erasesize at the appropriate addresses.
@@ -437,6 +445,10 @@ static int flash_read (struct mtd_info *mtd,loff_t from,size_t len,size_t *retle
437 printk (KERN_DEBUG "%s(from = 0x%.8x, len = %d)\n", __func__, (__u32)from, len); 445 printk (KERN_DEBUG "%s(from = 0x%.8x, len = %d)\n", __func__, (__u32)from, len);
438#endif 446#endif
439 447
448 /* sanity checks */
449 if (!len) return (0);
450 if (from + len > mtd->size) return (-EINVAL);
451
440 /* we always read len bytes */ 452 /* we always read len bytes */
441 *retlen = len; 453 *retlen = len;
442 454
@@ -515,8 +527,11 @@ static int flash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen
515 printk (KERN_DEBUG "%s(to = 0x%.8x, len = %d)\n", __func__, (__u32)to, len); 527 printk (KERN_DEBUG "%s(to = 0x%.8x, len = %d)\n", __func__, (__u32)to, len);
516#endif 528#endif
517 529
530 *retlen = 0;
531
518 /* sanity checks */ 532 /* sanity checks */
519 if (!len) return (0); 533 if (!len) return (0);
534 if (to + len > mtd->size) return (-EINVAL);
520 535
521 /* first, we write a 0xFF.... padded byte until we reach a dword boundary */ 536 /* first, we write a 0xFF.... padded byte until we reach a dword boundary */
522 if (to & (BUSWIDTH - 1)) 537 if (to & (BUSWIDTH - 1))
@@ -583,6 +598,7 @@ static struct mtd_erase_region_info erase_regions[] = {
583 } 598 }
584}; 599};
585 600
601#ifdef HAVE_PARTITIONS
586static struct mtd_partition lart_partitions[] = { 602static struct mtd_partition lart_partitions[] = {
587 /* blob */ 603 /* blob */
588 { 604 {
@@ -603,7 +619,7 @@ static struct mtd_partition lart_partitions[] = {
603 .size = INITRD_LEN, /* MTDPART_SIZ_FULL */ 619 .size = INITRD_LEN, /* MTDPART_SIZ_FULL */
604 } 620 }
605}; 621};
606#define NUM_PARTITIONS ARRAY_SIZE(lart_partitions) 622#endif
607 623
608static int __init lart_flash_init (void) 624static int __init lart_flash_init (void)
609{ 625{
@@ -620,15 +636,14 @@ static int __init lart_flash_init (void)
620 mtd.name = module_name; 636 mtd.name = module_name;
621 mtd.type = MTD_NORFLASH; 637 mtd.type = MTD_NORFLASH;
622 mtd.writesize = 1; 638 mtd.writesize = 1;
623 mtd.writebufsize = 4;
624 mtd.flags = MTD_CAP_NORFLASH; 639 mtd.flags = MTD_CAP_NORFLASH;
625 mtd.size = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM + FLASH_BLOCKSIZE_MAIN * FLASH_NUMBLOCKS_16m_MAIN; 640 mtd.size = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM + FLASH_BLOCKSIZE_MAIN * FLASH_NUMBLOCKS_16m_MAIN;
626 mtd.erasesize = FLASH_BLOCKSIZE_MAIN; 641 mtd.erasesize = FLASH_BLOCKSIZE_MAIN;
627 mtd.numeraseregions = ARRAY_SIZE(erase_regions); 642 mtd.numeraseregions = ARRAY_SIZE(erase_regions);
628 mtd.eraseregions = erase_regions; 643 mtd.eraseregions = erase_regions;
629 mtd._erase = flash_erase; 644 mtd.erase = flash_erase;
630 mtd._read = flash_read; 645 mtd.read = flash_read;
631 mtd._write = flash_write; 646 mtd.write = flash_write;
632 mtd.owner = THIS_MODULE; 647 mtd.owner = THIS_MODULE;
633 648
634#ifdef LART_DEBUG 649#ifdef LART_DEBUG
@@ -653,6 +668,7 @@ static int __init lart_flash_init (void)
653 result,mtd.eraseregions[result].erasesize,mtd.eraseregions[result].erasesize / 1024, 668 result,mtd.eraseregions[result].erasesize,mtd.eraseregions[result].erasesize / 1024,
654 result,mtd.eraseregions[result].numblocks); 669 result,mtd.eraseregions[result].numblocks);
655 670
671#ifdef HAVE_PARTITIONS
656 printk ("\npartitions = %d\n", ARRAY_SIZE(lart_partitions)); 672 printk ("\npartitions = %d\n", ARRAY_SIZE(lart_partitions));
657 673
658 for (result = 0; result < ARRAY_SIZE(lart_partitions); result++) 674 for (result = 0; result < ARRAY_SIZE(lart_partitions); result++)
@@ -665,16 +681,25 @@ static int __init lart_flash_init (void)
665 result,lart_partitions[result].offset, 681 result,lart_partitions[result].offset,
666 result,lart_partitions[result].size,lart_partitions[result].size / 1024); 682 result,lart_partitions[result].size,lart_partitions[result].size / 1024);
667#endif 683#endif
684#endif
668 685
686#ifndef HAVE_PARTITIONS
687 result = mtd_device_register(&mtd, NULL, 0);
688#else
669 result = mtd_device_register(&mtd, lart_partitions, 689 result = mtd_device_register(&mtd, lart_partitions,
670 ARRAY_SIZE(lart_partitions)); 690 ARRAY_SIZE(lart_partitions));
691#endif
671 692
672 return (result); 693 return (result);
673} 694}
674 695
675static void __exit lart_flash_exit (void) 696static void __exit lart_flash_exit (void)
676{ 697{
698#ifndef HAVE_PARTITIONS
699 mtd_device_unregister(&mtd);
700#else
677 mtd_device_unregister(&mtd); 701 mtd_device_unregister(&mtd);
702#endif
678} 703}
679 704
680module_init (lart_flash_init); 705module_init (lart_flash_init);
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 4eeeb2d7f6e..35180e475c4 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -30,7 +30,6 @@
30#include <linux/mtd/cfi.h> 30#include <linux/mtd/cfi.h>
31#include <linux/mtd/mtd.h> 31#include <linux/mtd/mtd.h>
32#include <linux/mtd/partitions.h> 32#include <linux/mtd/partitions.h>
33#include <linux/of_platform.h>
34 33
35#include <linux/spi/spi.h> 34#include <linux/spi/spi.h>
36#include <linux/spi/flash.h> 35#include <linux/spi/flash.h>
@@ -73,6 +72,14 @@
73#define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */ 72#define MAX_READY_WAIT_JIFFIES (40 * HZ) /* M25P16 specs 40s max chip erase */
74#define MAX_CMD_SIZE 5 73#define MAX_CMD_SIZE 5
75 74
75#ifdef CONFIG_M25PXX_USE_FAST_READ
76#define OPCODE_READ OPCODE_FAST_READ
77#define FAST_READ_DUMMY_BYTE 1
78#else
79#define OPCODE_READ OPCODE_NORM_READ
80#define FAST_READ_DUMMY_BYTE 0
81#endif
82
76#define JEDEC_MFR(_jedec_id) ((_jedec_id) >> 16) 83#define JEDEC_MFR(_jedec_id) ((_jedec_id) >> 16)
77 84
78/****************************************************************************/ 85/****************************************************************************/
@@ -81,11 +88,11 @@ struct m25p {
81 struct spi_device *spi; 88 struct spi_device *spi;
82 struct mutex lock; 89 struct mutex lock;
83 struct mtd_info mtd; 90 struct mtd_info mtd;
91 unsigned partitioned:1;
84 u16 page_size; 92 u16 page_size;
85 u16 addr_width; 93 u16 addr_width;
86 u8 erase_opcode; 94 u8 erase_opcode;
87 u8 *command; 95 u8 *command;
88 bool fast_read;
89}; 96};
90 97
91static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd) 98static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
@@ -161,7 +168,6 @@ static inline int set_4byte(struct m25p *flash, u32 jedec_id, int enable)
161{ 168{
162 switch (JEDEC_MFR(jedec_id)) { 169 switch (JEDEC_MFR(jedec_id)) {
163 case CFI_MFR_MACRONIX: 170 case CFI_MFR_MACRONIX:
164 case 0xEF /* winbond */:
165 flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B; 171 flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B;
166 return spi_write(flash->spi, flash->command, 1); 172 return spi_write(flash->spi, flash->command, 1);
167 default: 173 default:
@@ -203,8 +209,9 @@ static int wait_till_ready(struct m25p *flash)
203 */ 209 */
204static int erase_chip(struct m25p *flash) 210static int erase_chip(struct m25p *flash)
205{ 211{
206 pr_debug("%s: %s %lldKiB\n", dev_name(&flash->spi->dev), __func__, 212 DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %lldKiB\n",
207 (long long)(flash->mtd.size >> 10)); 213 dev_name(&flash->spi->dev), __func__,
214 (long long)(flash->mtd.size >> 10));
208 215
209 /* Wait until finished previous write command. */ 216 /* Wait until finished previous write command. */
210 if (wait_till_ready(flash)) 217 if (wait_till_ready(flash))
@@ -243,8 +250,9 @@ static int m25p_cmdsz(struct m25p *flash)
243 */ 250 */
244static int erase_sector(struct m25p *flash, u32 offset) 251static int erase_sector(struct m25p *flash, u32 offset)
245{ 252{
246 pr_debug("%s: %s %dKiB at 0x%08x\n", dev_name(&flash->spi->dev), 253 DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %dKiB at 0x%08x\n",
247 __func__, flash->mtd.erasesize / 1024, offset); 254 dev_name(&flash->spi->dev), __func__,
255 flash->mtd.erasesize / 1024, offset);
248 256
249 /* Wait until finished previous write command. */ 257 /* Wait until finished previous write command. */
250 if (wait_till_ready(flash)) 258 if (wait_till_ready(flash))
@@ -278,10 +286,13 @@ static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
278 u32 addr,len; 286 u32 addr,len;
279 uint32_t rem; 287 uint32_t rem;
280 288
281 pr_debug("%s: %s at 0x%llx, len %lld\n", dev_name(&flash->spi->dev), 289 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%llx, len %lld\n",
282 __func__, (long long)instr->addr, 290 dev_name(&flash->spi->dev), __func__, "at",
283 (long long)instr->len); 291 (long long)instr->addr, (long long)instr->len);
284 292
293 /* sanity checks */
294 if (instr->addr + instr->len > flash->mtd.size)
295 return -EINVAL;
285 div_u64_rem(instr->len, mtd->erasesize, &rem); 296 div_u64_rem(instr->len, mtd->erasesize, &rem);
286 if (rem) 297 if (rem)
287 return -EINVAL; 298 return -EINVAL;
@@ -336,10 +347,17 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
336 struct m25p *flash = mtd_to_m25p(mtd); 347 struct m25p *flash = mtd_to_m25p(mtd);
337 struct spi_transfer t[2]; 348 struct spi_transfer t[2];
338 struct spi_message m; 349 struct spi_message m;
339 uint8_t opcode;
340 350
341 pr_debug("%s: %s from 0x%08x, len %zd\n", dev_name(&flash->spi->dev), 351 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
342 __func__, (u32)from, len); 352 dev_name(&flash->spi->dev), __func__, "from",
353 (u32)from, len);
354
355 /* sanity checks */
356 if (!len)
357 return 0;
358
359 if (from + len > flash->mtd.size)
360 return -EINVAL;
343 361
344 spi_message_init(&m); 362 spi_message_init(&m);
345 memset(t, 0, (sizeof t)); 363 memset(t, 0, (sizeof t));
@@ -349,13 +367,16 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
349 * Should add 1 byte DUMMY_BYTE. 367 * Should add 1 byte DUMMY_BYTE.
350 */ 368 */
351 t[0].tx_buf = flash->command; 369 t[0].tx_buf = flash->command;
352 t[0].len = m25p_cmdsz(flash) + (flash->fast_read ? 1 : 0); 370 t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE;
353 spi_message_add_tail(&t[0], &m); 371 spi_message_add_tail(&t[0], &m);
354 372
355 t[1].rx_buf = buf; 373 t[1].rx_buf = buf;
356 t[1].len = len; 374 t[1].len = len;
357 spi_message_add_tail(&t[1], &m); 375 spi_message_add_tail(&t[1], &m);
358 376
377 /* Byte count starts at zero. */
378 *retlen = 0;
379
359 mutex_lock(&flash->lock); 380 mutex_lock(&flash->lock);
360 381
361 /* Wait till previous write/erase is done. */ 382 /* Wait till previous write/erase is done. */
@@ -371,14 +392,12 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
371 */ 392 */
372 393
373 /* Set up the write data buffer. */ 394 /* Set up the write data buffer. */
374 opcode = flash->fast_read ? OPCODE_FAST_READ : OPCODE_NORM_READ; 395 flash->command[0] = OPCODE_READ;
375 flash->command[0] = opcode;
376 m25p_addr2cmd(flash, from, flash->command); 396 m25p_addr2cmd(flash, from, flash->command);
377 397
378 spi_sync(flash->spi, &m); 398 spi_sync(flash->spi, &m);
379 399
380 *retlen = m.actual_length - m25p_cmdsz(flash) - 400 *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
381 (flash->fast_read ? 1 : 0);
382 401
383 mutex_unlock(&flash->lock); 402 mutex_unlock(&flash->lock);
384 403
@@ -398,8 +417,18 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
398 struct spi_transfer t[2]; 417 struct spi_transfer t[2];
399 struct spi_message m; 418 struct spi_message m;
400 419
401 pr_debug("%s: %s to 0x%08x, len %zd\n", dev_name(&flash->spi->dev), 420 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
402 __func__, (u32)to, len); 421 dev_name(&flash->spi->dev), __func__, "to",
422 (u32)to, len);
423
424 *retlen = 0;
425
426 /* sanity checks */
427 if (!len)
428 return(0);
429
430 if (to + len > flash->mtd.size)
431 return -EINVAL;
403 432
404 spi_message_init(&m); 433 spi_message_init(&m);
405 memset(t, 0, (sizeof t)); 434 memset(t, 0, (sizeof t));
@@ -481,8 +510,18 @@ static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
481 size_t actual; 510 size_t actual;
482 int cmd_sz, ret; 511 int cmd_sz, ret;
483 512
484 pr_debug("%s: %s to 0x%08x, len %zd\n", dev_name(&flash->spi->dev), 513 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
485 __func__, (u32)to, len); 514 dev_name(&flash->spi->dev), __func__, "to",
515 (u32)to, len);
516
517 *retlen = 0;
518
519 /* sanity checks */
520 if (!len)
521 return 0;
522
523 if (to + len > flash->mtd.size)
524 return -EINVAL;
486 525
487 spi_message_init(&m); 526 spi_message_init(&m);
488 memset(t, 0, (sizeof t)); 527 memset(t, 0, (sizeof t));
@@ -622,7 +661,6 @@ static const struct spi_device_id m25p_ids[] = {
622 { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K) }, 661 { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K) },
623 662
624 { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K) }, 663 { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K) },
625 { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
626 { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) }, 664 { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) },
627 665
628 { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) }, 666 { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) },
@@ -630,26 +668,17 @@ static const struct spi_device_id m25p_ids[] = {
630 { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) }, 668 { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) },
631 { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) }, 669 { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) },
632 670
633 { "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16, SECT_4K) },
634
635 /* EON -- en25xxx */ 671 /* EON -- en25xxx */
636 { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64, SECT_4K) }, 672 { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64, SECT_4K) },
637 { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) }, 673 { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) },
638 { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, 0) },
639 { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, 674 { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) },
640 { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
641
642 /* Everspin */
643 { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2) },
644 675
645 /* Intel/Numonyx -- xxxs33b */ 676 /* Intel/Numonyx -- xxxs33b */
646 { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, 677 { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) },
647 { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, 678 { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) },
648 { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, 679 { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) },
649 { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, 0) },
650 680
651 /* Macronix */ 681 /* Macronix */
652 { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SECT_4K) },
653 { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) }, 682 { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) },
654 { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) }, 683 { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) },
655 { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) }, 684 { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
@@ -660,16 +689,15 @@ static const struct spi_device_id m25p_ids[] = {
660 { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, 689 { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
661 { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, 690 { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
662 691
663 /* Micron */
664 { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, 0) },
665 { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
666 { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
667
668 /* Spansion -- single (large) sector size only, at least 692 /* Spansion -- single (large) sector size only, at least
669 * for the chips listed here (without boot sectors). 693 * for the chips listed here (without boot sectors).
670 */ 694 */
671 { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, 0) }, 695 { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, 0) },
672 { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, 0) }, 696 { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, 0) },
697 { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32, 0) },
698 { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64, 0) },
699 { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, SECT_4K) },
700 { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128, 0) },
673 { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) }, 701 { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) },
674 { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, 0) }, 702 { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, 0) },
675 { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, 0) }, 703 { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, 0) },
@@ -678,11 +706,6 @@ static const struct spi_device_id m25p_ids[] = {
678 { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) }, 706 { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
679 { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, 0) }, 707 { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, 0) },
680 { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, 0) }, 708 { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, 0) },
681 { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, 0) },
682 { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, 0) },
683 { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32, 0) },
684 { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64, 0) },
685 { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128, 0) },
686 { "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32, SECT_4K) }, 709 { "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32, SECT_4K) },
687 { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, 710 { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
688 711
@@ -706,7 +729,6 @@ static const struct spi_device_id m25p_ids[] = {
706 { "m25p32", INFO(0x202016, 0, 64 * 1024, 64, 0) }, 729 { "m25p32", INFO(0x202016, 0, 64 * 1024, 64, 0) },
707 { "m25p64", INFO(0x202017, 0, 64 * 1024, 128, 0) }, 730 { "m25p64", INFO(0x202017, 0, 64 * 1024, 128, 0) },
708 { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, 0) }, 731 { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, 0) },
709 { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64, 0) },
710 732
711 { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2, 0) }, 733 { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2, 0) },
712 { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4, 0) }, 734 { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4, 0) },
@@ -722,7 +744,6 @@ static const struct spi_device_id m25p_ids[] = {
722 { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16, 0) }, 744 { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16, 0) },
723 { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32, 0) }, 745 { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32, 0) },
724 746
725 { "m25pe20", INFO(0x208012, 0, 64 * 1024, 4, 0) },
726 { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16, 0) }, 747 { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16, 0) },
727 { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32, SECT_4K) }, 748 { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32, SECT_4K) },
728 749
@@ -739,12 +760,8 @@ static const struct spi_device_id m25p_ids[] = {
739 { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) }, 760 { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) },
740 { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) }, 761 { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) },
741 { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) }, 762 { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) },
742 { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64, SECT_4K) },
743 { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, 763 { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
744 { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, 764 { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
745 { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SECT_4K) },
746 { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SECT_4K) },
747 { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K) },
748 765
749 /* Catalyst / On Semiconductor -- non-JEDEC */ 766 /* Catalyst / On Semiconductor -- non-JEDEC */
750 { "cat25c11", CAT25_INFO( 16, 8, 16, 1) }, 767 { "cat25c11", CAT25_INFO( 16, 8, 16, 1) },
@@ -756,7 +773,7 @@ static const struct spi_device_id m25p_ids[] = {
756}; 773};
757MODULE_DEVICE_TABLE(spi, m25p_ids); 774MODULE_DEVICE_TABLE(spi, m25p_ids);
758 775
759static const struct spi_device_id *jedec_probe(struct spi_device *spi) 776static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi)
760{ 777{
761 int tmp; 778 int tmp;
762 u8 code = OPCODE_RDID; 779 u8 code = OPCODE_RDID;
@@ -771,8 +788,8 @@ static const struct spi_device_id *jedec_probe(struct spi_device *spi)
771 */ 788 */
772 tmp = spi_write_then_read(spi, &code, 1, id, 5); 789 tmp = spi_write_then_read(spi, &code, 1, id, 5);
773 if (tmp < 0) { 790 if (tmp < 0) {
774 pr_debug("%s: error %d reading JEDEC ID\n", 791 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
775 dev_name(&spi->dev), tmp); 792 dev_name(&spi->dev), tmp);
776 return ERR_PTR(tmp); 793 return ERR_PTR(tmp);
777 } 794 }
778 jedec = id[0]; 795 jedec = id[0];
@@ -801,20 +818,15 @@ static const struct spi_device_id *jedec_probe(struct spi_device *spi)
801 * matches what the READ command supports, at least until this driver 818 * matches what the READ command supports, at least until this driver
802 * understands FAST_READ (for clocks over 25 MHz). 819 * understands FAST_READ (for clocks over 25 MHz).
803 */ 820 */
804static int m25p_probe(struct spi_device *spi) 821static int __devinit m25p_probe(struct spi_device *spi)
805{ 822{
806 const struct spi_device_id *id = spi_get_device_id(spi); 823 const struct spi_device_id *id = spi_get_device_id(spi);
807 struct flash_platform_data *data; 824 struct flash_platform_data *data;
808 struct m25p *flash; 825 struct m25p *flash;
809 struct flash_info *info; 826 struct flash_info *info;
810 unsigned i; 827 unsigned i;
811 struct mtd_part_parser_data ppdata; 828 struct mtd_partition *parts = NULL;
812 struct device_node __maybe_unused *np = spi->dev.of_node; 829 int nr_parts = 0;
813
814#ifdef CONFIG_MTD_OF_PARTS
815 if (!of_device_is_available(np))
816 return -ENODEV;
817#endif
818 830
819 /* Platform data helps sort out which chip type we have, as 831 /* Platform data helps sort out which chip type we have, as
820 * well as how this board partitions it. If we don't have 832 * well as how this board partitions it. If we don't have
@@ -864,8 +876,7 @@ static int m25p_probe(struct spi_device *spi)
864 flash = kzalloc(sizeof *flash, GFP_KERNEL); 876 flash = kzalloc(sizeof *flash, GFP_KERNEL);
865 if (!flash) 877 if (!flash)
866 return -ENOMEM; 878 return -ENOMEM;
867 flash->command = kmalloc(MAX_CMD_SIZE + (flash->fast_read ? 1 : 0), 879 flash->command = kmalloc(MAX_CMD_SIZE + FAST_READ_DUMMY_BYTE, GFP_KERNEL);
868 GFP_KERNEL);
869 if (!flash->command) { 880 if (!flash->command) {
870 kfree(flash); 881 kfree(flash);
871 return -ENOMEM; 882 return -ENOMEM;
@@ -896,14 +907,14 @@ static int m25p_probe(struct spi_device *spi)
896 flash->mtd.writesize = 1; 907 flash->mtd.writesize = 1;
897 flash->mtd.flags = MTD_CAP_NORFLASH; 908 flash->mtd.flags = MTD_CAP_NORFLASH;
898 flash->mtd.size = info->sector_size * info->n_sectors; 909 flash->mtd.size = info->sector_size * info->n_sectors;
899 flash->mtd._erase = m25p80_erase; 910 flash->mtd.erase = m25p80_erase;
900 flash->mtd._read = m25p80_read; 911 flash->mtd.read = m25p80_read;
901 912
902 /* sst flash chips use AAI word program */ 913 /* sst flash chips use AAI word program */
903 if (JEDEC_MFR(info->jedec_id) == CFI_MFR_SST) 914 if (JEDEC_MFR(info->jedec_id) == CFI_MFR_SST)
904 flash->mtd._write = sst_write; 915 flash->mtd.write = sst_write;
905 else 916 else
906 flash->mtd._write = m25p80_write; 917 flash->mtd.write = m25p80_write;
907 918
908 /* prefer "small sector" erase if possible */ 919 /* prefer "small sector" erase if possible */
909 if (info->flags & SECT_4K) { 920 if (info->flags & SECT_4K) {
@@ -917,20 +928,8 @@ static int m25p_probe(struct spi_device *spi)
917 if (info->flags & M25P_NO_ERASE) 928 if (info->flags & M25P_NO_ERASE)
918 flash->mtd.flags |= MTD_NO_ERASE; 929 flash->mtd.flags |= MTD_NO_ERASE;
919 930
920 ppdata.of_node = spi->dev.of_node;
921 flash->mtd.dev.parent = &spi->dev; 931 flash->mtd.dev.parent = &spi->dev;
922 flash->page_size = info->page_size; 932 flash->page_size = info->page_size;
923 flash->mtd.writebufsize = flash->page_size;
924
925 flash->fast_read = false;
926#ifdef CONFIG_OF
927 if (np && of_property_read_bool(np, "m25p,fast-read"))
928 flash->fast_read = true;
929#endif
930
931#ifdef CONFIG_M25PXX_USE_FAST_READ
932 flash->fast_read = true;
933#endif
934 933
935 if (info->addr_width) 934 if (info->addr_width)
936 flash->addr_width = info->addr_width; 935 flash->addr_width = info->addr_width;
@@ -946,7 +945,8 @@ static int m25p_probe(struct spi_device *spi)
946 dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name, 945 dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name,
947 (long long)flash->mtd.size >> 10); 946 (long long)flash->mtd.size >> 10);
948 947
949 pr_debug("mtd .name = %s, .size = 0x%llx (%lldMiB) " 948 DEBUG(MTD_DEBUG_LEVEL2,
949 "mtd .name = %s, .size = 0x%llx (%lldMiB) "
950 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n", 950 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
951 flash->mtd.name, 951 flash->mtd.name,
952 (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20), 952 (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20),
@@ -955,7 +955,8 @@ static int m25p_probe(struct spi_device *spi)
955 955
956 if (flash->mtd.numeraseregions) 956 if (flash->mtd.numeraseregions)
957 for (i = 0; i < flash->mtd.numeraseregions; i++) 957 for (i = 0; i < flash->mtd.numeraseregions; i++)
958 pr_debug("mtd.eraseregions[%d] = { .offset = 0x%llx, " 958 DEBUG(MTD_DEBUG_LEVEL2,
959 "mtd.eraseregions[%d] = { .offset = 0x%llx, "
959 ".erasesize = 0x%.8x (%uKiB), " 960 ".erasesize = 0x%.8x (%uKiB), "
960 ".numblocks = %d }\n", 961 ".numblocks = %d }\n",
961 i, (long long)flash->mtd.eraseregions[i].offset, 962 i, (long long)flash->mtd.eraseregions[i].offset,
@@ -967,13 +968,45 @@ static int m25p_probe(struct spi_device *spi)
967 /* partitions should match sector boundaries; and it may be good to 968 /* partitions should match sector boundaries; and it may be good to
968 * use readonly partitions for writeprotected sectors (BP2..BP0). 969 * use readonly partitions for writeprotected sectors (BP2..BP0).
969 */ 970 */
970 return mtd_device_parse_register(&flash->mtd, NULL, &ppdata, 971 if (mtd_has_cmdlinepart()) {
971 data ? data->parts : NULL, 972 static const char *part_probes[]
972 data ? data->nr_parts : 0); 973 = { "cmdlinepart", NULL, };
974
975 nr_parts = parse_mtd_partitions(&flash->mtd,
976 part_probes, &parts, 0);
977 }
978
979 if (nr_parts <= 0 && data && data->parts) {
980 parts = data->parts;
981 nr_parts = data->nr_parts;
982 }
983
984#ifdef CONFIG_MTD_OF_PARTS
985 if (nr_parts <= 0 && spi->dev.of_node) {
986 nr_parts = of_mtd_parse_partitions(&spi->dev,
987 spi->dev.of_node, &parts);
988 }
989#endif
990
991 if (nr_parts > 0) {
992 for (i = 0; i < nr_parts; i++) {
993 DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
994 "{.name = %s, .offset = 0x%llx, "
995 ".size = 0x%llx (%lldKiB) }\n",
996 i, parts[i].name,
997 (long long)parts[i].offset,
998 (long long)parts[i].size,
999 (long long)(parts[i].size >> 10));
1000 }
1001 flash->partitioned = 1;
1002 }
1003
1004 return mtd_device_register(&flash->mtd, parts, nr_parts) == 1 ?
1005 -ENODEV : 0;
973} 1006}
974 1007
975 1008
976static int m25p_remove(struct spi_device *spi) 1009static int __devexit m25p_remove(struct spi_device *spi)
977{ 1010{
978 struct m25p *flash = dev_get_drvdata(&spi->dev); 1011 struct m25p *flash = dev_get_drvdata(&spi->dev);
979 int status; 1012 int status;
@@ -991,11 +1024,12 @@ static int m25p_remove(struct spi_device *spi)
991static struct spi_driver m25p80_driver = { 1024static struct spi_driver m25p80_driver = {
992 .driver = { 1025 .driver = {
993 .name = "m25p80", 1026 .name = "m25p80",
1027 .bus = &spi_bus_type,
994 .owner = THIS_MODULE, 1028 .owner = THIS_MODULE,
995 }, 1029 },
996 .id_table = m25p_ids, 1030 .id_table = m25p_ids,
997 .probe = m25p_probe, 1031 .probe = m25p_probe,
998 .remove = m25p_remove, 1032 .remove = __devexit_p(m25p_remove),
999 1033
1000 /* REVISIT: many of these chips have deep power-down modes, which 1034 /* REVISIT: many of these chips have deep power-down modes, which
1001 * should clearly be entered on suspend() to minimize power use. 1035 * should clearly be entered on suspend() to minimize power use.
@@ -1003,7 +1037,21 @@ static struct spi_driver m25p80_driver = {
1003 */ 1037 */
1004}; 1038};
1005 1039
1006module_spi_driver(m25p80_driver); 1040
1041static int __init m25p80_init(void)
1042{
1043 return spi_register_driver(&m25p80_driver);
1044}
1045
1046
1047static void __exit m25p80_exit(void)
1048{
1049 spi_unregister_driver(&m25p80_driver);
1050}
1051
1052
1053module_init(m25p80_init);
1054module_exit(m25p80_exit);
1007 1055
1008MODULE_LICENSE("GPL"); 1056MODULE_LICENSE("GPL");
1009MODULE_AUTHOR("Mike Lavender"); 1057MODULE_AUTHOR("Mike Lavender");
diff --git a/drivers/mtd/devices/ms02-nv.c b/drivers/mtd/devices/ms02-nv.c
index 182849d39c6..8423fb6d4f2 100644
--- a/drivers/mtd/devices/ms02-nv.c
+++ b/drivers/mtd/devices/ms02-nv.c
@@ -59,8 +59,12 @@ static int ms02nv_read(struct mtd_info *mtd, loff_t from,
59{ 59{
60 struct ms02nv_private *mp = mtd->priv; 60 struct ms02nv_private *mp = mtd->priv;
61 61
62 if (from + len > mtd->size)
63 return -EINVAL;
64
62 memcpy(buf, mp->uaddr + from, len); 65 memcpy(buf, mp->uaddr + from, len);
63 *retlen = len; 66 *retlen = len;
67
64 return 0; 68 return 0;
65} 69}
66 70
@@ -69,8 +73,12 @@ static int ms02nv_write(struct mtd_info *mtd, loff_t to,
69{ 73{
70 struct ms02nv_private *mp = mtd->priv; 74 struct ms02nv_private *mp = mtd->priv;
71 75
76 if (to + len > mtd->size)
77 return -EINVAL;
78
72 memcpy(mp->uaddr + to, buf, len); 79 memcpy(mp->uaddr + to, buf, len);
73 *retlen = len; 80 *retlen = len;
81
74 return 0; 82 return 0;
75} 83}
76 84
@@ -207,8 +215,8 @@ static int __init ms02nv_init_one(ulong addr)
207 mtd->size = fixsize; 215 mtd->size = fixsize;
208 mtd->name = (char *)ms02nv_name; 216 mtd->name = (char *)ms02nv_name;
209 mtd->owner = THIS_MODULE; 217 mtd->owner = THIS_MODULE;
210 mtd->_read = ms02nv_read; 218 mtd->read = ms02nv_read;
211 mtd->_write = ms02nv_write; 219 mtd->write = ms02nv_write;
212 mtd->writesize = 1; 220 mtd->writesize = 1;
213 221
214 ret = -EIO; 222 ret = -EIO;
diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c
index 945c9f76234..13749d458a3 100644
--- a/drivers/mtd/devices/mtd_dataflash.c
+++ b/drivers/mtd/devices/mtd_dataflash.c
@@ -17,8 +17,6 @@
17#include <linux/mutex.h> 17#include <linux/mutex.h>
18#include <linux/err.h> 18#include <linux/err.h>
19#include <linux/math64.h> 19#include <linux/math64.h>
20#include <linux/of.h>
21#include <linux/of_device.h>
22 20
23#include <linux/spi/spi.h> 21#include <linux/spi/spi.h>
24#include <linux/spi/flash.h> 22#include <linux/spi/flash.h>
@@ -26,6 +24,7 @@
26#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
27#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
28 26
27
29/* 28/*
30 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in 29 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
31 * each chip, which may be used for double buffered I/O; but this driver 30 * each chip, which may be used for double buffered I/O; but this driver
@@ -99,16 +98,6 @@ struct dataflash {
99 struct mtd_info mtd; 98 struct mtd_info mtd;
100}; 99};
101 100
102#ifdef CONFIG_OF
103static const struct of_device_id dataflash_dt_ids[] = {
104 { .compatible = "atmel,at45", },
105 { .compatible = "atmel,dataflash", },
106 { /* sentinel */ }
107};
108#else
109#define dataflash_dt_ids NULL
110#endif
111
112/* ......................................................................... */ 101/* ......................................................................... */
113 102
114/* 103/*
@@ -133,7 +122,7 @@ static int dataflash_waitready(struct spi_device *spi)
133 for (;;) { 122 for (;;) {
134 status = dataflash_status(spi); 123 status = dataflash_status(spi);
135 if (status < 0) { 124 if (status < 0) {
136 pr_debug("%s: status %d?\n", 125 DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n",
137 dev_name(&spi->dev), status); 126 dev_name(&spi->dev), status);
138 status = 0; 127 status = 0;
139 } 128 }
@@ -160,10 +149,13 @@ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
160 uint8_t *command; 149 uint8_t *command;
161 uint32_t rem; 150 uint32_t rem;
162 151
163 pr_debug("%s: erase addr=0x%llx len 0x%llx\n", 152 DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%llx len 0x%llx\n",
164 dev_name(&spi->dev), (long long)instr->addr, 153 dev_name(&spi->dev), (long long)instr->addr,
165 (long long)instr->len); 154 (long long)instr->len);
166 155
156 /* Sanity checks */
157 if (instr->addr + instr->len > mtd->size)
158 return -EINVAL;
167 div_u64_rem(instr->len, priv->page_size, &rem); 159 div_u64_rem(instr->len, priv->page_size, &rem);
168 if (rem) 160 if (rem)
169 return -EINVAL; 161 return -EINVAL;
@@ -195,7 +187,7 @@ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
195 command[2] = (uint8_t)(pageaddr >> 8); 187 command[2] = (uint8_t)(pageaddr >> 8);
196 command[3] = 0; 188 command[3] = 0;
197 189
198 pr_debug("ERASE %s: (%x) %x %x %x [%i]\n", 190 DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n",
199 do_block ? "block" : "page", 191 do_block ? "block" : "page",
200 command[0], command[1], command[2], command[3], 192 command[0], command[1], command[2], command[3],
201 pageaddr); 193 pageaddr);
@@ -246,8 +238,16 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
246 uint8_t *command; 238 uint8_t *command;
247 int status; 239 int status;
248 240
249 pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev), 241 DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n",
250 (unsigned)from, (unsigned)(from + len)); 242 dev_name(&priv->spi->dev), (unsigned)from, (unsigned)(from + len));
243
244 *retlen = 0;
245
246 /* Sanity checks */
247 if (!len)
248 return 0;
249 if (from + len > mtd->size)
250 return -EINVAL;
251 251
252 /* Calculate flash page/byte address */ 252 /* Calculate flash page/byte address */
253 addr = (((unsigned)from / priv->page_size) << priv->page_offset) 253 addr = (((unsigned)from / priv->page_size) << priv->page_offset)
@@ -255,7 +255,7 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
255 255
256 command = priv->command; 256 command = priv->command;
257 257
258 pr_debug("READ: (%x) %x %x %x\n", 258 DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n",
259 command[0], command[1], command[2], command[3]); 259 command[0], command[1], command[2], command[3]);
260 260
261 spi_message_init(&msg); 261 spi_message_init(&msg);
@@ -287,7 +287,7 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
287 *retlen = msg.actual_length - 8; 287 *retlen = msg.actual_length - 8;
288 status = 0; 288 status = 0;
289 } else 289 } else
290 pr_debug("%s: read %x..%x --> %d\n", 290 DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n",
291 dev_name(&priv->spi->dev), 291 dev_name(&priv->spi->dev),
292 (unsigned)from, (unsigned)(from + len), 292 (unsigned)from, (unsigned)(from + len),
293 status); 293 status);
@@ -314,9 +314,17 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
314 int status = -EINVAL; 314 int status = -EINVAL;
315 uint8_t *command; 315 uint8_t *command;
316 316
317 pr_debug("%s: write 0x%x..0x%x\n", 317 DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n",
318 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len)); 318 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
319 319
320 *retlen = 0;
321
322 /* Sanity checks */
323 if (!len)
324 return 0;
325 if ((to + len) > mtd->size)
326 return -EINVAL;
327
320 spi_message_init(&msg); 328 spi_message_init(&msg);
321 329
322 x[0].tx_buf = command = priv->command; 330 x[0].tx_buf = command = priv->command;
@@ -332,7 +340,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
332 340
333 mutex_lock(&priv->lock); 341 mutex_lock(&priv->lock);
334 while (remaining > 0) { 342 while (remaining > 0) {
335 pr_debug("write @ %i:%i len=%i\n", 343 DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n",
336 pageaddr, offset, writelen); 344 pageaddr, offset, writelen);
337 345
338 /* REVISIT: 346 /* REVISIT:
@@ -360,12 +368,12 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
360 command[2] = (addr & 0x0000FF00) >> 8; 368 command[2] = (addr & 0x0000FF00) >> 8;
361 command[3] = 0; 369 command[3] = 0;
362 370
363 pr_debug("TRANSFER: (%x) %x %x %x\n", 371 DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n",
364 command[0], command[1], command[2], command[3]); 372 command[0], command[1], command[2], command[3]);
365 373
366 status = spi_sync(spi, &msg); 374 status = spi_sync(spi, &msg);
367 if (status < 0) 375 if (status < 0)
368 pr_debug("%s: xfer %u -> %d\n", 376 DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n",
369 dev_name(&spi->dev), addr, status); 377 dev_name(&spi->dev), addr, status);
370 378
371 (void) dataflash_waitready(priv->spi); 379 (void) dataflash_waitready(priv->spi);
@@ -378,7 +386,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
378 command[2] = (addr & 0x0000FF00) >> 8; 386 command[2] = (addr & 0x0000FF00) >> 8;
379 command[3] = (addr & 0x000000FF); 387 command[3] = (addr & 0x000000FF);
380 388
381 pr_debug("PROGRAM: (%x) %x %x %x\n", 389 DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n",
382 command[0], command[1], command[2], command[3]); 390 command[0], command[1], command[2], command[3]);
383 391
384 x[1].tx_buf = writebuf; 392 x[1].tx_buf = writebuf;
@@ -387,7 +395,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
387 status = spi_sync(spi, &msg); 395 status = spi_sync(spi, &msg);
388 spi_transfer_del(x + 1); 396 spi_transfer_del(x + 1);
389 if (status < 0) 397 if (status < 0)
390 pr_debug("%s: pgm %u/%u -> %d\n", 398 DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n",
391 dev_name(&spi->dev), addr, writelen, status); 399 dev_name(&spi->dev), addr, writelen, status);
392 400
393 (void) dataflash_waitready(priv->spi); 401 (void) dataflash_waitready(priv->spi);
@@ -402,12 +410,12 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
402 command[2] = (addr & 0x0000FF00) >> 8; 410 command[2] = (addr & 0x0000FF00) >> 8;
403 command[3] = 0; 411 command[3] = 0;
404 412
405 pr_debug("COMPARE: (%x) %x %x %x\n", 413 DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n",
406 command[0], command[1], command[2], command[3]); 414 command[0], command[1], command[2], command[3]);
407 415
408 status = spi_sync(spi, &msg); 416 status = spi_sync(spi, &msg);
409 if (status < 0) 417 if (status < 0)
410 pr_debug("%s: compare %u -> %d\n", 418 DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n",
411 dev_name(&spi->dev), addr, status); 419 dev_name(&spi->dev), addr, status);
412 420
413 status = dataflash_waitready(priv->spi); 421 status = dataflash_waitready(priv->spi);
@@ -471,6 +479,8 @@ static ssize_t otp_read(struct spi_device *spi, unsigned base,
471 479
472 if ((off + len) > 64) 480 if ((off + len) > 64)
473 len = 64 - off; 481 len = 64 - off;
482 if (len == 0)
483 return len;
474 484
475 spi_message_init(&m); 485 spi_message_init(&m);
476 486
@@ -590,16 +600,16 @@ static int dataflash_write_user_otp(struct mtd_info *mtd,
590 600
591static char *otp_setup(struct mtd_info *device, char revision) 601static char *otp_setup(struct mtd_info *device, char revision)
592{ 602{
593 device->_get_fact_prot_info = dataflash_get_otp_info; 603 device->get_fact_prot_info = dataflash_get_otp_info;
594 device->_read_fact_prot_reg = dataflash_read_fact_otp; 604 device->read_fact_prot_reg = dataflash_read_fact_otp;
595 device->_get_user_prot_info = dataflash_get_otp_info; 605 device->get_user_prot_info = dataflash_get_otp_info;
596 device->_read_user_prot_reg = dataflash_read_user_otp; 606 device->read_user_prot_reg = dataflash_read_user_otp;
597 607
598 /* rev c parts (at45db321c and at45db1281 only!) use a 608 /* rev c parts (at45db321c and at45db1281 only!) use a
599 * different write procedure; not (yet?) implemented. 609 * different write procedure; not (yet?) implemented.
600 */ 610 */
601 if (revision > 'c') 611 if (revision > 'c')
602 device->_write_user_prot_reg = dataflash_write_user_otp; 612 device->write_user_prot_reg = dataflash_write_user_otp;
603 613
604 return ", OTP"; 614 return ", OTP";
605} 615}
@@ -618,15 +628,17 @@ static char *otp_setup(struct mtd_info *device, char revision)
618/* 628/*
619 * Register DataFlash device with MTD subsystem. 629 * Register DataFlash device with MTD subsystem.
620 */ 630 */
621static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages, 631static int __devinit
622 int pagesize, int pageoffset, char revision) 632add_dataflash_otp(struct spi_device *spi, char *name,
633 int nr_pages, int pagesize, int pageoffset, char revision)
623{ 634{
624 struct dataflash *priv; 635 struct dataflash *priv;
625 struct mtd_info *device; 636 struct mtd_info *device;
626 struct mtd_part_parser_data ppdata;
627 struct flash_platform_data *pdata = spi->dev.platform_data; 637 struct flash_platform_data *pdata = spi->dev.platform_data;
628 char *otp_tag = ""; 638 char *otp_tag = "";
629 int err = 0; 639 int err = 0;
640 struct mtd_partition *parts;
641 int nr_parts = 0;
630 642
631 priv = kzalloc(sizeof *priv, GFP_KERNEL); 643 priv = kzalloc(sizeof *priv, GFP_KERNEL);
632 if (!priv) 644 if (!priv)
@@ -650,9 +662,9 @@ static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
650 device->owner = THIS_MODULE; 662 device->owner = THIS_MODULE;
651 device->type = MTD_DATAFLASH; 663 device->type = MTD_DATAFLASH;
652 device->flags = MTD_WRITEABLE; 664 device->flags = MTD_WRITEABLE;
653 device->_erase = dataflash_erase; 665 device->erase = dataflash_erase;
654 device->_read = dataflash_read; 666 device->read = dataflash_read;
655 device->_write = dataflash_write; 667 device->write = dataflash_write;
656 device->priv = priv; 668 device->priv = priv;
657 669
658 device->dev.parent = &spi->dev; 670 device->dev.parent = &spi->dev;
@@ -665,11 +677,28 @@ static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
665 pagesize, otp_tag); 677 pagesize, otp_tag);
666 dev_set_drvdata(&spi->dev, priv); 678 dev_set_drvdata(&spi->dev, priv);
667 679
668 ppdata.of_node = spi->dev.of_node; 680 if (mtd_has_cmdlinepart()) {
669 err = mtd_device_parse_register(device, NULL, &ppdata, 681 static const char *part_probes[] = { "cmdlinepart", NULL, };
670 pdata ? pdata->parts : NULL,
671 pdata ? pdata->nr_parts : 0);
672 682
683 nr_parts = parse_mtd_partitions(device, part_probes, &parts,
684 0);
685 }
686
687 if (nr_parts <= 0 && pdata && pdata->parts) {
688 parts = pdata->parts;
689 nr_parts = pdata->nr_parts;
690 }
691
692 if (nr_parts > 0) {
693 priv->partitioned = 1;
694 err = mtd_device_register(device, parts, nr_parts);
695 goto out;
696 }
697
698 if (mtd_device_register(device, NULL, 0) == 1)
699 err = -ENODEV;
700
701out:
673 if (!err) 702 if (!err)
674 return 0; 703 return 0;
675 704
@@ -678,8 +707,9 @@ static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
678 return err; 707 return err;
679} 708}
680 709
681static inline int add_dataflash(struct spi_device *spi, char *name, 710static inline int __devinit
682 int nr_pages, int pagesize, int pageoffset) 711add_dataflash(struct spi_device *spi, char *name,
712 int nr_pages, int pagesize, int pageoffset)
683{ 713{
684 return add_dataflash_otp(spi, name, nr_pages, pagesize, 714 return add_dataflash_otp(spi, name, nr_pages, pagesize,
685 pageoffset, 0); 715 pageoffset, 0);
@@ -703,7 +733,7 @@ struct flash_info {
703#define IS_POW2PS 0x0001 /* uses 2^N byte pages */ 733#define IS_POW2PS 0x0001 /* uses 2^N byte pages */
704}; 734};
705 735
706static struct flash_info dataflash_data[] = { 736static struct flash_info __devinitdata dataflash_data [] = {
707 737
708 /* 738 /*
709 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, 739 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
@@ -738,7 +768,7 @@ static struct flash_info dataflash_data[] = {
738 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, 768 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
739}; 769};
740 770
741static struct flash_info *jedec_probe(struct spi_device *spi) 771static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
742{ 772{
743 int tmp; 773 int tmp;
744 uint8_t code = OP_READ_ID; 774 uint8_t code = OP_READ_ID;
@@ -757,7 +787,7 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
757 */ 787 */
758 tmp = spi_write_then_read(spi, &code, 1, id, 3); 788 tmp = spi_write_then_read(spi, &code, 1, id, 3);
759 if (tmp < 0) { 789 if (tmp < 0) {
760 pr_debug("%s: error %d reading JEDEC ID\n", 790 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
761 dev_name(&spi->dev), tmp); 791 dev_name(&spi->dev), tmp);
762 return ERR_PTR(tmp); 792 return ERR_PTR(tmp);
763 } 793 }
@@ -774,7 +804,7 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
774 tmp < ARRAY_SIZE(dataflash_data); 804 tmp < ARRAY_SIZE(dataflash_data);
775 tmp++, info++) { 805 tmp++, info++) {
776 if (info->jedec_id == jedec) { 806 if (info->jedec_id == jedec) {
777 pr_debug("%s: OTP, sector protect%s\n", 807 DEBUG(MTD_DEBUG_LEVEL1, "%s: OTP, sector protect%s\n",
778 dev_name(&spi->dev), 808 dev_name(&spi->dev),
779 (info->flags & SUP_POW2PS) 809 (info->flags & SUP_POW2PS)
780 ? ", binary pagesize" : "" 810 ? ", binary pagesize" : ""
@@ -782,7 +812,8 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
782 if (info->flags & SUP_POW2PS) { 812 if (info->flags & SUP_POW2PS) {
783 status = dataflash_status(spi); 813 status = dataflash_status(spi);
784 if (status < 0) { 814 if (status < 0) {
785 pr_debug("%s: status error %d\n", 815 DEBUG(MTD_DEBUG_LEVEL1,
816 "%s: status error %d\n",
786 dev_name(&spi->dev), status); 817 dev_name(&spi->dev), status);
787 return ERR_PTR(status); 818 return ERR_PTR(status);
788 } 819 }
@@ -821,7 +852,7 @@ static struct flash_info *jedec_probe(struct spi_device *spi)
821 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 852 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
822 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 853 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
823 */ 854 */
824static int dataflash_probe(struct spi_device *spi) 855static int __devinit dataflash_probe(struct spi_device *spi)
825{ 856{
826 int status; 857 int status;
827 struct flash_info *info; 858 struct flash_info *info;
@@ -847,7 +878,7 @@ static int dataflash_probe(struct spi_device *spi)
847 */ 878 */
848 status = dataflash_status(spi); 879 status = dataflash_status(spi);
849 if (status <= 0 || status == 0xff) { 880 if (status <= 0 || status == 0xff) {
850 pr_debug("%s: status error %d\n", 881 DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n",
851 dev_name(&spi->dev), status); 882 dev_name(&spi->dev), status);
852 if (status == 0 || status == 0xff) 883 if (status == 0 || status == 0xff)
853 status = -ENODEV; 884 status = -ENODEV;
@@ -883,24 +914,24 @@ static int dataflash_probe(struct spi_device *spi)
883 break; 914 break;
884 /* obsolete AT45DB1282 not (yet?) supported */ 915 /* obsolete AT45DB1282 not (yet?) supported */
885 default: 916 default:
886 pr_debug("%s: unsupported device (%x)\n", dev_name(&spi->dev), 917 DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n",
887 status & 0x3c); 918 dev_name(&spi->dev), status & 0x3c);
888 status = -ENODEV; 919 status = -ENODEV;
889 } 920 }
890 921
891 if (status < 0) 922 if (status < 0)
892 pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev), 923 DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n",
893 status); 924 dev_name(&spi->dev), status);
894 925
895 return status; 926 return status;
896} 927}
897 928
898static int dataflash_remove(struct spi_device *spi) 929static int __devexit dataflash_remove(struct spi_device *spi)
899{ 930{
900 struct dataflash *flash = dev_get_drvdata(&spi->dev); 931 struct dataflash *flash = dev_get_drvdata(&spi->dev);
901 int status; 932 int status;
902 933
903 pr_debug("%s: remove\n", dev_name(&spi->dev)); 934 DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", dev_name(&spi->dev));
904 935
905 status = mtd_device_unregister(&flash->mtd); 936 status = mtd_device_unregister(&flash->mtd);
906 if (status == 0) { 937 if (status == 0) {
@@ -913,17 +944,28 @@ static int dataflash_remove(struct spi_device *spi)
913static struct spi_driver dataflash_driver = { 944static struct spi_driver dataflash_driver = {
914 .driver = { 945 .driver = {
915 .name = "mtd_dataflash", 946 .name = "mtd_dataflash",
947 .bus = &spi_bus_type,
916 .owner = THIS_MODULE, 948 .owner = THIS_MODULE,
917 .of_match_table = dataflash_dt_ids,
918 }, 949 },
919 950
920 .probe = dataflash_probe, 951 .probe = dataflash_probe,
921 .remove = dataflash_remove, 952 .remove = __devexit_p(dataflash_remove),
922 953
923 /* FIXME: investigate suspend and resume... */ 954 /* FIXME: investigate suspend and resume... */
924}; 955};
925 956
926module_spi_driver(dataflash_driver); 957static int __init dataflash_init(void)
958{
959 return spi_register_driver(&dataflash_driver);
960}
961module_init(dataflash_init);
962
963static void __exit dataflash_exit(void)
964{
965 spi_unregister_driver(&dataflash_driver);
966}
967module_exit(dataflash_exit);
968
927 969
928MODULE_LICENSE("GPL"); 970MODULE_LICENSE("GPL");
929MODULE_AUTHOR("Andrew Victor, David Brownell"); 971MODULE_AUTHOR("Andrew Victor, David Brownell");
diff --git a/drivers/mtd/devices/mtdram.c b/drivers/mtd/devices/mtdram.c
index ec59d65897f..2562689ba6b 100644
--- a/drivers/mtd/devices/mtdram.c
+++ b/drivers/mtd/devices/mtdram.c
@@ -34,23 +34,34 @@ static struct mtd_info *mtd_info;
34 34
35static int ram_erase(struct mtd_info *mtd, struct erase_info *instr) 35static int ram_erase(struct mtd_info *mtd, struct erase_info *instr)
36{ 36{
37 if (instr->addr + instr->len > mtd->size)
38 return -EINVAL;
39
37 memset((char *)mtd->priv + instr->addr, 0xff, instr->len); 40 memset((char *)mtd->priv + instr->addr, 0xff, instr->len);
41
38 instr->state = MTD_ERASE_DONE; 42 instr->state = MTD_ERASE_DONE;
39 mtd_erase_callback(instr); 43 mtd_erase_callback(instr);
44
40 return 0; 45 return 0;
41} 46}
42 47
43static int ram_point(struct mtd_info *mtd, loff_t from, size_t len, 48static int ram_point(struct mtd_info *mtd, loff_t from, size_t len,
44 size_t *retlen, void **virt, resource_size_t *phys) 49 size_t *retlen, void **virt, resource_size_t *phys)
45{ 50{
51 if (from + len > mtd->size)
52 return -EINVAL;
53
54 /* can we return a physical address with this driver? */
55 if (phys)
56 return -EINVAL;
57
46 *virt = mtd->priv + from; 58 *virt = mtd->priv + from;
47 *retlen = len; 59 *retlen = len;
48 return 0; 60 return 0;
49} 61}
50 62
51static int ram_unpoint(struct mtd_info *mtd, loff_t from, size_t len) 63static void ram_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
52{ 64{
53 return 0;
54} 65}
55 66
56/* 67/*
@@ -69,7 +80,11 @@ static unsigned long ram_get_unmapped_area(struct mtd_info *mtd,
69static int ram_read(struct mtd_info *mtd, loff_t from, size_t len, 80static int ram_read(struct mtd_info *mtd, loff_t from, size_t len,
70 size_t *retlen, u_char *buf) 81 size_t *retlen, u_char *buf)
71{ 82{
83 if (from + len > mtd->size)
84 return -EINVAL;
85
72 memcpy(buf, mtd->priv + from, len); 86 memcpy(buf, mtd->priv + from, len);
87
73 *retlen = len; 88 *retlen = len;
74 return 0; 89 return 0;
75} 90}
@@ -77,7 +92,11 @@ static int ram_read(struct mtd_info *mtd, loff_t from, size_t len,
77static int ram_write(struct mtd_info *mtd, loff_t to, size_t len, 92static int ram_write(struct mtd_info *mtd, loff_t to, size_t len,
78 size_t *retlen, const u_char *buf) 93 size_t *retlen, const u_char *buf)
79{ 94{
95 if (to + len > mtd->size)
96 return -EINVAL;
97
80 memcpy((char *)mtd->priv + to, buf, len); 98 memcpy((char *)mtd->priv + to, buf, len);
99
81 *retlen = len; 100 *retlen = len;
82 return 0; 101 return 0;
83} 102}
@@ -107,12 +126,12 @@ int mtdram_init_device(struct mtd_info *mtd, void *mapped_address,
107 mtd->priv = mapped_address; 126 mtd->priv = mapped_address;
108 127
109 mtd->owner = THIS_MODULE; 128 mtd->owner = THIS_MODULE;
110 mtd->_erase = ram_erase; 129 mtd->erase = ram_erase;
111 mtd->_point = ram_point; 130 mtd->point = ram_point;
112 mtd->_unpoint = ram_unpoint; 131 mtd->unpoint = ram_unpoint;
113 mtd->_get_unmapped_area = ram_get_unmapped_area; 132 mtd->get_unmapped_area = ram_get_unmapped_area;
114 mtd->_read = ram_read; 133 mtd->read = ram_read;
115 mtd->_write = ram_write; 134 mtd->write = ram_write;
116 135
117 if (mtd_device_register(mtd, NULL, 0)) 136 if (mtd_device_register(mtd, NULL, 0))
118 return -EIO; 137 return -EIO;
diff --git a/drivers/mtd/devices/phram.c b/drivers/mtd/devices/phram.c
index 67823de68db..23423bd00b0 100644
--- a/drivers/mtd/devices/phram.c
+++ b/drivers/mtd/devices/phram.c
@@ -33,33 +33,45 @@ struct phram_mtd_list {
33 33
34static LIST_HEAD(phram_list); 34static LIST_HEAD(phram_list);
35 35
36
36static int phram_erase(struct mtd_info *mtd, struct erase_info *instr) 37static int phram_erase(struct mtd_info *mtd, struct erase_info *instr)
37{ 38{
38 u_char *start = mtd->priv; 39 u_char *start = mtd->priv;
39 40
41 if (instr->addr + instr->len > mtd->size)
42 return -EINVAL;
43
40 memset(start + instr->addr, 0xff, instr->len); 44 memset(start + instr->addr, 0xff, instr->len);
41 45
42 /* 46 /* This'll catch a few races. Free the thing before returning :)
43 * This'll catch a few races. Free the thing before returning :)
44 * I don't feel at all ashamed. This kind of thing is possible anyway 47 * I don't feel at all ashamed. This kind of thing is possible anyway
45 * with flash, but unlikely. 48 * with flash, but unlikely.
46 */ 49 */
50
47 instr->state = MTD_ERASE_DONE; 51 instr->state = MTD_ERASE_DONE;
52
48 mtd_erase_callback(instr); 53 mtd_erase_callback(instr);
54
49 return 0; 55 return 0;
50} 56}
51 57
52static int phram_point(struct mtd_info *mtd, loff_t from, size_t len, 58static int phram_point(struct mtd_info *mtd, loff_t from, size_t len,
53 size_t *retlen, void **virt, resource_size_t *phys) 59 size_t *retlen, void **virt, resource_size_t *phys)
54{ 60{
61 if (from + len > mtd->size)
62 return -EINVAL;
63
64 /* can we return a physical address with this driver? */
65 if (phys)
66 return -EINVAL;
67
55 *virt = mtd->priv + from; 68 *virt = mtd->priv + from;
56 *retlen = len; 69 *retlen = len;
57 return 0; 70 return 0;
58} 71}
59 72
60static int phram_unpoint(struct mtd_info *mtd, loff_t from, size_t len) 73static void phram_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
61{ 74{
62 return 0;
63} 75}
64 76
65static int phram_read(struct mtd_info *mtd, loff_t from, size_t len, 77static int phram_read(struct mtd_info *mtd, loff_t from, size_t len,
@@ -67,7 +79,14 @@ static int phram_read(struct mtd_info *mtd, loff_t from, size_t len,
67{ 79{
68 u_char *start = mtd->priv; 80 u_char *start = mtd->priv;
69 81
82 if (from >= mtd->size)
83 return -EINVAL;
84
85 if (len > mtd->size - from)
86 len = mtd->size - from;
87
70 memcpy(buf, start + from, len); 88 memcpy(buf, start + from, len);
89
71 *retlen = len; 90 *retlen = len;
72 return 0; 91 return 0;
73} 92}
@@ -77,11 +96,20 @@ static int phram_write(struct mtd_info *mtd, loff_t to, size_t len,
77{ 96{
78 u_char *start = mtd->priv; 97 u_char *start = mtd->priv;
79 98
99 if (to >= mtd->size)
100 return -EINVAL;
101
102 if (len > mtd->size - to)
103 len = mtd->size - to;
104
80 memcpy(start + to, buf, len); 105 memcpy(start + to, buf, len);
106
81 *retlen = len; 107 *retlen = len;
82 return 0; 108 return 0;
83} 109}
84 110
111
112
85static void unregister_devices(void) 113static void unregister_devices(void)
86{ 114{
87 struct phram_mtd_list *this, *safe; 115 struct phram_mtd_list *this, *safe;
@@ -114,11 +142,11 @@ static int register_device(char *name, unsigned long start, unsigned long len)
114 new->mtd.name = name; 142 new->mtd.name = name;
115 new->mtd.size = len; 143 new->mtd.size = len;
116 new->mtd.flags = MTD_CAP_RAM; 144 new->mtd.flags = MTD_CAP_RAM;
117 new->mtd._erase = phram_erase; 145 new->mtd.erase = phram_erase;
118 new->mtd._point = phram_point; 146 new->mtd.point = phram_point;
119 new->mtd._unpoint = phram_unpoint; 147 new->mtd.unpoint = phram_unpoint;
120 new->mtd._read = phram_read; 148 new->mtd.read = phram_read;
121 new->mtd._write = phram_write; 149 new->mtd.write = phram_write;
122 new->mtd.owner = THIS_MODULE; 150 new->mtd.owner = THIS_MODULE;
123 new->mtd.type = MTD_RAM; 151 new->mtd.type = MTD_RAM;
124 new->mtd.erasesize = PAGE_SIZE; 152 new->mtd.erasesize = PAGE_SIZE;
@@ -205,17 +233,7 @@ static inline void kill_final_newline(char *str)
205 return 1; \ 233 return 1; \
206} while (0) 234} while (0)
207 235
208/* 236static int phram_setup(const char *val, struct kernel_param *kp)
209 * This shall contain the module parameter if any. It is of the form:
210 * - phram=<device>,<address>,<size> for module case
211 * - phram.phram=<device>,<address>,<size> for built-in case
212 * We leave 64 bytes for the device name, 12 for the address and 12 for the
213 * size.
214 * Example: phram.phram=rootfs,0xa0000000,512Mi
215 */
216static __initdata char phram_paramline[64+12+12];
217
218static int __init phram_setup(const char *val)
219{ 237{
220 char buf[64+12+12], *str = buf; 238 char buf[64+12+12], *str = buf;
221 char *token[3]; 239 char *token[3];
@@ -264,28 +282,12 @@ static int __init phram_setup(const char *val)
264 return ret; 282 return ret;
265} 283}
266 284
267static int __init phram_param_call(const char *val, struct kernel_param *kp) 285module_param_call(phram, phram_setup, NULL, NULL, 000);
268{
269 /*
270 * This function is always called before 'init_phram()', whether
271 * built-in or module.
272 */
273 if (strlen(val) >= sizeof(phram_paramline))
274 return -ENOSPC;
275 strcpy(phram_paramline, val);
276
277 return 0;
278}
279
280module_param_call(phram, phram_param_call, NULL, NULL, 000);
281MODULE_PARM_DESC(phram, "Memory region to map. \"phram=<name>,<start>,<length>\""); 286MODULE_PARM_DESC(phram, "Memory region to map. \"phram=<name>,<start>,<length>\"");
282 287
283 288
284static int __init init_phram(void) 289static int __init init_phram(void)
285{ 290{
286 if (phram_paramline[0])
287 return phram_setup(phram_paramline);
288
289 return 0; 291 return 0;
290} 292}
291 293
diff --git a/drivers/mtd/devices/pmc551.c b/drivers/mtd/devices/pmc551.c
index 0c51b988e1f..ecff765579d 100644
--- a/drivers/mtd/devices/pmc551.c
+++ b/drivers/mtd/devices/pmc551.c
@@ -93,49 +93,14 @@
93#include <linux/fs.h> 93#include <linux/fs.h>
94#include <linux/ioctl.h> 94#include <linux/ioctl.h>
95#include <asm/io.h> 95#include <asm/io.h>
96#include <asm/system.h>
96#include <linux/pci.h> 97#include <linux/pci.h>
97#include <linux/mtd/mtd.h>
98 98
99#define PMC551_VERSION \ 99#include <linux/mtd/mtd.h>
100 "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n" 100#include <linux/mtd/pmc551.h>
101
102#define PCI_VENDOR_ID_V3_SEMI 0x11b0
103#define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
104
105#define PMC551_PCI_MEM_MAP0 0x50
106#define PMC551_PCI_MEM_MAP1 0x54
107#define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
108#define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
109#define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
110#define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
111
112#define PMC551_SDRAM_MA 0x60
113#define PMC551_SDRAM_CMD 0x62
114#define PMC551_DRAM_CFG 0x64
115#define PMC551_SYS_CTRL_REG 0x78
116
117#define PMC551_DRAM_BLK0 0x68
118#define PMC551_DRAM_BLK1 0x6c
119#define PMC551_DRAM_BLK2 0x70
120#define PMC551_DRAM_BLK3 0x74
121#define PMC551_DRAM_BLK_GET_SIZE(x) (524288 << ((x >> 4) & 0x0f))
122#define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
123#define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
124
125struct mypriv {
126 struct pci_dev *dev;
127 u_char *start;
128 u32 base_map0;
129 u32 curr_map0;
130 u32 asize;
131 struct mtd_info *nextpmc551;
132};
133 101
134static struct mtd_info *pmc551list; 102static struct mtd_info *pmc551list;
135 103
136static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
137 size_t *retlen, void **virt, resource_size_t *phys);
138
139static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr) 104static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
140{ 105{
141 struct mypriv *priv = mtd->priv; 106 struct mypriv *priv = mtd->priv;
@@ -151,6 +116,16 @@ static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
151#endif 116#endif
152 117
153 end = instr->addr + instr->len - 1; 118 end = instr->addr + instr->len - 1;
119
120 /* Is it past the end? */
121 if (end > mtd->size) {
122#ifdef CONFIG_MTD_PMC551_DEBUG
123 printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n",
124 (long)end, (long)mtd->size);
125#endif
126 return -EINVAL;
127 }
128
154 eoff_hi = end & ~(priv->asize - 1); 129 eoff_hi = end & ~(priv->asize - 1);
155 soff_hi = instr->addr & ~(priv->asize - 1); 130 soff_hi = instr->addr & ~(priv->asize - 1);
156 eoff_lo = end & (priv->asize - 1); 131 eoff_lo = end & (priv->asize - 1);
@@ -204,6 +179,18 @@ static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
204 printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len); 179 printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
205#endif 180#endif
206 181
182 if (from + len > mtd->size) {
183#ifdef CONFIG_MTD_PMC551_DEBUG
184 printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n",
185 (long)from + len, (long)mtd->size);
186#endif
187 return -EINVAL;
188 }
189
190 /* can we return a physical address with this driver? */
191 if (phys)
192 return -EINVAL;
193
207 soff_hi = from & ~(priv->asize - 1); 194 soff_hi = from & ~(priv->asize - 1);
208 soff_lo = from & (priv->asize - 1); 195 soff_lo = from & (priv->asize - 1);
209 196
@@ -219,12 +206,11 @@ static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
219 return 0; 206 return 0;
220} 207}
221 208
222static int pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len) 209static void pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
223{ 210{
224#ifdef CONFIG_MTD_PMC551_DEBUG 211#ifdef CONFIG_MTD_PMC551_DEBUG
225 printk(KERN_DEBUG "pmc551_unpoint()\n"); 212 printk(KERN_DEBUG "pmc551_unpoint()\n");
226#endif 213#endif
227 return 0;
228} 214}
229 215
230static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len, 216static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
@@ -243,6 +229,16 @@ static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
243#endif 229#endif
244 230
245 end = from + len - 1; 231 end = from + len - 1;
232
233 /* Is it past the end? */
234 if (end > mtd->size) {
235#ifdef CONFIG_MTD_PMC551_DEBUG
236 printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n",
237 (long)end, (long)mtd->size);
238#endif
239 return -EINVAL;
240 }
241
246 soff_hi = from & ~(priv->asize - 1); 242 soff_hi = from & ~(priv->asize - 1);
247 eoff_hi = end & ~(priv->asize - 1); 243 eoff_hi = end & ~(priv->asize - 1);
248 soff_lo = from & (priv->asize - 1); 244 soff_lo = from & (priv->asize - 1);
@@ -300,6 +296,16 @@ static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
300#endif 296#endif
301 297
302 end = to + len - 1; 298 end = to + len - 1;
299 /* Is it past the end? or did the u32 wrap? */
300 if (end > mtd->size) {
301#ifdef CONFIG_MTD_PMC551_DEBUG
302 printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, "
303 "size: %ld, to: %ld)\n", (long)end, (long)mtd->size,
304 (long)to);
305#endif
306 return -EINVAL;
307 }
308
303 soff_hi = to & ~(priv->asize - 1); 309 soff_hi = to & ~(priv->asize - 1);
304 eoff_hi = end & ~(priv->asize - 1); 310 eoff_hi = end & ~(priv->asize - 1);
305 soff_lo = to & (priv->asize - 1); 311 soff_lo = to & (priv->asize - 1);
@@ -353,7 +359,7 @@ static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
353 * mechanism 359 * mechanism
354 * returns the size of the memory region found. 360 * returns the size of the memory region found.
355 */ 361 */
356static int fixup_pmc551(struct pci_dev *dev) 362static u32 fixup_pmc551(struct pci_dev *dev)
357{ 363{
358#ifdef CONFIG_MTD_PMC551_BUGFIX 364#ifdef CONFIG_MTD_PMC551_BUGFIX
359 u32 dram_data; 365 u32 dram_data;
@@ -663,7 +669,7 @@ static int __init init_pmc551(void)
663 struct mypriv *priv; 669 struct mypriv *priv;
664 int found = 0; 670 int found = 0;
665 struct mtd_info *mtd; 671 struct mtd_info *mtd;
666 int length = 0; 672 u32 length = 0;
667 673
668 if (msize) { 674 if (msize) {
669 msize = (1 << (ffs(msize) - 1)) << 20; 675 msize = (1 << (ffs(msize) - 1)) << 20;
@@ -781,11 +787,11 @@ static int __init init_pmc551(void)
781 787
782 mtd->size = msize; 788 mtd->size = msize;
783 mtd->flags = MTD_CAP_RAM; 789 mtd->flags = MTD_CAP_RAM;
784 mtd->_erase = pmc551_erase; 790 mtd->erase = pmc551_erase;
785 mtd->_read = pmc551_read; 791 mtd->read = pmc551_read;
786 mtd->_write = pmc551_write; 792 mtd->write = pmc551_write;
787 mtd->_point = pmc551_point; 793 mtd->point = pmc551_point;
788 mtd->_unpoint = pmc551_unpoint; 794 mtd->unpoint = pmc551_unpoint;
789 mtd->type = MTD_RAM; 795 mtd->type = MTD_RAM;
790 mtd->name = "PMC551 RAM board"; 796 mtd->name = "PMC551 RAM board";
791 mtd->erasesize = 0x10000; 797 mtd->erasesize = 0x10000;
diff --git a/drivers/mtd/devices/slram.c b/drivers/mtd/devices/slram.c
index 5a5cd2ace4a..e585263161b 100644
--- a/drivers/mtd/devices/slram.c
+++ b/drivers/mtd/devices/slram.c
@@ -42,6 +42,7 @@
42#include <linux/ioctl.h> 42#include <linux/ioctl.h>
43#include <linux/init.h> 43#include <linux/init.h>
44#include <asm/io.h> 44#include <asm/io.h>
45#include <asm/system.h>
45 46
46#include <linux/mtd/mtd.h> 47#include <linux/mtd/mtd.h>
47 48
@@ -75,7 +76,7 @@ static slram_mtd_list_t *slram_mtdlist = NULL;
75static int slram_erase(struct mtd_info *, struct erase_info *); 76static int slram_erase(struct mtd_info *, struct erase_info *);
76static int slram_point(struct mtd_info *, loff_t, size_t, size_t *, void **, 77static int slram_point(struct mtd_info *, loff_t, size_t, size_t *, void **,
77 resource_size_t *); 78 resource_size_t *);
78static int slram_unpoint(struct mtd_info *, loff_t, size_t); 79static void slram_unpoint(struct mtd_info *, loff_t, size_t);
79static int slram_read(struct mtd_info *, loff_t, size_t, size_t *, u_char *); 80static int slram_read(struct mtd_info *, loff_t, size_t, size_t *, u_char *);
80static int slram_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); 81static int slram_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
81 82
@@ -83,13 +84,21 @@ static int slram_erase(struct mtd_info *mtd, struct erase_info *instr)
83{ 84{
84 slram_priv_t *priv = mtd->priv; 85 slram_priv_t *priv = mtd->priv;
85 86
87 if (instr->addr + instr->len > mtd->size) {
88 return(-EINVAL);
89 }
90
86 memset(priv->start + instr->addr, 0xff, instr->len); 91 memset(priv->start + instr->addr, 0xff, instr->len);
92
87 /* This'll catch a few races. Free the thing before returning :) 93 /* This'll catch a few races. Free the thing before returning :)
88 * I don't feel at all ashamed. This kind of thing is possible anyway 94 * I don't feel at all ashamed. This kind of thing is possible anyway
89 * with flash, but unlikely. 95 * with flash, but unlikely.
90 */ 96 */
97
91 instr->state = MTD_ERASE_DONE; 98 instr->state = MTD_ERASE_DONE;
99
92 mtd_erase_callback(instr); 100 mtd_erase_callback(instr);
101
93 return(0); 102 return(0);
94} 103}
95 104
@@ -98,14 +107,20 @@ static int slram_point(struct mtd_info *mtd, loff_t from, size_t len,
98{ 107{
99 slram_priv_t *priv = mtd->priv; 108 slram_priv_t *priv = mtd->priv;
100 109
110 /* can we return a physical address with this driver? */
111 if (phys)
112 return -EINVAL;
113
114 if (from + len > mtd->size)
115 return -EINVAL;
116
101 *virt = priv->start + from; 117 *virt = priv->start + from;
102 *retlen = len; 118 *retlen = len;
103 return(0); 119 return(0);
104} 120}
105 121
106static int slram_unpoint(struct mtd_info *mtd, loff_t from, size_t len) 122static void slram_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
107{ 123{
108 return 0;
109} 124}
110 125
111static int slram_read(struct mtd_info *mtd, loff_t from, size_t len, 126static int slram_read(struct mtd_info *mtd, loff_t from, size_t len,
@@ -113,7 +128,14 @@ static int slram_read(struct mtd_info *mtd, loff_t from, size_t len,
113{ 128{
114 slram_priv_t *priv = mtd->priv; 129 slram_priv_t *priv = mtd->priv;
115 130
131 if (from > mtd->size)
132 return -EINVAL;
133
134 if (from + len > mtd->size)
135 len = mtd->size - from;
136
116 memcpy(buf, priv->start + from, len); 137 memcpy(buf, priv->start + from, len);
138
117 *retlen = len; 139 *retlen = len;
118 return(0); 140 return(0);
119} 141}
@@ -123,7 +145,11 @@ static int slram_write(struct mtd_info *mtd, loff_t to, size_t len,
123{ 145{
124 slram_priv_t *priv = mtd->priv; 146 slram_priv_t *priv = mtd->priv;
125 147
148 if (to + len > mtd->size)
149 return -EINVAL;
150
126 memcpy(priv->start + to, buf, len); 151 memcpy(priv->start + to, buf, len);
152
127 *retlen = len; 153 *retlen = len;
128 return(0); 154 return(0);
129} 155}
@@ -174,11 +200,11 @@ static int register_device(char *name, unsigned long start, unsigned long length
174 (*curmtd)->mtdinfo->name = name; 200 (*curmtd)->mtdinfo->name = name;
175 (*curmtd)->mtdinfo->size = length; 201 (*curmtd)->mtdinfo->size = length;
176 (*curmtd)->mtdinfo->flags = MTD_CAP_RAM; 202 (*curmtd)->mtdinfo->flags = MTD_CAP_RAM;
177 (*curmtd)->mtdinfo->_erase = slram_erase; 203 (*curmtd)->mtdinfo->erase = slram_erase;
178 (*curmtd)->mtdinfo->_point = slram_point; 204 (*curmtd)->mtdinfo->point = slram_point;
179 (*curmtd)->mtdinfo->_unpoint = slram_unpoint; 205 (*curmtd)->mtdinfo->unpoint = slram_unpoint;
180 (*curmtd)->mtdinfo->_read = slram_read; 206 (*curmtd)->mtdinfo->read = slram_read;
181 (*curmtd)->mtdinfo->_write = slram_write; 207 (*curmtd)->mtdinfo->write = slram_write;
182 (*curmtd)->mtdinfo->owner = THIS_MODULE; 208 (*curmtd)->mtdinfo->owner = THIS_MODULE;
183 (*curmtd)->mtdinfo->type = MTD_RAM; 209 (*curmtd)->mtdinfo->type = MTD_RAM;
184 (*curmtd)->mtdinfo->erasesize = SLRAM_BLK_SZ; 210 (*curmtd)->mtdinfo->erasesize = SLRAM_BLK_SZ;
@@ -240,7 +266,7 @@ static int parse_cmdline(char *devname, char *szstart, char *szlength)
240 266
241 if (*(szlength) != '+') { 267 if (*(szlength) != '+') {
242 devlength = simple_strtoul(szlength, &buffer, 0); 268 devlength = simple_strtoul(szlength, &buffer, 0);
243 devlength = handle_unit(devlength, buffer); 269 devlength = handle_unit(devlength, buffer) - devstart;
244 if (devlength < devstart) 270 if (devlength < devstart)
245 goto err_out; 271 goto err_out;
246 272
diff --git a/drivers/mtd/devices/spear_smi.c b/drivers/mtd/devices/spear_smi.c
deleted file mode 100644
index 2aabd96bf0f..00000000000
--- a/drivers/mtd/devices/spear_smi.c
+++ /dev/null
@@ -1,1101 +0,0 @@
1/*
2 * SMI (Serial Memory Controller) device driver for Serial NOR Flash on
3 * SPEAr platform
4 * The serial nor interface is largely based on drivers/mtd/m25p80.c,
5 * however the SPI interface has been replaced by SMI.
6 *
7 * Copyright © 2010 STMicroelectronics.
8 * Ashish Priyadarshi
9 * Shiraz Hashim <shiraz.hashim@st.com>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15
16#include <linux/clk.h>
17#include <linux/delay.h>
18#include <linux/device.h>
19#include <linux/err.h>
20#include <linux/errno.h>
21#include <linux/interrupt.h>
22#include <linux/io.h>
23#include <linux/ioport.h>
24#include <linux/jiffies.h>
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/param.h>
28#include <linux/platform_device.h>
29#include <linux/pm.h>
30#include <linux/mtd/mtd.h>
31#include <linux/mtd/partitions.h>
32#include <linux/mtd/spear_smi.h>
33#include <linux/mutex.h>
34#include <linux/sched.h>
35#include <linux/slab.h>
36#include <linux/wait.h>
37#include <linux/of.h>
38#include <linux/of_address.h>
39
40/* SMI clock rate */
41#define SMI_MAX_CLOCK_FREQ 50000000 /* 50 MHz */
42
43/* MAX time out to safely come out of a erase or write busy conditions */
44#define SMI_PROBE_TIMEOUT (HZ / 10)
45#define SMI_MAX_TIME_OUT (3 * HZ)
46
47/* timeout for command completion */
48#define SMI_CMD_TIMEOUT (HZ / 10)
49
50/* registers of smi */
51#define SMI_CR1 0x0 /* SMI control register 1 */
52#define SMI_CR2 0x4 /* SMI control register 2 */
53#define SMI_SR 0x8 /* SMI status register */
54#define SMI_TR 0xC /* SMI transmit register */
55#define SMI_RR 0x10 /* SMI receive register */
56
57/* defines for control_reg 1 */
58#define BANK_EN (0xF << 0) /* enables all banks */
59#define DSEL_TIME (0x6 << 4) /* Deselect time 6 + 1 SMI_CK periods */
60#define SW_MODE (0x1 << 28) /* enables SW Mode */
61#define WB_MODE (0x1 << 29) /* Write Burst Mode */
62#define FAST_MODE (0x1 << 15) /* Fast Mode */
63#define HOLD1 (0x1 << 16) /* Clock Hold period selection */
64
65/* defines for control_reg 2 */
66#define SEND (0x1 << 7) /* Send data */
67#define TFIE (0x1 << 8) /* Transmission Flag Interrupt Enable */
68#define WCIE (0x1 << 9) /* Write Complete Interrupt Enable */
69#define RD_STATUS_REG (0x1 << 10) /* reads status reg */
70#define WE (0x1 << 11) /* Write Enable */
71
72#define TX_LEN_SHIFT 0
73#define RX_LEN_SHIFT 4
74#define BANK_SHIFT 12
75
76/* defines for status register */
77#define SR_WIP 0x1 /* Write in progress */
78#define SR_WEL 0x2 /* Write enable latch */
79#define SR_BP0 0x4 /* Block protect 0 */
80#define SR_BP1 0x8 /* Block protect 1 */
81#define SR_BP2 0x10 /* Block protect 2 */
82#define SR_SRWD 0x80 /* SR write protect */
83#define TFF 0x100 /* Transfer Finished Flag */
84#define WCF 0x200 /* Transfer Finished Flag */
85#define ERF1 0x400 /* Forbidden Write Request */
86#define ERF2 0x800 /* Forbidden Access */
87
88#define WM_SHIFT 12
89
90/* flash opcodes */
91#define OPCODE_RDID 0x9f /* Read JEDEC ID */
92
93/* Flash Device Ids maintenance section */
94
95/* data structure to maintain flash ids from different vendors */
96struct flash_device {
97 char *name;
98 u8 erase_cmd;
99 u32 device_id;
100 u32 pagesize;
101 unsigned long sectorsize;
102 unsigned long size_in_bytes;
103};
104
105#define FLASH_ID(n, es, id, psize, ssize, size) \
106{ \
107 .name = n, \
108 .erase_cmd = es, \
109 .device_id = id, \
110 .pagesize = psize, \
111 .sectorsize = ssize, \
112 .size_in_bytes = size \
113}
114
115static struct flash_device flash_devices[] = {
116 FLASH_ID("st m25p16" , 0xd8, 0x00152020, 0x100, 0x10000, 0x200000),
117 FLASH_ID("st m25p32" , 0xd8, 0x00162020, 0x100, 0x10000, 0x400000),
118 FLASH_ID("st m25p64" , 0xd8, 0x00172020, 0x100, 0x10000, 0x800000),
119 FLASH_ID("st m25p128" , 0xd8, 0x00182020, 0x100, 0x40000, 0x1000000),
120 FLASH_ID("st m25p05" , 0xd8, 0x00102020, 0x80 , 0x8000 , 0x10000),
121 FLASH_ID("st m25p10" , 0xd8, 0x00112020, 0x80 , 0x8000 , 0x20000),
122 FLASH_ID("st m25p20" , 0xd8, 0x00122020, 0x100, 0x10000, 0x40000),
123 FLASH_ID("st m25p40" , 0xd8, 0x00132020, 0x100, 0x10000, 0x80000),
124 FLASH_ID("st m25p80" , 0xd8, 0x00142020, 0x100, 0x10000, 0x100000),
125 FLASH_ID("st m45pe10" , 0xd8, 0x00114020, 0x100, 0x10000, 0x20000),
126 FLASH_ID("st m45pe20" , 0xd8, 0x00124020, 0x100, 0x10000, 0x40000),
127 FLASH_ID("st m45pe40" , 0xd8, 0x00134020, 0x100, 0x10000, 0x80000),
128 FLASH_ID("st m45pe80" , 0xd8, 0x00144020, 0x100, 0x10000, 0x100000),
129 FLASH_ID("sp s25fl004" , 0xd8, 0x00120201, 0x100, 0x10000, 0x80000),
130 FLASH_ID("sp s25fl008" , 0xd8, 0x00130201, 0x100, 0x10000, 0x100000),
131 FLASH_ID("sp s25fl016" , 0xd8, 0x00140201, 0x100, 0x10000, 0x200000),
132 FLASH_ID("sp s25fl032" , 0xd8, 0x00150201, 0x100, 0x10000, 0x400000),
133 FLASH_ID("sp s25fl064" , 0xd8, 0x00160201, 0x100, 0x10000, 0x800000),
134 FLASH_ID("atmel 25f512" , 0x52, 0x0065001F, 0x80 , 0x8000 , 0x10000),
135 FLASH_ID("atmel 25f1024" , 0x52, 0x0060001F, 0x100, 0x8000 , 0x20000),
136 FLASH_ID("atmel 25f2048" , 0x52, 0x0063001F, 0x100, 0x10000, 0x40000),
137 FLASH_ID("atmel 25f4096" , 0x52, 0x0064001F, 0x100, 0x10000, 0x80000),
138 FLASH_ID("atmel 25fs040" , 0xd7, 0x0004661F, 0x100, 0x10000, 0x80000),
139 FLASH_ID("mac 25l512" , 0xd8, 0x001020C2, 0x010, 0x10000, 0x10000),
140 FLASH_ID("mac 25l1005" , 0xd8, 0x001120C2, 0x010, 0x10000, 0x20000),
141 FLASH_ID("mac 25l2005" , 0xd8, 0x001220C2, 0x010, 0x10000, 0x40000),
142 FLASH_ID("mac 25l4005" , 0xd8, 0x001320C2, 0x010, 0x10000, 0x80000),
143 FLASH_ID("mac 25l4005a" , 0xd8, 0x001320C2, 0x010, 0x10000, 0x80000),
144 FLASH_ID("mac 25l8005" , 0xd8, 0x001420C2, 0x010, 0x10000, 0x100000),
145 FLASH_ID("mac 25l1605" , 0xd8, 0x001520C2, 0x100, 0x10000, 0x200000),
146 FLASH_ID("mac 25l1605a" , 0xd8, 0x001520C2, 0x010, 0x10000, 0x200000),
147 FLASH_ID("mac 25l3205" , 0xd8, 0x001620C2, 0x100, 0x10000, 0x400000),
148 FLASH_ID("mac 25l3205a" , 0xd8, 0x001620C2, 0x100, 0x10000, 0x400000),
149 FLASH_ID("mac 25l6405" , 0xd8, 0x001720C2, 0x100, 0x10000, 0x800000),
150};
151
152/* Define spear specific structures */
153
154struct spear_snor_flash;
155
156/**
157 * struct spear_smi - Structure for SMI Device
158 *
159 * @clk: functional clock
160 * @status: current status register of SMI.
161 * @clk_rate: functional clock rate of SMI (default: SMI_MAX_CLOCK_FREQ)
162 * @lock: lock to prevent parallel access of SMI.
163 * @io_base: base address for registers of SMI.
164 * @pdev: platform device
165 * @cmd_complete: queue to wait for command completion of NOR-flash.
166 * @num_flashes: number of flashes actually present on board.
167 * @flash: separate structure for each Serial NOR-flash attached to SMI.
168 */
169struct spear_smi {
170 struct clk *clk;
171 u32 status;
172 unsigned long clk_rate;
173 struct mutex lock;
174 void __iomem *io_base;
175 struct platform_device *pdev;
176 wait_queue_head_t cmd_complete;
177 u32 num_flashes;
178 struct spear_snor_flash *flash[MAX_NUM_FLASH_CHIP];
179};
180
181/**
182 * struct spear_snor_flash - Structure for Serial NOR Flash
183 *
184 * @bank: Bank number(0, 1, 2, 3) for each NOR-flash.
185 * @dev_id: Device ID of NOR-flash.
186 * @lock: lock to manage flash read, write and erase operations
187 * @mtd: MTD info for each NOR-flash.
188 * @num_parts: Total number of partition in each bank of NOR-flash.
189 * @parts: Partition info for each bank of NOR-flash.
190 * @page_size: Page size of NOR-flash.
191 * @base_addr: Base address of NOR-flash.
192 * @erase_cmd: erase command may vary on different flash types
193 * @fast_mode: flash supports read in fast mode
194 */
195struct spear_snor_flash {
196 u32 bank;
197 u32 dev_id;
198 struct mutex lock;
199 struct mtd_info mtd;
200 u32 num_parts;
201 struct mtd_partition *parts;
202 u32 page_size;
203 void __iomem *base_addr;
204 u8 erase_cmd;
205 u8 fast_mode;
206};
207
208static inline struct spear_snor_flash *get_flash_data(struct mtd_info *mtd)
209{
210 return container_of(mtd, struct spear_snor_flash, mtd);
211}
212
213/**
214 * spear_smi_read_sr - Read status register of flash through SMI
215 * @dev: structure of SMI information.
216 * @bank: bank to which flash is connected
217 *
218 * This routine will return the status register of the flash chip present at the
219 * given bank.
220 */
221static int spear_smi_read_sr(struct spear_smi *dev, u32 bank)
222{
223 int ret;
224 u32 ctrlreg1;
225
226 mutex_lock(&dev->lock);
227 dev->status = 0; /* Will be set in interrupt handler */
228
229 ctrlreg1 = readl(dev->io_base + SMI_CR1);
230 /* program smi in hw mode */
231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1);
232
233 /* performing a rsr instruction in hw mode */
234 writel((bank << BANK_SHIFT) | RD_STATUS_REG | TFIE,
235 dev->io_base + SMI_CR2);
236
237 /* wait for tff */
238 ret = wait_event_interruptible_timeout(dev->cmd_complete,
239 dev->status & TFF, SMI_CMD_TIMEOUT);
240
241 /* copy dev->status (lower 16 bits) in order to release lock */
242 if (ret > 0)
243 ret = dev->status & 0xffff;
244 else if (ret == 0)
245 ret = -ETIMEDOUT;
246
247 /* restore the ctrl regs state */
248 writel(ctrlreg1, dev->io_base + SMI_CR1);
249 writel(0, dev->io_base + SMI_CR2);
250 mutex_unlock(&dev->lock);
251
252 return ret;
253}
254
255/**
256 * spear_smi_wait_till_ready - wait till flash is ready
257 * @dev: structure of SMI information.
258 * @bank: flash corresponding to this bank
259 * @timeout: timeout for busy wait condition
260 *
261 * This routine checks for WIP (write in progress) bit in Status register
262 * If successful the routine returns 0 else -EBUSY
263 */
264static int spear_smi_wait_till_ready(struct spear_smi *dev, u32 bank,
265 unsigned long timeout)
266{
267 unsigned long finish;
268 int status;
269
270 finish = jiffies + timeout;
271 do {
272 status = spear_smi_read_sr(dev, bank);
273 if (status < 0) {
274 if (status == -ETIMEDOUT)
275 continue; /* try till finish */
276 return status;
277 } else if (!(status & SR_WIP)) {
278 return 0;
279 }
280
281 cond_resched();
282 } while (!time_after_eq(jiffies, finish));
283
284 dev_err(&dev->pdev->dev, "smi controller is busy, timeout\n");
285 return -EBUSY;
286}
287
288/**
289 * spear_smi_int_handler - SMI Interrupt Handler.
290 * @irq: irq number
291 * @dev_id: structure of SMI device, embedded in dev_id.
292 *
293 * The handler clears all interrupt conditions and records the status in
294 * dev->status which is used by the driver later.
295 */
296static irqreturn_t spear_smi_int_handler(int irq, void *dev_id)
297{
298 u32 status = 0;
299 struct spear_smi *dev = dev_id;
300
301 status = readl(dev->io_base + SMI_SR);
302
303 if (unlikely(!status))
304 return IRQ_NONE;
305
306 /* clear all interrupt conditions */
307 writel(0, dev->io_base + SMI_SR);
308
309 /* copy the status register in dev->status */
310 dev->status |= status;
311
312 /* send the completion */
313 wake_up_interruptible(&dev->cmd_complete);
314
315 return IRQ_HANDLED;
316}
317
318/**
319 * spear_smi_hw_init - initializes the smi controller.
320 * @dev: structure of smi device
321 *
322 * this routine initializes the smi controller wit the default values
323 */
324static void spear_smi_hw_init(struct spear_smi *dev)
325{
326 unsigned long rate = 0;
327 u32 prescale = 0;
328 u32 val;
329
330 rate = clk_get_rate(dev->clk);
331
332 /* functional clock of smi */
333 prescale = DIV_ROUND_UP(rate, dev->clk_rate);
334
335 /*
336 * setting the standard values, fast mode, prescaler for
337 * SMI_MAX_CLOCK_FREQ (50MHz) operation and bank enable
338 */
339 val = HOLD1 | BANK_EN | DSEL_TIME | (prescale << 8);
340
341 mutex_lock(&dev->lock);
342 /* clear all interrupt conditions */
343 writel(0, dev->io_base + SMI_SR);
344
345 writel(val, dev->io_base + SMI_CR1);
346 mutex_unlock(&dev->lock);
347}
348
349/**
350 * get_flash_index - match chip id from a flash list.
351 * @flash_id: a valid nor flash chip id obtained from board.
352 *
353 * try to validate the chip id by matching from a list, if not found then simply
354 * returns negative. In case of success returns index in to the flash devices
355 * array.
356 */
357static int get_flash_index(u32 flash_id)
358{
359 int index;
360
361 /* Matches chip-id to entire list of 'serial-nor flash' ids */
362 for (index = 0; index < ARRAY_SIZE(flash_devices); index++) {
363 if (flash_devices[index].device_id == flash_id)
364 return index;
365 }
366
367 /* Memory chip is not listed and not supported */
368 return -ENODEV;
369}
370
371/**
372 * spear_smi_write_enable - Enable the flash to do write operation
373 * @dev: structure of SMI device
374 * @bank: enable write for flash connected to this bank
375 *
376 * Set write enable latch with Write Enable command.
377 * Returns 0 on success.
378 */
379static int spear_smi_write_enable(struct spear_smi *dev, u32 bank)
380{
381 int ret;
382 u32 ctrlreg1;
383
384 mutex_lock(&dev->lock);
385 dev->status = 0; /* Will be set in interrupt handler */
386
387 ctrlreg1 = readl(dev->io_base + SMI_CR1);
388 /* program smi in h/w mode */
389 writel(ctrlreg1 & ~SW_MODE, dev->io_base + SMI_CR1);
390
391 /* give the flash, write enable command */
392 writel((bank << BANK_SHIFT) | WE | TFIE, dev->io_base + SMI_CR2);
393
394 ret = wait_event_interruptible_timeout(dev->cmd_complete,
395 dev->status & TFF, SMI_CMD_TIMEOUT);
396
397 /* restore the ctrl regs state */
398 writel(ctrlreg1, dev->io_base + SMI_CR1);
399 writel(0, dev->io_base + SMI_CR2);
400
401 if (ret == 0) {
402 ret = -EIO;
403 dev_err(&dev->pdev->dev,
404 "smi controller failed on write enable\n");
405 } else if (ret > 0) {
406 /* check whether write mode status is set for required bank */
407 if (dev->status & (1 << (bank + WM_SHIFT)))
408 ret = 0;
409 else {
410 dev_err(&dev->pdev->dev, "couldn't enable write\n");
411 ret = -EIO;
412 }
413 }
414
415 mutex_unlock(&dev->lock);
416 return ret;
417}
418
419static inline u32
420get_sector_erase_cmd(struct spear_snor_flash *flash, u32 offset)
421{
422 u32 cmd;
423 u8 *x = (u8 *)&cmd;
424
425 x[0] = flash->erase_cmd;
426 x[1] = offset >> 16;
427 x[2] = offset >> 8;
428 x[3] = offset;
429
430 return cmd;
431}
432
433/**
434 * spear_smi_erase_sector - erase one sector of flash
435 * @dev: structure of SMI information
436 * @command: erase command to be send
437 * @bank: bank to which this command needs to be send
438 * @bytes: size of command
439 *
440 * Erase one sector of flash memory at offset ``offset'' which is any
441 * address within the sector which should be erased.
442 * Returns 0 if successful, non-zero otherwise.
443 */
444static int spear_smi_erase_sector(struct spear_smi *dev,
445 u32 bank, u32 command, u32 bytes)
446{
447 u32 ctrlreg1 = 0;
448 int ret;
449
450 ret = spear_smi_wait_till_ready(dev, bank, SMI_MAX_TIME_OUT);
451 if (ret)
452 return ret;
453
454 ret = spear_smi_write_enable(dev, bank);
455 if (ret)
456 return ret;
457
458 mutex_lock(&dev->lock);
459
460 ctrlreg1 = readl(dev->io_base + SMI_CR1);
461 writel((ctrlreg1 | SW_MODE) & ~WB_MODE, dev->io_base + SMI_CR1);
462
463 /* send command in sw mode */
464 writel(command, dev->io_base + SMI_TR);
465
466 writel((bank << BANK_SHIFT) | SEND | TFIE | (bytes << TX_LEN_SHIFT),
467 dev->io_base + SMI_CR2);
468
469 ret = wait_event_interruptible_timeout(dev->cmd_complete,
470 dev->status & TFF, SMI_CMD_TIMEOUT);
471
472 if (ret == 0) {
473 ret = -EIO;
474 dev_err(&dev->pdev->dev, "sector erase failed\n");
475 } else if (ret > 0)
476 ret = 0; /* success */
477
478 /* restore ctrl regs */
479 writel(ctrlreg1, dev->io_base + SMI_CR1);
480 writel(0, dev->io_base + SMI_CR2);
481
482 mutex_unlock(&dev->lock);
483 return ret;
484}
485
486/**
487 * spear_mtd_erase - perform flash erase operation as requested by user
488 * @mtd: Provides the memory characteristics
489 * @e_info: Provides the erase information
490 *
491 * Erase an address range on the flash chip. The address range may extend
492 * one or more erase sectors. Return an error is there is a problem erasing.
493 */
494static int spear_mtd_erase(struct mtd_info *mtd, struct erase_info *e_info)
495{
496 struct spear_snor_flash *flash = get_flash_data(mtd);
497 struct spear_smi *dev = mtd->priv;
498 u32 addr, command, bank;
499 int len, ret;
500
501 if (!flash || !dev)
502 return -ENODEV;
503
504 bank = flash->bank;
505 if (bank > dev->num_flashes - 1) {
506 dev_err(&dev->pdev->dev, "Invalid Bank Num");
507 return -EINVAL;
508 }
509
510 addr = e_info->addr;
511 len = e_info->len;
512
513 mutex_lock(&flash->lock);
514
515 /* now erase sectors in loop */
516 while (len) {
517 command = get_sector_erase_cmd(flash, addr);
518 /* preparing the command for flash */
519 ret = spear_smi_erase_sector(dev, bank, command, 4);
520 if (ret) {
521 e_info->state = MTD_ERASE_FAILED;
522 mutex_unlock(&flash->lock);
523 return ret;
524 }
525 addr += mtd->erasesize;
526 len -= mtd->erasesize;
527 }
528
529 mutex_unlock(&flash->lock);
530 e_info->state = MTD_ERASE_DONE;
531 mtd_erase_callback(e_info);
532
533 return 0;
534}
535
536/**
537 * spear_mtd_read - performs flash read operation as requested by the user
538 * @mtd: MTD information of the memory bank
539 * @from: Address from which to start read
540 * @len: Number of bytes to be read
541 * @retlen: Fills the Number of bytes actually read
542 * @buf: Fills this after reading
543 *
544 * Read an address range from the flash chip. The address range
545 * may be any size provided it is within the physical boundaries.
546 * Returns 0 on success, non zero otherwise
547 */
548static int spear_mtd_read(struct mtd_info *mtd, loff_t from, size_t len,
549 size_t *retlen, u8 *buf)
550{
551 struct spear_snor_flash *flash = get_flash_data(mtd);
552 struct spear_smi *dev = mtd->priv;
553 void *src;
554 u32 ctrlreg1, val;
555 int ret;
556
557 if (!flash || !dev)
558 return -ENODEV;
559
560 if (flash->bank > dev->num_flashes - 1) {
561 dev_err(&dev->pdev->dev, "Invalid Bank Num");
562 return -EINVAL;
563 }
564
565 /* select address as per bank number */
566 src = flash->base_addr + from;
567
568 mutex_lock(&flash->lock);
569
570 /* wait till previous write/erase is done. */
571 ret = spear_smi_wait_till_ready(dev, flash->bank, SMI_MAX_TIME_OUT);
572 if (ret) {
573 mutex_unlock(&flash->lock);
574 return ret;
575 }
576
577 mutex_lock(&dev->lock);
578 /* put smi in hw mode not wbt mode */
579 ctrlreg1 = val = readl(dev->io_base + SMI_CR1);
580 val &= ~(SW_MODE | WB_MODE);
581 if (flash->fast_mode)
582 val |= FAST_MODE;
583
584 writel(val, dev->io_base + SMI_CR1);
585
586 memcpy_fromio(buf, (u8 *)src, len);
587
588 /* restore ctrl reg1 */
589 writel(ctrlreg1, dev->io_base + SMI_CR1);
590 mutex_unlock(&dev->lock);
591
592 *retlen = len;
593 mutex_unlock(&flash->lock);
594
595 return 0;
596}
597
598static inline int spear_smi_cpy_toio(struct spear_smi *dev, u32 bank,
599 void *dest, const void *src, size_t len)
600{
601 int ret;
602 u32 ctrlreg1;
603
604 /* wait until finished previous write command. */
605 ret = spear_smi_wait_till_ready(dev, bank, SMI_MAX_TIME_OUT);
606 if (ret)
607 return ret;
608
609 /* put smi in write enable */
610 ret = spear_smi_write_enable(dev, bank);
611 if (ret)
612 return ret;
613
614 /* put smi in hw, write burst mode */
615 mutex_lock(&dev->lock);
616
617 ctrlreg1 = readl(dev->io_base + SMI_CR1);
618 writel((ctrlreg1 | WB_MODE) & ~SW_MODE, dev->io_base + SMI_CR1);
619
620 memcpy_toio(dest, src, len);
621
622 writel(ctrlreg1, dev->io_base + SMI_CR1);
623
624 mutex_unlock(&dev->lock);
625 return 0;
626}
627
628/**
629 * spear_mtd_write - performs write operation as requested by the user.
630 * @mtd: MTD information of the memory bank.
631 * @to: Address to write.
632 * @len: Number of bytes to be written.
633 * @retlen: Number of bytes actually wrote.
634 * @buf: Buffer from which the data to be taken.
635 *
636 * Write an address range to the flash chip. Data must be written in
637 * flash_page_size chunks. The address range may be any size provided
638 * it is within the physical boundaries.
639 * Returns 0 on success, non zero otherwise
640 */
641static int spear_mtd_write(struct mtd_info *mtd, loff_t to, size_t len,
642 size_t *retlen, const u8 *buf)
643{
644 struct spear_snor_flash *flash = get_flash_data(mtd);
645 struct spear_smi *dev = mtd->priv;
646 void *dest;
647 u32 page_offset, page_size;
648 int ret;
649
650 if (!flash || !dev)
651 return -ENODEV;
652
653 if (flash->bank > dev->num_flashes - 1) {
654 dev_err(&dev->pdev->dev, "Invalid Bank Num");
655 return -EINVAL;
656 }
657
658 /* select address as per bank number */
659 dest = flash->base_addr + to;
660 mutex_lock(&flash->lock);
661
662 page_offset = (u32)to % flash->page_size;
663
664 /* do if all the bytes fit onto one page */
665 if (page_offset + len <= flash->page_size) {
666 ret = spear_smi_cpy_toio(dev, flash->bank, dest, buf, len);
667 if (!ret)
668 *retlen += len;
669 } else {
670 u32 i;
671
672 /* the size of data remaining on the first page */
673 page_size = flash->page_size - page_offset;
674
675 ret = spear_smi_cpy_toio(dev, flash->bank, dest, buf,
676 page_size);
677 if (ret)
678 goto err_write;
679 else
680 *retlen += page_size;
681
682 /* write everything in pagesize chunks */
683 for (i = page_size; i < len; i += page_size) {
684 page_size = len - i;
685 if (page_size > flash->page_size)
686 page_size = flash->page_size;
687
688 ret = spear_smi_cpy_toio(dev, flash->bank, dest + i,
689 buf + i, page_size);
690 if (ret)
691 break;
692 else
693 *retlen += page_size;
694 }
695 }
696
697err_write:
698 mutex_unlock(&flash->lock);
699
700 return ret;
701}
702
703/**
704 * spear_smi_probe_flash - Detects the NOR Flash chip.
705 * @dev: structure of SMI information.
706 * @bank: bank on which flash must be probed
707 *
708 * This routine will check whether there exists a flash chip on a given memory
709 * bank ID.
710 * Return index of the probed flash in flash devices structure
711 */
712static int spear_smi_probe_flash(struct spear_smi *dev, u32 bank)
713{
714 int ret;
715 u32 val = 0;
716
717 ret = spear_smi_wait_till_ready(dev, bank, SMI_PROBE_TIMEOUT);
718 if (ret)
719 return ret;
720
721 mutex_lock(&dev->lock);
722
723 dev->status = 0; /* Will be set in interrupt handler */
724 /* put smi in sw mode */
725 val = readl(dev->io_base + SMI_CR1);
726 writel(val | SW_MODE, dev->io_base + SMI_CR1);
727
728 /* send readid command in sw mode */
729 writel(OPCODE_RDID, dev->io_base + SMI_TR);
730
731 val = (bank << BANK_SHIFT) | SEND | (1 << TX_LEN_SHIFT) |
732 (3 << RX_LEN_SHIFT) | TFIE;
733 writel(val, dev->io_base + SMI_CR2);
734
735 /* wait for TFF */
736 ret = wait_event_interruptible_timeout(dev->cmd_complete,
737 dev->status & TFF, SMI_CMD_TIMEOUT);
738 if (ret <= 0) {
739 ret = -ENODEV;
740 goto err_probe;
741 }
742
743 /* get memory chip id */
744 val = readl(dev->io_base + SMI_RR);
745 val &= 0x00ffffff;
746 ret = get_flash_index(val);
747
748err_probe:
749 /* clear sw mode */
750 val = readl(dev->io_base + SMI_CR1);
751 writel(val & ~SW_MODE, dev->io_base + SMI_CR1);
752
753 mutex_unlock(&dev->lock);
754 return ret;
755}
756
757
758#ifdef CONFIG_OF
759static int spear_smi_probe_config_dt(struct platform_device *pdev,
760 struct device_node *np)
761{
762 struct spear_smi_plat_data *pdata = dev_get_platdata(&pdev->dev);
763 struct device_node *pp = NULL;
764 const __be32 *addr;
765 u32 val;
766 int len;
767 int i = 0;
768
769 if (!np)
770 return -ENODEV;
771
772 of_property_read_u32(np, "clock-rate", &val);
773 pdata->clk_rate = val;
774
775 pdata->board_flash_info = devm_kzalloc(&pdev->dev,
776 sizeof(*pdata->board_flash_info),
777 GFP_KERNEL);
778
779 /* Fill structs for each subnode (flash device) */
780 while ((pp = of_get_next_child(np, pp))) {
781 struct spear_smi_flash_info *flash_info;
782
783 flash_info = &pdata->board_flash_info[i];
784 pdata->np[i] = pp;
785
786 /* Read base-addr and size from DT */
787 addr = of_get_property(pp, "reg", &len);
788 pdata->board_flash_info->mem_base = be32_to_cpup(&addr[0]);
789 pdata->board_flash_info->size = be32_to_cpup(&addr[1]);
790
791 if (of_get_property(pp, "st,smi-fast-mode", NULL))
792 pdata->board_flash_info->fast_mode = 1;
793
794 i++;
795 }
796
797 pdata->num_flashes = i;
798
799 return 0;
800}
801#else
802static int spear_smi_probe_config_dt(struct platform_device *pdev,
803 struct device_node *np)
804{
805 return -ENOSYS;
806}
807#endif
808
809static int spear_smi_setup_banks(struct platform_device *pdev,
810 u32 bank, struct device_node *np)
811{
812 struct spear_smi *dev = platform_get_drvdata(pdev);
813 struct mtd_part_parser_data ppdata = {};
814 struct spear_smi_flash_info *flash_info;
815 struct spear_smi_plat_data *pdata;
816 struct spear_snor_flash *flash;
817 struct mtd_partition *parts = NULL;
818 int count = 0;
819 int flash_index;
820 int ret = 0;
821
822 pdata = dev_get_platdata(&pdev->dev);
823 if (bank > pdata->num_flashes - 1)
824 return -EINVAL;
825
826 flash_info = &pdata->board_flash_info[bank];
827 if (!flash_info)
828 return -ENODEV;
829
830 flash = devm_kzalloc(&pdev->dev, sizeof(*flash), GFP_ATOMIC);
831 if (!flash)
832 return -ENOMEM;
833 flash->bank = bank;
834 flash->fast_mode = flash_info->fast_mode ? 1 : 0;
835 mutex_init(&flash->lock);
836
837 /* verify whether nor flash is really present on board */
838 flash_index = spear_smi_probe_flash(dev, bank);
839 if (flash_index < 0) {
840 dev_info(&dev->pdev->dev, "smi-nor%d not found\n", bank);
841 return flash_index;
842 }
843 /* map the memory for nor flash chip */
844 flash->base_addr = devm_ioremap(&pdev->dev, flash_info->mem_base,
845 flash_info->size);
846 if (!flash->base_addr)
847 return -EIO;
848
849 dev->flash[bank] = flash;
850 flash->mtd.priv = dev;
851
852 if (flash_info->name)
853 flash->mtd.name = flash_info->name;
854 else
855 flash->mtd.name = flash_devices[flash_index].name;
856
857 flash->mtd.type = MTD_NORFLASH;
858 flash->mtd.writesize = 1;
859 flash->mtd.flags = MTD_CAP_NORFLASH;
860 flash->mtd.size = flash_info->size;
861 flash->mtd.erasesize = flash_devices[flash_index].sectorsize;
862 flash->page_size = flash_devices[flash_index].pagesize;
863 flash->mtd.writebufsize = flash->page_size;
864 flash->erase_cmd = flash_devices[flash_index].erase_cmd;
865 flash->mtd._erase = spear_mtd_erase;
866 flash->mtd._read = spear_mtd_read;
867 flash->mtd._write = spear_mtd_write;
868 flash->dev_id = flash_devices[flash_index].device_id;
869
870 dev_info(&dev->pdev->dev, "mtd .name=%s .size=%llx(%lluM)\n",
871 flash->mtd.name, flash->mtd.size,
872 flash->mtd.size / (1024 * 1024));
873
874 dev_info(&dev->pdev->dev, ".erasesize = 0x%x(%uK)\n",
875 flash->mtd.erasesize, flash->mtd.erasesize / 1024);
876
877#ifndef CONFIG_OF
878 if (flash_info->partitions) {
879 parts = flash_info->partitions;
880 count = flash_info->nr_partitions;
881 }
882#endif
883 ppdata.of_node = np;
884
885 ret = mtd_device_parse_register(&flash->mtd, NULL, &ppdata, parts,
886 count);
887 if (ret) {
888 dev_err(&dev->pdev->dev, "Err MTD partition=%d\n", ret);
889 return ret;
890 }
891
892 return 0;
893}
894
895/**
896 * spear_smi_probe - Entry routine
897 * @pdev: platform device structure
898 *
899 * This is the first routine which gets invoked during booting and does all
900 * initialization/allocation work. The routine looks for available memory banks,
901 * and do proper init for any found one.
902 * Returns 0 on success, non zero otherwise
903 */
904static int spear_smi_probe(struct platform_device *pdev)
905{
906 struct device_node *np = pdev->dev.of_node;
907 struct spear_smi_plat_data *pdata = NULL;
908 struct spear_smi *dev;
909 struct resource *smi_base;
910 int irq, ret = 0;
911 int i;
912
913 if (np) {
914 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
915 if (!pdata) {
916 pr_err("%s: ERROR: no memory", __func__);
917 ret = -ENOMEM;
918 goto err;
919 }
920 pdev->dev.platform_data = pdata;
921 ret = spear_smi_probe_config_dt(pdev, np);
922 if (ret) {
923 ret = -ENODEV;
924 dev_err(&pdev->dev, "no platform data\n");
925 goto err;
926 }
927 } else {
928 pdata = dev_get_platdata(&pdev->dev);
929 if (!pdata) {
930 ret = -ENODEV;
931 dev_err(&pdev->dev, "no platform data\n");
932 goto err;
933 }
934 }
935
936 irq = platform_get_irq(pdev, 0);
937 if (irq < 0) {
938 ret = -ENODEV;
939 dev_err(&pdev->dev, "invalid smi irq\n");
940 goto err;
941 }
942
943 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_ATOMIC);
944 if (!dev) {
945 ret = -ENOMEM;
946 dev_err(&pdev->dev, "mem alloc fail\n");
947 goto err;
948 }
949
950 smi_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
951
952 dev->io_base = devm_request_and_ioremap(&pdev->dev, smi_base);
953 if (!dev->io_base) {
954 ret = -EIO;
955 dev_err(&pdev->dev, "devm_request_and_ioremap fail\n");
956 goto err;
957 }
958
959 dev->pdev = pdev;
960 dev->clk_rate = pdata->clk_rate;
961
962 if (dev->clk_rate > SMI_MAX_CLOCK_FREQ)
963 dev->clk_rate = SMI_MAX_CLOCK_FREQ;
964
965 dev->num_flashes = pdata->num_flashes;
966
967 if (dev->num_flashes > MAX_NUM_FLASH_CHIP) {
968 dev_err(&pdev->dev, "exceeding max number of flashes\n");
969 dev->num_flashes = MAX_NUM_FLASH_CHIP;
970 }
971
972 dev->clk = devm_clk_get(&pdev->dev, NULL);
973 if (IS_ERR(dev->clk)) {
974 ret = PTR_ERR(dev->clk);
975 goto err;
976 }
977
978 ret = clk_prepare_enable(dev->clk);
979 if (ret)
980 goto err;
981
982 ret = devm_request_irq(&pdev->dev, irq, spear_smi_int_handler, 0,
983 pdev->name, dev);
984 if (ret) {
985 dev_err(&dev->pdev->dev, "SMI IRQ allocation failed\n");
986 goto err_irq;
987 }
988
989 mutex_init(&dev->lock);
990 init_waitqueue_head(&dev->cmd_complete);
991 spear_smi_hw_init(dev);
992 platform_set_drvdata(pdev, dev);
993
994 /* loop for each serial nor-flash which is connected to smi */
995 for (i = 0; i < dev->num_flashes; i++) {
996 ret = spear_smi_setup_banks(pdev, i, pdata->np[i]);
997 if (ret) {
998 dev_err(&dev->pdev->dev, "bank setup failed\n");
999 goto err_bank_setup;
1000 }
1001 }
1002
1003 return 0;
1004
1005err_bank_setup:
1006 platform_set_drvdata(pdev, NULL);
1007err_irq:
1008 clk_disable_unprepare(dev->clk);
1009err:
1010 return ret;
1011}
1012
1013/**
1014 * spear_smi_remove - Exit routine
1015 * @pdev: platform device structure
1016 *
1017 * free all allocations and delete the partitions.
1018 */
1019static int spear_smi_remove(struct platform_device *pdev)
1020{
1021 struct spear_smi *dev;
1022 struct spear_snor_flash *flash;
1023 int ret, i;
1024
1025 dev = platform_get_drvdata(pdev);
1026 if (!dev) {
1027 dev_err(&pdev->dev, "dev is null\n");
1028 return -ENODEV;
1029 }
1030
1031 /* clean up for all nor flash */
1032 for (i = 0; i < dev->num_flashes; i++) {
1033 flash = dev->flash[i];
1034 if (!flash)
1035 continue;
1036
1037 /* clean up mtd stuff */
1038 ret = mtd_device_unregister(&flash->mtd);
1039 if (ret)
1040 dev_err(&pdev->dev, "error removing mtd\n");
1041 }
1042
1043 clk_disable_unprepare(dev->clk);
1044 platform_set_drvdata(pdev, NULL);
1045
1046 return 0;
1047}
1048
1049#ifdef CONFIG_PM
1050static int spear_smi_suspend(struct device *dev)
1051{
1052 struct spear_smi *sdev = dev_get_drvdata(dev);
1053
1054 if (sdev && sdev->clk)
1055 clk_disable_unprepare(sdev->clk);
1056
1057 return 0;
1058}
1059
1060static int spear_smi_resume(struct device *dev)
1061{
1062 struct spear_smi *sdev = dev_get_drvdata(dev);
1063 int ret = -EPERM;
1064
1065 if (sdev && sdev->clk)
1066 ret = clk_prepare_enable(sdev->clk);
1067
1068 if (!ret)
1069 spear_smi_hw_init(sdev);
1070 return ret;
1071}
1072
1073static SIMPLE_DEV_PM_OPS(spear_smi_pm_ops, spear_smi_suspend, spear_smi_resume);
1074#endif
1075
1076#ifdef CONFIG_OF
1077static const struct of_device_id spear_smi_id_table[] = {
1078 { .compatible = "st,spear600-smi" },
1079 {}
1080};
1081MODULE_DEVICE_TABLE(of, spear_smi_id_table);
1082#endif
1083
1084static struct platform_driver spear_smi_driver = {
1085 .driver = {
1086 .name = "smi",
1087 .bus = &platform_bus_type,
1088 .owner = THIS_MODULE,
1089 .of_match_table = of_match_ptr(spear_smi_id_table),
1090#ifdef CONFIG_PM
1091 .pm = &spear_smi_pm_ops,
1092#endif
1093 },
1094 .probe = spear_smi_probe,
1095 .remove = spear_smi_remove,
1096};
1097module_platform_driver(spear_smi_driver);
1098
1099MODULE_LICENSE("GPL");
1100MODULE_AUTHOR("Ashish Priyadarshi, Shiraz Hashim <shiraz.hashim@st.com>");
1101MODULE_DESCRIPTION("MTD SMI driver for serial nor flash chips");
diff --git a/drivers/mtd/devices/sst25l.c b/drivers/mtd/devices/sst25l.c
index 8091b016369..83e80c65d6e 100644
--- a/drivers/mtd/devices/sst25l.c
+++ b/drivers/mtd/devices/sst25l.c
@@ -52,6 +52,8 @@ struct sst25l_flash {
52 struct spi_device *spi; 52 struct spi_device *spi;
53 struct mutex lock; 53 struct mutex lock;
54 struct mtd_info mtd; 54 struct mtd_info mtd;
55
56 int partitioned;
55}; 57};
56 58
57struct flash_info { 59struct flash_info {
@@ -64,7 +66,7 @@ struct flash_info {
64 66
65#define to_sst25l_flash(x) container_of(x, struct sst25l_flash, mtd) 67#define to_sst25l_flash(x) container_of(x, struct sst25l_flash, mtd)
66 68
67static struct flash_info sst25l_flash_info[] = { 69static struct flash_info __devinitdata sst25l_flash_info[] = {
68 {"sst25lf020a", 0xbf43, 256, 1024, 4096}, 70 {"sst25lf020a", 0xbf43, 256, 1024, 4096},
69 {"sst25lf040a", 0xbf44, 256, 2048, 4096}, 71 {"sst25lf040a", 0xbf44, 256, 2048, 4096},
70}; 72};
@@ -175,6 +177,9 @@ static int sst25l_erase(struct mtd_info *mtd, struct erase_info *instr)
175 int err; 177 int err;
176 178
177 /* Sanity checks */ 179 /* Sanity checks */
180 if (instr->addr + instr->len > flash->mtd.size)
181 return -EINVAL;
182
178 if ((uint32_t)instr->len % mtd->erasesize) 183 if ((uint32_t)instr->len % mtd->erasesize)
179 return -EINVAL; 184 return -EINVAL;
180 185
@@ -220,6 +225,16 @@ static int sst25l_read(struct mtd_info *mtd, loff_t from, size_t len,
220 unsigned char command[4]; 225 unsigned char command[4];
221 int ret; 226 int ret;
222 227
228 /* Sanity checking */
229 if (len == 0)
230 return 0;
231
232 if (from + len > flash->mtd.size)
233 return -EINVAL;
234
235 if (retlen)
236 *retlen = 0;
237
223 spi_message_init(&message); 238 spi_message_init(&message);
224 memset(&transfer, 0, sizeof(transfer)); 239 memset(&transfer, 0, sizeof(transfer));
225 240
@@ -261,6 +276,13 @@ static int sst25l_write(struct mtd_info *mtd, loff_t to, size_t len,
261 int i, j, ret, bytes, copied = 0; 276 int i, j, ret, bytes, copied = 0;
262 unsigned char command[5]; 277 unsigned char command[5];
263 278
279 /* Sanity checks */
280 if (!len)
281 return 0;
282
283 if (to + len > flash->mtd.size)
284 return -EINVAL;
285
264 if ((uint32_t)to % mtd->writesize) 286 if ((uint32_t)to % mtd->writesize)
265 return -EINVAL; 287 return -EINVAL;
266 288
@@ -313,7 +335,7 @@ out:
313 return ret; 335 return ret;
314} 336}
315 337
316static struct flash_info *sst25l_match_device(struct spi_device *spi) 338static struct flash_info *__devinit sst25l_match_device(struct spi_device *spi)
317{ 339{
318 struct flash_info *flash_info = NULL; 340 struct flash_info *flash_info = NULL;
319 struct spi_message m; 341 struct spi_message m;
@@ -353,12 +375,14 @@ static struct flash_info *sst25l_match_device(struct spi_device *spi)
353 return flash_info; 375 return flash_info;
354} 376}
355 377
356static int sst25l_probe(struct spi_device *spi) 378static int __devinit sst25l_probe(struct spi_device *spi)
357{ 379{
358 struct flash_info *flash_info; 380 struct flash_info *flash_info;
359 struct sst25l_flash *flash; 381 struct sst25l_flash *flash;
360 struct flash_platform_data *data; 382 struct flash_platform_data *data;
361 int ret; 383 int ret, i;
384 struct mtd_partition *parts = NULL;
385 int nr_parts = 0;
362 386
363 flash_info = sst25l_match_device(spi); 387 flash_info = sst25l_match_device(spi);
364 if (!flash_info) 388 if (!flash_info)
@@ -382,16 +406,16 @@ static int sst25l_probe(struct spi_device *spi)
382 flash->mtd.flags = MTD_CAP_NORFLASH; 406 flash->mtd.flags = MTD_CAP_NORFLASH;
383 flash->mtd.erasesize = flash_info->erase_size; 407 flash->mtd.erasesize = flash_info->erase_size;
384 flash->mtd.writesize = flash_info->page_size; 408 flash->mtd.writesize = flash_info->page_size;
385 flash->mtd.writebufsize = flash_info->page_size;
386 flash->mtd.size = flash_info->page_size * flash_info->nr_pages; 409 flash->mtd.size = flash_info->page_size * flash_info->nr_pages;
387 flash->mtd._erase = sst25l_erase; 410 flash->mtd.erase = sst25l_erase;
388 flash->mtd._read = sst25l_read; 411 flash->mtd.read = sst25l_read;
389 flash->mtd._write = sst25l_write; 412 flash->mtd.write = sst25l_write;
390 413
391 dev_info(&spi->dev, "%s (%lld KiB)\n", flash_info->name, 414 dev_info(&spi->dev, "%s (%lld KiB)\n", flash_info->name,
392 (long long)flash->mtd.size >> 10); 415 (long long)flash->mtd.size >> 10);
393 416
394 pr_debug("mtd .name = %s, .size = 0x%llx (%lldMiB) " 417 DEBUG(MTD_DEBUG_LEVEL2,
418 "mtd .name = %s, .size = 0x%llx (%lldMiB) "
395 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n", 419 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
396 flash->mtd.name, 420 flash->mtd.name,
397 (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20), 421 (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20),
@@ -399,10 +423,37 @@ static int sst25l_probe(struct spi_device *spi)
399 flash->mtd.numeraseregions); 423 flash->mtd.numeraseregions);
400 424
401 425
402 ret = mtd_device_parse_register(&flash->mtd, NULL, NULL, 426 if (mtd_has_cmdlinepart()) {
403 data ? data->parts : NULL, 427 static const char *part_probes[] = {"cmdlinepart", NULL};
404 data ? data->nr_parts : 0); 428
405 if (ret) { 429 nr_parts = parse_mtd_partitions(&flash->mtd,
430 part_probes,
431 &parts, 0);
432 }
433
434 if (nr_parts <= 0 && data && data->parts) {
435 parts = data->parts;
436 nr_parts = data->nr_parts;
437 }
438
439 if (nr_parts > 0) {
440 for (i = 0; i < nr_parts; i++) {
441 DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
442 "{.name = %s, .offset = 0x%llx, "
443 ".size = 0x%llx (%lldKiB) }\n",
444 i, parts[i].name,
445 (long long)parts[i].offset,
446 (long long)parts[i].size,
447 (long long)(parts[i].size >> 10));
448 }
449
450 flash->partitioned = 1;
451 return mtd_device_register(&flash->mtd, parts,
452 nr_parts);
453 }
454
455 ret = mtd_device_register(&flash->mtd, NULL, 0);
456 if (ret == 1) {
406 kfree(flash); 457 kfree(flash);
407 dev_set_drvdata(&spi->dev, NULL); 458 dev_set_drvdata(&spi->dev, NULL);
408 return -ENODEV; 459 return -ENODEV;
@@ -411,7 +462,7 @@ static int sst25l_probe(struct spi_device *spi)
411 return 0; 462 return 0;
412} 463}
413 464
414static int sst25l_remove(struct spi_device *spi) 465static int __devexit sst25l_remove(struct spi_device *spi)
415{ 466{
416 struct sst25l_flash *flash = dev_get_drvdata(&spi->dev); 467 struct sst25l_flash *flash = dev_get_drvdata(&spi->dev);
417 int ret; 468 int ret;
@@ -425,13 +476,25 @@ static int sst25l_remove(struct spi_device *spi)
425static struct spi_driver sst25l_driver = { 476static struct spi_driver sst25l_driver = {
426 .driver = { 477 .driver = {
427 .name = "sst25l", 478 .name = "sst25l",
479 .bus = &spi_bus_type,
428 .owner = THIS_MODULE, 480 .owner = THIS_MODULE,
429 }, 481 },
430 .probe = sst25l_probe, 482 .probe = sst25l_probe,
431 .remove = sst25l_remove, 483 .remove = __devexit_p(sst25l_remove),
432}; 484};
433 485
434module_spi_driver(sst25l_driver); 486static int __init sst25l_init(void)
487{
488 return spi_register_driver(&sst25l_driver);
489}
490
491static void __exit sst25l_exit(void)
492{
493 spi_unregister_driver(&sst25l_driver);
494}
495
496module_init(sst25l_init);
497module_exit(sst25l_exit);
435 498
436MODULE_DESCRIPTION("MTD SPI driver for SST25L Flash chips"); 499MODULE_DESCRIPTION("MTD SPI driver for SST25L Flash chips");
437MODULE_AUTHOR("Andre Renaud <andre@bluewatersys.com>, " 500MODULE_AUTHOR("Andre Renaud <andre@bluewatersys.com>, "
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-27 17:13:18 -0400